* [PATCH v2] arm64: dts: Added syscon-reboot node for FSL's LS2085A SoC
@ 2015-10-28 21:09 J. German Rivera
2015-10-29 21:49 ` Arnd Bergmann
0 siblings, 1 reply; 4+ messages in thread
From: J. German Rivera @ 2015-10-28 21:09 UTC (permalink / raw)
To: robh+dt, mark.rutland, devicetree, linux-arm-kernel, linux-kernel
Cc: bhupesh.sharma, stuart.yoder, leoli, J. German Rivera
Added sys-reboot node to the FSL's LS2085A SoC DT to leverage
the ARM-generic reboot mechanism for this SoC. This mechanism
is enabled through CONFIG_POWER_RESET_SYSCON.
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
---
CHANGE HISTORY
Changes in v2:
- Address comment form Stuart Yoder:
* Removed "@<address>" from reboot node
arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
index e281ceb..8fb3646 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
@@ -131,6 +131,18 @@
interrupts = <1 9 0x4>;
};
+ rst_ccsr: rstccsr@1E60000 {
+ compatible = "syscon";
+ reg = <0x0 0x1E60000 0x0 0x10000>;
+ };
+
+ reboot {
+ compatible ="syscon-reboot";
+ regmap = <&rst_ccsr>;
+ offset = <0x0>;
+ mask = <0x2>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
--
2.3.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2] arm64: dts: Added syscon-reboot node for FSL's LS2085A SoC
2015-10-28 21:09 [PATCH v2] arm64: dts: Added syscon-reboot node for FSL's LS2085A SoC J. German Rivera
@ 2015-10-29 21:49 ` Arnd Bergmann
2015-10-30 16:34 ` Stuart Yoder
0 siblings, 1 reply; 4+ messages in thread
From: Arnd Bergmann @ 2015-10-29 21:49 UTC (permalink / raw)
To: linux-arm-kernel
Cc: J. German Rivera, robh+dt, mark.rutland, devicetree,
linux-kernel, bhupesh.sharma, leoli, stuart.yoder
On Wednesday 28 October 2015 16:09:44 J. German Rivera wrote:
> + rst_ccsr: rstccsr@1E60000 {
> + compatible = "syscon";
> + reg = <0x0 0x1E60000 0x0 0x10000>;
> + };
> +
>
What does 'rstccsr' stand for? Is this by chance a reset controller?
If so, we probably want a real driver for it rather than just a
syscon.
Arnd
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH v2] arm64: dts: Added syscon-reboot node for FSL's LS2085A SoC
2015-10-29 21:49 ` Arnd Bergmann
@ 2015-10-30 16:34 ` Stuart Yoder
2015-10-30 19:59 ` Arnd Bergmann
0 siblings, 1 reply; 4+ messages in thread
From: Stuart Yoder @ 2015-10-30 16:34 UTC (permalink / raw)
To: Arnd Bergmann, linux-arm-kernel
Cc: Jose Rivera, robh+dt, mark.rutland, devicetree, linux-kernel,
Sharma Bhupesh, Li Leo
> -----Original Message-----
> From: Arnd Bergmann [mailto:arnd@arndb.de]
> Sent: Thursday, October 29, 2015 4:49 PM
> To: linux-arm-kernel@lists.infradead.org
> Cc: Rivera Jose-B46482; robh+dt@kernel.org; mark.rutland@arm.com; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; Sharma Bhupesh-B45370; Li Yang-Leo-R58472; Yoder Stuart-B08248
> Subject: Re: [PATCH v2] arm64: dts: Added syscon-reboot node for FSL's LS2085A SoC
>
> On Wednesday 28 October 2015 16:09:44 J. German Rivera wrote:
> > + rst_ccsr: rstccsr@1E60000 {
> > + compatible = "syscon";
> > + reg = <0x0 0x1E60000 0x0 0x10000>;
> > + };
> > +
> >
>
> What does 'rstccsr' stand for? Is this by chance a reset controller?
It is a region of some miscellaneous registers, some related to reset.
> If so, we probably want a real driver for it rather than just a
> syscon.
There is not other stuff in this region that to be exposed,
and so we really don't need a real driver.
My suggestion is to perhaps make that more explicit in the proposed
device tree node, by making the reg size "4" and naming it
as per the register name
rstcr: rstcr@1E60000 {
compatible = "syscon";
reg = <0x0 0x1E60000 0x0 0x4>;
};
The intent is really just to expose a single reset register
and use syscon-reboot until PSCI is available.
Thanks,
Stuart
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] arm64: dts: Added syscon-reboot node for FSL's LS2085A SoC
2015-10-30 16:34 ` Stuart Yoder
@ 2015-10-30 19:59 ` Arnd Bergmann
0 siblings, 0 replies; 4+ messages in thread
From: Arnd Bergmann @ 2015-10-30 19:59 UTC (permalink / raw)
To: Stuart Yoder
Cc: linux-arm-kernel, Jose Rivera, robh+dt, mark.rutland, devicetree,
linux-kernel, Sharma Bhupesh, Li Leo
On Friday 30 October 2015 16:34:26 Stuart Yoder wrote:
> My suggestion is to perhaps make that more explicit in the proposed
> device tree node, by making the reg size "4" and naming it
> as per the register name
>
> rstcr: rstcr@1E60000 {
> compatible = "syscon";
> reg = <0x0 0x1E60000 0x0 0x4>;
> };
>
> The intent is really just to expose a single reset register
> and use syscon-reboot until PSCI is available.
I would rather see a more specific compatible string here that describes
the actual name, e.g.
compatible = "fsl,ls2085a-rstcr", "syscon";
this way we have the option of making it a real driver later on by matching
on the specific string, but using the fallback syscon string otherwise.
BTW, please change the address to lowercase letters in both the node name and
the reg property. I would also change the name to 'syscon' instead of 'rstcr',
making that
rstcr: syscon@1e60000 {
...
};
Arnd
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2015-10-30 19:59 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-10-28 21:09 [PATCH v2] arm64: dts: Added syscon-reboot node for FSL's LS2085A SoC J. German Rivera
2015-10-29 21:49 ` Arnd Bergmann
2015-10-30 16:34 ` Stuart Yoder
2015-10-30 19:59 ` Arnd Bergmann
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).