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* VIA on-chip RNG and crypto...
@ 2003-12-08 23:44 Jeff Garzik
  2003-12-09  3:58 ` Nuno Silva
  2003-12-09  4:13 ` coderman
  0 siblings, 2 replies; 3+ messages in thread
From: Jeff Garzik @ 2003-12-08 23:44 UTC (permalink / raw)
  To: Linux Kernel


VIA has publicly posted the docs for the 'xstore' and 'xcrypt' 
instructions in their processors:

	http://www.via.com.tw/en/viac3/c3.jsp

(grab "VIA Padlock {ACE|RNG} Programming Guide" down at the bottom)

'xstore' is an instruction that any program may use, to obtain entropy 
from the on-chip hardware source (RNG).  The in-kernel hw_random driver 
already supports this (though this support will be moved to the 
userspace rngd soon).  'xcrypt' provides on-chip AES encrypt and 
decrypt, similarly useable by any program.

They have also supported open source by providing docs and occasionally 
hardware to myself, Dave Jones, Alan, and others.  So, while it might 
appear this is a shameless plug :) I just really like the technology, 
and am never shy about promoting good hardware designs, and vendors that 
work with the open source community.

	Jeff



P.S. In the interest of full disclosure, neither VIA nor my employer 
prompted me to write this.



^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: VIA on-chip RNG and crypto...
  2003-12-08 23:44 VIA on-chip RNG and crypto Jeff Garzik
@ 2003-12-09  3:58 ` Nuno Silva
  2003-12-09  4:13 ` coderman
  1 sibling, 0 replies; 3+ messages in thread
From: Nuno Silva @ 2003-12-09  3:58 UTC (permalink / raw)
  To: Jeff Garzik; +Cc: Linux Kernel

Hi Jeff!

Jeff Garzik wrote:
> 
> VIA has publicly posted the docs for the 'xstore' and 'xcrypt' 
> instructions in their processors:
> 
>     http://www.via.com.tw/en/viac3/c3.jsp
> 
> (grab "VIA Padlock {ACE|RNG} Programming Guide" down at the bottom)
> 


You forgot the "journalist touch". To spike interest:

"PadLock ACE encrypts at rates of up to 12.5 Gigabits per second (Gbps) 
with a 1GHz VIA C3 processor, more than eight times faster than the best 
software AES implementation from a power hungry 3GHz Intel® Pentium® 4 
processor based system that encrypts at a rate of a mere 1.5 Gbps."

25 times faster, clock by clock :)

Regards,
Nuno Silva

[...]

> 
> P.S. In the interest of full disclosure, neither VIA nor my employer 
> prompted me to write this.
> 

The same here.



^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: VIA on-chip RNG and crypto...
  2003-12-08 23:44 VIA on-chip RNG and crypto Jeff Garzik
  2003-12-09  3:58 ` Nuno Silva
@ 2003-12-09  4:13 ` coderman
  1 sibling, 0 replies; 3+ messages in thread
From: coderman @ 2003-12-09  4:13 UTC (permalink / raw)
  To: linux-kernel

Jeff Garzik wrote:

> VIA has publicly posted the docs for the 'xstore' and 'xcrypt' 
> instructions in their processors:
>
>     http://www.via.com.tw/en/viac3/c3.jsp
> ...
> They have also supported open source by providing docs and 
> occasionally hardware to myself, Dave Jones, Alan, and others.  So, 
> while it might appear this is a shameless plug :) I just really like 
> the technology, and am never shy about promoting good hardware 
> designs, and vendors that work with the open source community.

Same here, this crypto stuff rocks!

I posted a document and some sources for using the high throughput
entropy source on linux (2.4.23 and 2.4.6test9) here:

    http://peertech.org/hardware/viarng/

The stock hw_random.c needs a few tweaks to support 8 byte xstore,
and I wrote a new userspace entropy daemon to support low latency,
high volume throughput.  I should clean the code up so it is usable...

Best regards,


^ permalink raw reply	[flat|nested] 3+ messages in thread

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2003-12-08 23:44 VIA on-chip RNG and crypto Jeff Garzik
2003-12-09  3:58 ` Nuno Silva
2003-12-09  4:13 ` coderman

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