* [PATCH v2 1/2] arm64: dts: ti: k3-j7200-som-p0: main_i2c0 have an ioexpander on the SOM
2020-11-20 7:35 [PATCH v2 0/2] arm64: dts: ti: k3-j7200-som/cpb: Correct i2c bus representations Peter Ujfalusi
@ 2020-11-20 7:35 ` Peter Ujfalusi
2020-11-20 7:35 ` [PATCH v2 2/2] arm64: dts: ti: k3-j7200-common-proc-board: Correct the name of io expander on main_i2c1 Peter Ujfalusi
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Peter Ujfalusi @ 2020-11-20 7:35 UTC (permalink / raw)
To: nm, t-kristo
Cc: linux-arm-kernel, linux-kernel, devicetree, nsekhar, vigneshr
The J7200 SOM have additional io expander which is used to control several
SOM level muxes to make sure that the correct signals are routed to the
correct pin on the SOM <-> CPB connectors.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
---
.../dts/ti/k3-j7200-common-proc-board.dts | 11 --------
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 26 +++++++++++++++++++
2 files changed, 26 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 6b3863108571..2721137d8943 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -43,13 +43,6 @@ J721E_WKUP_IOPAD(0x0098, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
};
&main_pmx0 {
- main_i2c0_pins_default: main-i2c0-pins-default {
- pinctrl-single,pins = <
- J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
- J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
- >;
- };
-
main_i2c1_pins_default: main-i2c1-pins-default {
pinctrl-single,pins = <
J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */
@@ -146,10 +139,6 @@ &cpsw_port1 {
};
&main_i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_i2c0_pins_default>;
- clock-frequency = <400000>;
-
exp1: gpio@20 {
compatible = "ti,tca6416";
reg = <0x20>;
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
index fbd17d38f6b6..7b5e9aa0324e 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
@@ -48,6 +48,15 @@ J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (A7) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */
};
};
+&main_pmx0 {
+ main_i2c0_pins_default: main-i2c0-pins-default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
+ J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
+ >;
+ };
+};
+
&hbmc {
/* OSPI and HBMC are muxed inside FSS, Bootloader will enable
* appropriate node based on board detection
@@ -131,3 +140,20 @@ &mailbox0_cluster10 {
&mailbox0_cluster11 {
status = "disabled";
};
+
+&main_i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c0_pins_default>;
+ clock-frequency = <400000>;
+
+ exp_som: gpio@21 {
+ compatible = "ti,tca6408";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "USB2.0_MUX_SEL", "CANUART_MUX1_SEL0",
+ "CANUART_MUX2_SEL0", "CANUART_MUX_SEL1",
+ "UART/LIN_MUX_SEL", "TRC_D17/AUDIO_REFCLK_SEL",
+ "GPIO_LIN_EN", "CAN_STB";
+ };
+};
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v2 2/2] arm64: dts: ti: k3-j7200-common-proc-board: Correct the name of io expander on main_i2c1
2020-11-20 7:35 [PATCH v2 0/2] arm64: dts: ti: k3-j7200-som/cpb: Correct i2c bus representations Peter Ujfalusi
2020-11-20 7:35 ` [PATCH v2 1/2] arm64: dts: ti: k3-j7200-som-p0: main_i2c0 have an ioexpander on the SOM Peter Ujfalusi
@ 2020-11-20 7:35 ` Peter Ujfalusi
2020-11-26 16:03 ` [PATCH v2 0/2] arm64: dts: ti: k3-j7200-som/cpb: Correct i2c bus representations Grygorii Strashko
2020-11-27 15:04 ` Nishanth Menon
3 siblings, 0 replies; 5+ messages in thread
From: Peter Ujfalusi @ 2020-11-20 7:35 UTC (permalink / raw)
To: nm, t-kristo
Cc: linux-arm-kernel, linux-kernel, devicetree, nsekhar, vigneshr
J7200 main_i2c1 is connected to the i2c bus on the CPB marked as main_i2c3
The i2c1 devices on the CPB are _not_ connected to the SoC, they are not
usable with the J7200 SOM.
Correct the expander name from exp4 to exp3 and at the same time add the
line names as well.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
---
.../arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 2721137d8943..7110ef3e4092 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -154,16 +154,26 @@ exp2: gpio@22 {
};
};
+/*
+ * The j7200 CPB board is identical to the CPB used for J721E, the SOMs can be
+ * swapped on the CPB.
+ *
+ * main_i2c1 of J7200 is connected to the CPB i2c bus labeled as i2c3.
+ * The i2c1 of the CPB (as it is labeled) is not connected to j7200.
+ */
&main_i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <400000>;
- exp4: gpio@20 {
+ exp3: gpio@20 {
compatible = "ti,tca6408";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
+ gpio-line-names = "CODEC_RSTz", "CODEC_SPARE1", "UB926_RESETn",
+ "UB926_LOCK", "UB926_PWR_SW_CNTRL",
+ "UB926_TUNER_RESET", "UB926_GPIO_SPARE", "";
};
};
--
Peter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 0/2] arm64: dts: ti: k3-j7200-som/cpb: Correct i2c bus representations
2020-11-20 7:35 [PATCH v2 0/2] arm64: dts: ti: k3-j7200-som/cpb: Correct i2c bus representations Peter Ujfalusi
2020-11-20 7:35 ` [PATCH v2 1/2] arm64: dts: ti: k3-j7200-som-p0: main_i2c0 have an ioexpander on the SOM Peter Ujfalusi
2020-11-20 7:35 ` [PATCH v2 2/2] arm64: dts: ti: k3-j7200-common-proc-board: Correct the name of io expander on main_i2c1 Peter Ujfalusi
@ 2020-11-26 16:03 ` Grygorii Strashko
2020-11-27 15:04 ` Nishanth Menon
3 siblings, 0 replies; 5+ messages in thread
From: Grygorii Strashko @ 2020-11-26 16:03 UTC (permalink / raw)
To: Peter Ujfalusi, nm, t-kristo
Cc: devicetree, nsekhar, linux-kernel, linux-arm-kernel, vigneshr
On 20/11/2020 09:35, Peter Ujfalusi wrote:
> Hi,
>
> Changes since v1:
> - Added REviewed-by from Vignesh
> - Comment block to explain main_i2c1 connection to CPB
>
> The main_i2c0 missed the ioexpander present on the SOM itself to control muxes
> to route signals to CPB connectors.
>
> The main_i2c1 of J7200 is _not_ connected to the i2c1 of CPB, it is connected to
> i2c3, so the devices on the CPB's i2c1 bus are not avalible, but the ones on the
> CPB i2c3 are available under the main_i2c1.
>
> Add nice line names at the same time to these.
>
> Regards,
> Peter
> ---
> Peter Ujfalusi (2):
> arm64: dts: ti: k3-j7200-som-p0: main_i2c0 have an ioexpander on the
> SOM
> arm64: dts: ti: k3-j7200-common-proc-board: Correct the name of io
> expander on main_i2c1
>
> .../dts/ti/k3-j7200-common-proc-board.dts | 23 ++++++++--------
> arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 26 +++++++++++++++++++
> 2 files changed, 37 insertions(+), 12 deletions(-)
>
Thank you.
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
--
Best regards,
grygorii
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2 0/2] arm64: dts: ti: k3-j7200-som/cpb: Correct i2c bus representations
2020-11-20 7:35 [PATCH v2 0/2] arm64: dts: ti: k3-j7200-som/cpb: Correct i2c bus representations Peter Ujfalusi
` (2 preceding siblings ...)
2020-11-26 16:03 ` [PATCH v2 0/2] arm64: dts: ti: k3-j7200-som/cpb: Correct i2c bus representations Grygorii Strashko
@ 2020-11-27 15:04 ` Nishanth Menon
3 siblings, 0 replies; 5+ messages in thread
From: Nishanth Menon @ 2020-11-27 15:04 UTC (permalink / raw)
To: Peter Ujfalusi, t-kristo
Cc: Nishanth Menon, linux-arm-kernel, devicetree, vigneshr, nsekhar,
linux-kernel
On Fri, 20 Nov 2020 09:35:31 +0200, Peter Ujfalusi wrote:
> Changes since v1:
> - Added REviewed-by from Vignesh
> - Comment block to explain main_i2c1 connection to CPB
>
> The main_i2c0 missed the ioexpander present on the SOM itself to control muxes
> to route signals to CPB connectors.
>
> [...]
Hi Peter Ujfalusi,
I have applied the following to branch ti-k3-dts-next on [1].
Thank you!
[1/2] arm64: dts: ti: k3-j7200-som-p0: main_i2c0 have an ioexpander on the SOM
commit: b6633d778675a58fba1d7f795169da212a76231d
[2/2] arm64: dts: ti: k3-j7200-common-proc-board: Correct the name of io expander on main_i2c1
commit: 2eefbf5f862ed98a043917fa54c7a79a56ec08f6
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
[1] git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux.git
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 5+ messages in thread