* [PATCH 1/2] PCI: Reorder some fields in 'struct pci_dev'
@ 2023-06-18 16:24 Christophe JAILLET
2023-06-18 16:24 ` [PATCH 2/2] PCI: Change the type of 'rom_attr_enabled' " Christophe JAILLET
2023-07-13 16:24 ` [PATCH 1/2] PCI: Reorder some fields " Bjorn Helgaas
0 siblings, 2 replies; 3+ messages in thread
From: Christophe JAILLET @ 2023-06-18 16:24 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-kernel, kernel-janitors, Christophe JAILLET, linux-pci
Group some bitfield variables to reduce hole.
On x86_64, this shrinks the size of 'struct pci_dev' by 16 bytes when
compiled with 'allmodconfig'. This goes from 3576 to 3560.
The move related to CONFIG_PCIEASPM depends on the config. But it gives
the opportunity to merge to bitfields.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
---
include/linux/pci.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/pci.h b/include/linux/pci.h
index c69a2cc1f412..106754757279 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -366,8 +366,8 @@ struct pci_dev {
pci_power_t current_state; /* Current operating state. In ACPI,
this is D0-D3, D0 being fully
functional, and D3 being off. */
- unsigned int imm_ready:1; /* Supports Immediate Readiness */
u8 pm_cap; /* PM capability offset */
+ unsigned int imm_ready:1; /* Supports Immediate Readiness */
unsigned int pme_support:5; /* Bitmask of states from which PME#
can be generated */
unsigned int pme_poll:1; /* Poll device's PME status bit */
@@ -392,9 +392,9 @@ struct pci_dev {
#ifdef CONFIG_PCIEASPM
struct pcie_link_state *link_state; /* ASPM link state */
+ u16 l1ss; /* L1SS Capability pointer */
unsigned int ltr_path:1; /* Latency Tolerance Reporting
supported from root to here */
- u16 l1ss; /* L1SS Capability pointer */
#endif
unsigned int pasid_no_tlp:1; /* PASID works without TLP Prefix */
unsigned int eetlp_prefix_path:1; /* End-to-End TLP Prefix */
--
2.34.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] PCI: Change the type of 'rom_attr_enabled' in 'struct pci_dev'
2023-06-18 16:24 [PATCH 1/2] PCI: Reorder some fields in 'struct pci_dev' Christophe JAILLET
@ 2023-06-18 16:24 ` Christophe JAILLET
2023-07-13 16:24 ` [PATCH 1/2] PCI: Reorder some fields " Bjorn Helgaas
1 sibling, 0 replies; 3+ messages in thread
From: Christophe JAILLET @ 2023-06-18 16:24 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-kernel, kernel-janitors, Christophe JAILLET, linux-pci
Make 'rom_attr_enabled' a single bit in a bitfield and move it close to an
existing bitfield so that they can be merged.
This field is only used in 'drivers/pci/pci-sysfs.c' to store 0 or 1.
On x86_64, this shrinks the size of 'struct pci_dev' by 8 bytes.
This goes from 3560 to 3552.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
---
include/linux/pci.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 106754757279..0ff7500772e6 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -464,12 +464,12 @@ struct pci_dev {
unsigned int no_vf_scan:1; /* Don't scan for VFs after IOV enablement */
unsigned int no_command_memory:1; /* No PCI_COMMAND_MEMORY */
unsigned int rom_bar_overlap:1; /* ROM BAR disable broken */
+ unsigned int rom_attr_enabled:1; /* Display of ROM attribute enabled? */
pci_dev_flags_t dev_flags;
atomic_t enable_cnt; /* pci_enable_device has been called */
u32 saved_config_space[16]; /* Config space saved at suspend time */
struct hlist_head saved_cap_space;
- int rom_attr_enabled; /* Display of ROM attribute enabled? */
struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
--
2.34.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/2] PCI: Reorder some fields in 'struct pci_dev'
2023-06-18 16:24 [PATCH 1/2] PCI: Reorder some fields in 'struct pci_dev' Christophe JAILLET
2023-06-18 16:24 ` [PATCH 2/2] PCI: Change the type of 'rom_attr_enabled' " Christophe JAILLET
@ 2023-07-13 16:24 ` Bjorn Helgaas
1 sibling, 0 replies; 3+ messages in thread
From: Bjorn Helgaas @ 2023-07-13 16:24 UTC (permalink / raw)
To: Christophe JAILLET
Cc: Bjorn Helgaas, linux-kernel, kernel-janitors, linux-pci
On Sun, Jun 18, 2023 at 06:24:54PM +0200, Christophe JAILLET wrote:
> Group some bitfield variables to reduce hole.
> On x86_64, this shrinks the size of 'struct pci_dev' by 16 bytes when
> compiled with 'allmodconfig'. This goes from 3576 to 3560.
>
> The move related to CONFIG_PCIEASPM depends on the config. But it gives
> the opportunity to merge to bitfields.
>
> Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Both patches applies to pci/misc for v6.6, thanks!
> ---
> include/linux/pci.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index c69a2cc1f412..106754757279 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -366,8 +366,8 @@ struct pci_dev {
> pci_power_t current_state; /* Current operating state. In ACPI,
> this is D0-D3, D0 being fully
> functional, and D3 being off. */
> - unsigned int imm_ready:1; /* Supports Immediate Readiness */
> u8 pm_cap; /* PM capability offset */
> + unsigned int imm_ready:1; /* Supports Immediate Readiness */
> unsigned int pme_support:5; /* Bitmask of states from which PME#
> can be generated */
> unsigned int pme_poll:1; /* Poll device's PME status bit */
> @@ -392,9 +392,9 @@ struct pci_dev {
>
> #ifdef CONFIG_PCIEASPM
> struct pcie_link_state *link_state; /* ASPM link state */
> + u16 l1ss; /* L1SS Capability pointer */
> unsigned int ltr_path:1; /* Latency Tolerance Reporting
> supported from root to here */
> - u16 l1ss; /* L1SS Capability pointer */
> #endif
> unsigned int pasid_no_tlp:1; /* PASID works without TLP Prefix */
> unsigned int eetlp_prefix_path:1; /* End-to-End TLP Prefix */
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2023-07-13 16:24 UTC | newest]
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2023-06-18 16:24 [PATCH 1/2] PCI: Reorder some fields in 'struct pci_dev' Christophe JAILLET
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2023-07-13 16:24 ` [PATCH 1/2] PCI: Reorder some fields " Bjorn Helgaas
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