From: Alex Ghiti <alex@ghiti.fr>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <Atish.Patra@wdc.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/2] PUD/PGDIR entries for linear mapping
Date: Mon, 29 Jun 2020 10:46:47 -0400 [thread overview]
Message-ID: <452647fc-bcfc-c47c-50eb-cb06a94f6d38@ghiti.fr> (raw)
In-Reply-To: <20200603153608.30056-1-alex@ghiti.fr>
Le 6/3/20 à 11:36 AM, Alexandre Ghiti a écrit :
> This small patchset intends to use PUD/PGDIR entries for linear mapping
> in order to better utilize TLB.
>
> At the moment, only PMD entries can be used since on common platforms
> (qemu/unleashed), the kernel is loaded at DRAM + 2MB which dealigns virtual
> and physical addresses and then prevents the use of PUD/PGDIR entries.
> So the kernel must be able to get those 2MB for PAGE_OFFSET to map the
> beginning of the DRAM: this is achieved in patch 1.
>
> But furthermore, at the moment, the firmware (opensbi) explicitly asks the
> kernel not to map the region it occupies, which is on those common
> platforms at the very beginning of the DRAM and then it also dealigns
> virtual and physical addresses. I proposed a patch here:
>
> https://github.com/riscv/opensbi/pull/167
>
> that removes this 'constraint' but *not* all the time as it offers some
> kind of protection in case PMP is not available. So sometimes, we may
> have a part of the memory below the kernel that is removed creating a
> misalignment between virtual and physical addresses. So for performance
> reasons, we must at least make sure that PMD entries can be used: that
> is guaranteed by patch 1 too.
>
> Finally the second patch simply improves best_map_size so that whenever
> possible, PUD/PGDIR entries are used.
>
> Below is the kernel page table without this patch on a 6G platform:
>
> ---[ Linear mapping ]---
> 0xffffc00000000000-0xffffc00176e00000 0x0000000080200000 5998M PMD D A . . . W R V
>
> And with this patchset + opensbi patch:
>
> ---[ Linear mapping ]---
> 0xffffc00000000000-0xffffc00140000000 0x0000000080000000 5G PUD D A . . . W R V
> 0xffffc00140000000-0xffffc00177000000 0x00000001c0000000 880M PMD D A . . . W R V
>
> Alexandre Ghiti (2):
> riscv: Get memory below load_pa while ensuring linear mapping is PMD
> aligned
> riscv: Use PUD/PGDIR entries for linear mapping when possible
>
> arch/riscv/include/asm/page.h | 8 ++++
> arch/riscv/mm/init.c | 69 +++++++++++++++++++++++++++++------
> 2 files changed, 65 insertions(+), 12 deletions(-)
>
The way to handle the remapping of the first 2MB is incorrect: Atish has
issues while using an initrd because the initrd_start variable is
defined using __va between setup_vm and setup_vm_final and then its
value is inconsistent after setup_vm_final since virtual addressing was
modified with the remapping of the first 2MB.
I will come with another solution to this problem since the way I handle
it for now is not correct.
Thanks,
Alex
prev parent reply other threads:[~2020-06-29 19:19 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-03 15:36 [PATCH 0/2] PUD/PGDIR entries for linear mapping Alexandre Ghiti
2020-06-03 15:36 ` [PATCH 1/2] riscv: Get memory below load_pa while ensuring linear mapping is PMD aligned Alexandre Ghiti
2020-06-03 15:36 ` [PATCH 2/2] riscv: Use PUD/PGDIR entries for linear mapping when possible Alexandre Ghiti
2020-06-19 0:47 ` Atish Patra
2020-06-19 4:28 ` Alex Ghiti
2020-06-19 18:16 ` Atish Patra
2020-06-20 9:04 ` Alex Ghiti
2020-06-21 9:39 ` Alex Ghiti
2020-06-22 19:11 ` Atish Patra
2020-06-29 14:42 ` Alex Ghiti
2020-06-10 18:32 ` [PATCH 0/2] PUD/PGDIR entries for linear mapping Atish Patra
2020-06-11 6:51 ` Alex Ghiti
2020-06-11 17:29 ` Atish Patra
2020-06-12 12:59 ` Alex Ghiti
2020-06-12 13:17 ` Alex Ghiti
2020-06-12 17:43 ` Atish Patra
2020-06-15 5:35 ` Alex Ghiti
2020-06-16 21:52 ` Atish Patra
2020-06-29 14:46 ` Alex Ghiti [this message]
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