From: Guru Das Srinagesh <gurus@codeaurora.org>
To: Mark Brown <broonie@kernel.org>,
Markus Elfring <Markus.Elfring@web.de>,
Lee Jones <lee.jones@linaro.org>,
Rob Herring <robh+dt@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>,
Greg KH <gregkh@linuxfoundation.org>,
Guenter Roeck <linux@roeck-us.net>, Joe Perches <joe@perches.com>,
Subbaraman Narayanamurthy <subbaram@codeaurora.org>,
David Collins <collinsd@codeaurora.org>,
Anirudh Ghayal <aghayal@codeaurora.org>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org,
Guru Das Srinagesh <gurus@codeaurora.org>
Subject: [RFC PATCH v3 3/3] regmap-irq: Modify type_buf handling for IRQ_TYPE_LEVEL_*
Date: Wed, 10 Mar 2021 16:39:54 -0800 [thread overview]
Message-ID: <46a360a9dff869606a417364a0a76c8ec4d0d4c9.1615423027.git.gurus@codeaurora.org> (raw)
In-Reply-To: <cover.1615423027.git.gurus@codeaurora.org>
In-Reply-To: <cover.1615423027.git.gurus@codeaurora.org>
In order to configure LEVEL_HIGH and LEVEL_LOW for QCOM's type
registers, the bit corresponding to the interrupt must be cleared.
Therefore, in QCOM's case, the type_*_val are all to be configured as
BIT() masks.
Quite clearly, this is a fundamental change, and am looking for feedback
on whether and how this may be handled in a generic manner.
Signed-off-by: Guru Das Srinagesh <gurus@codeaurora.org>
---
drivers/base/regmap/regmap-irq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index cb13855..c70ef90 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -327,11 +327,11 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
break;
case IRQ_TYPE_LEVEL_HIGH:
- d->type_buf[reg] |= t->type_level_high_val;
+ d->type_buf[reg] &= t->type_level_high_val;
break;
case IRQ_TYPE_LEVEL_LOW:
- d->type_buf[reg] |= t->type_level_low_val;
+ d->type_buf[reg] &= t->type_level_low_val;
break;
default:
return -EINVAL;
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2021-03-11 0:40 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-11 0:39 [RFC PATCH v3 0/3] Add support for Qualcomm MFD PMIC register layout Guru Das Srinagesh
2021-03-11 0:39 ` [RFC PATCH v3 1/3] regmap-irq: Extend sub-irq to support non-fixed reg strides Guru Das Srinagesh
2021-04-12 6:05 ` Matti Vaittinen
2021-04-12 11:08 ` Vaittinen, Matti
2021-04-12 18:08 ` Guru Das Srinagesh
2021-03-11 0:39 ` [RFC PATCH v3 2/3] regmap-irq: Add support for POLARITY_HI and POLARITY_LO config regs Guru Das Srinagesh
2021-03-12 12:19 ` Mark Brown
2021-03-15 20:33 ` Guru Das Srinagesh
2021-03-15 20:36 ` Guru Das Srinagesh
2021-03-17 20:42 ` Mark Brown
2021-03-20 2:37 ` Guru Das Srinagesh
2021-03-11 0:39 ` Guru Das Srinagesh [this message]
2021-03-18 18:33 ` (subset) [RFC PATCH v3 0/3] Add support for Qualcomm MFD PMIC register layout Mark Brown
2021-03-18 18:36 ` Mark Brown
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