[PATCH 0/5] x86: another attempt at x86 pagetable unification

[PATCH 0/5] x86: another attempt at x86 pagetable unification

[Jeremy Fitzhardinge]

Hi Ingo,

Here's another round of the pagetable unification patches.  I've done a
few dozen rounds of randconfig builds on both 32- and 64-bit, so I hope
that will prevent compile problems in your test environment.

I've also boot-tested 64-bit and 32-bit PAE/non-PAE configs (both paravirt
and non-paravirt).

Thanks,
	J
-- 

[PATCH 1/5] x86: clean up asm-x86/page*.h

[Jeremy Fitzhardinge]

[-- Attachment #1: x86-unify-page_h.patch --]
[-- Type: text/plain, Size: 23674 bytes --]

Unify common definitions in page*.h.  To simplify other code, I added
typedefs for the value of pte/pmd/pud/pgd values, so they can be used
symbolically elsewhere without needing to have lots of 32/64/PAE
tests.

Also, add PAGETABLE_LEVELS define so that other definitions can test
for it directly rather than using indirect 32/64/PAE tests.

Signed-off-by: Jeremy Fitzhardinge <Jeremy.Fitzhardinge@citrix.com>

---
 arch/x86/mm/init_32.c        |    2 
 include/asm-x86/Kbuild       |    3 
 include/asm-x86/page.h       |  347 ++++++++++++++++++++++++++++++++++++++++--
 include/asm-x86/page_32.h    |  233 ----------------------------
 include/asm-x86/page_64.h    |  158 -------------------
 include/asm-x86/pgtable_64.h |   31 +--
 6 files changed, 355 insertions(+), 419 deletions(-)

===================================================================
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -44,7 +44,7 @@
 #include <asm/sections.h>
 #include <asm/paravirt.h>
 
-unsigned int __VMALLOC_RESERVE = 128 << 20;
+unsigned long __VMALLOC_RESERVE = 128 << 20;
 
 DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
 unsigned long highstart_pfn, highend_pfn;
===================================================================
--- a/include/asm-x86/Kbuild
+++ b/include/asm-x86/Kbuild
@@ -15,8 +15,7 @@ unifdef-y += mce.h
 unifdef-y += mce.h
 unifdef-y += msr.h
 unifdef-y += mtrr.h
-unifdef-y += page_32.h
-unifdef-y += page_64.h
+unifdef-y += page.h
 unifdef-y += posix_types_32.h
 unifdef-y += posix_types_64.h
 unifdef-y += ptrace.h
===================================================================
--- a/include/asm-x86/page.h
+++ b/include/asm-x86/page.h
@@ -1,13 +1,340 @@
+#ifndef _ASM_X86_PAGE_H
+#define _ASM_X86_PAGE_H
+
+#include <linux/const.h>
+#include <linux/compiler.h>
+
+/* PAGE_SHIFT determines the page size */
+#define PAGE_SHIFT	12
+#define PAGE_SIZE	(_AC(1,UL) << PAGE_SHIFT)
+#define PAGE_MASK	(~(PAGE_SIZE-1))
+#define PHYSICAL_PAGE_MASK	(~(PAGE_SIZE-1) & __PHYSICAL_MASK)
+
+#define LARGE_PAGE_MASK (~(LARGE_PAGE_SIZE-1))
+#define LARGE_PAGE_SIZE (_AC(1,UL) << PMD_SHIFT)
+
+#define HPAGE_SIZE	(_AC(1,UL) << HPAGE_SHIFT)
+#define HPAGE_MASK	(~(HPAGE_SIZE - 1))
+#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
+
 #ifdef __KERNEL__
-# ifdef CONFIG_X86_32
-#  include "page_32.h"
-# else
-#  include "page_64.h"
-# endif
+
+#ifndef __ASSEMBLY__
+#include <linux/types.h>
+#endif /* !__ASSEMBLY__ */
+
+#ifdef CONFIG_X86_32
+#ifndef __ASSEMBLY__
+#ifdef CONFIG_X86_USE_3DNOW
+
+#include <asm/mmx.h>
+
+static inline void clear_page(void *page)
+{
+	mmx_clear_page(page);
+}
+
+static inline void copy_page(void *to, void *from)
+{
+	mmx_copy_page(to, from);
+}
+
+#else  /* !CONFIG_X86_USE_3DNOW */
+
+/*
+ *	On older X86 processors it's not a win to use MMX here it seems.
+ *	Maybe the K6-III ?
+ */
+
+#define clear_page(page)	memset((void *)(page), 0, PAGE_SIZE)
+#define copy_page(to,from)	memcpy((void *)(to), (void *)(from), PAGE_SIZE)
+
+#endif	/* CONFIG_X86_USE_3DNOW */
+
+extern unsigned long __VMALLOC_RESERVE;
+extern int nx_enabled;
+#define __phys_addr(x)		((unsigned long)(x)-PAGE_OFFSET)
+
+#endif /* !__ASSEMBLY__ */
+
+#define __PAGE_OFFSET		_AC(CONFIG_PAGE_OFFSET, UL)
+
+#define VMALLOC_RESERVE		(__VMALLOC_RESERVE)
+#define MAXMEM			(-__PAGE_OFFSET-__VMALLOC_RESERVE)
+
+#ifdef CONFIG_HUGETLB_PAGE
+#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
+#endif
+
+#ifndef CONFIG_X86_PAE
+/*
+ * 32 bit mode.  2 level pagetable, 32 bit physical, 32 bit virtual
+ */
+#define PAGETABLE_LEVELS	2
+#define __PHYSICAL_MASK_SHIFT	32
+#define __VIRTUAL_MASK_SHIFT	32
+#define HPAGE_SHIFT		PGDIR_SHIFT
+
+#ifndef __ASSEMBLY__
+typedef u32	pteval_t;
+typedef u32	pmdval_t;
+typedef u32	pudval_t;
+typedef u32	pgdval_t;
+typedef u32	pgprotval_t;
+
+typedef struct { unsigned long pte_low; } pte_t, boot_pte_t;
+
+static inline pteval_t native_pte_val(pte_t pte)
+{
+	return pte.pte_low;
+}
+
+static inline pte_t native_make_pte(pteval_t val)
+{
+	return (pte_t) { val };
+}
+#endif	/* __ASSEMBLY__ */
+
+#else	/* CONFIG_X86_PAE */
+/*
+ * 32 bit PAE mode.  3 level pagetable, 36 bit physical, 32 bit virtual
+ */
+#define PAGETABLE_LEVELS	3
+#define __PHYSICAL_MASK_SHIFT	36
+#define __VIRTUAL_MASK_SHIFT	32
+#define HPAGE_SHIFT		PMD_SHIFT
+
+#ifndef __ASSEMBLY__
+typedef u64	pteval_t;
+typedef u64	pmdval_t;
+typedef u64	pudval_t;
+typedef u64	pgdval_t;
+typedef u64	pgprotval_t;
+
+typedef struct { unsigned long pte_low, pte_high; } pte_t;
+
+static inline pteval_t native_pte_val(pte_t pte)
+{
+	return pte.pte_low | ((unsigned long long)pte.pte_high << 32);
+}
+
+static inline pte_t native_make_pte(pteval_t val)
+{
+	return (pte_t) { .pte_low = val, .pte_high = (val >> 32) } ;
+}
+#endif	/* __ASSEMBLY__ */
+
+#endif	 /* CONFIG_X86_PAE */
+
+#else  /* !CONFIG_X86_32 */
+/*
+ *  64 bit mode.  4 level pagetable, 46 bit physical, 48 bit virtual
+ */
+#define PAGETABLE_LEVELS	4
+#define __PHYSICAL_MASK_SHIFT	46
+#define __VIRTUAL_MASK_SHIFT	48
+#define HPAGE_SHIFT		PMD_SHIFT
+
+#ifndef __ASSEMBLY__
+typedef u64	pteval_t;
+typedef u64	pmdval_t;
+typedef u64	pudval_t;
+typedef u64	pgdval_t;
+typedef u64	pgprotval_t;
+
+typedef struct { pteval_t pte; } pte_t;
+
+static inline pteval_t native_pte_val(pte_t pte)
+{
+	return pte.pte;
+}
+
+static inline pte_t native_make_pte(pteval_t pte)
+{
+	return (pte_t){ pte };
+}
+
+extern unsigned long phys_base;
+extern unsigned long end_pfn;
+extern unsigned long end_pfn_map;
+
+void clear_page(void *);
+void copy_page(void *, void *);
+unsigned long __phys_addr(unsigned long);
+
+struct page;
+
+static inline void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
+{
+	clear_page(page);
+}
+
+static inline void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *topg)
+{
+	copy_page(to, from);
+}
+
+#endif	/* __ASSEMBLY__ */
+#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
+	alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
+#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
+
+#ifdef CONFIG_THREAD_ORDER
+# define THREAD_ORDER  CONFIG_THREAD_ORDER
 #else
-# ifdef __i386__
-#  include "page_32.h"
-# else
-#  include "page_64.h"
-# endif
+# define THREAD_ORDER  1
 #endif
+#define THREAD_SIZE  (PAGE_SIZE << THREAD_ORDER)
+#define CURRENT_MASK (~(THREAD_SIZE-1))
+
+#define EXCEPTION_STACK_ORDER 0
+#define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER)
+
+#define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1)
+#define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER)
+
+#define IRQSTACK_ORDER 2
+#define IRQSTACKSIZE (PAGE_SIZE << IRQSTACK_ORDER)
+
+#define STACKFAULT_STACK 1
+#define DOUBLEFAULT_STACK 2
+#define NMI_STACK 3
+#define DEBUG_STACK 4
+#define MCE_STACK 5
+#define N_EXCEPTION_STACKS 5  /* hw limit: 7 */
+
+#define __PHYSICAL_START	CONFIG_PHYSICAL_START
+#define __KERNEL_ALIGN		0x200000
+
+#define KERNEL_TEXT_SIZE  (40*1024*1024)
+#define KERNEL_TEXT_START _AC(0xffffffff80000000, UL)
+
+/*
+ * Make sure kernel is aligned to 2MB address. Catching it at compile
+ * time is better. Change your config file and compile the kernel
+ * for a 2MB aligned address (CONFIG_PHYSICAL_START)
+ */
+#if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0
+#error "CONFIG_PHYSICAL_START must be a multiple of 2MB"
+#endif
+
+#define __START_KERNEL		(__START_KERNEL_map + __PHYSICAL_START)
+#define __START_KERNEL_map	_AC(0xffffffff80000000, UL)
+#define __PAGE_OFFSET           _AC(0xffff810000000000, UL)
+
+#define vmemmap ((struct page *)VMEMMAP_START)
+
+#endif	/* CONFIG_X86_32 */
+
+#ifndef __ASSEMBLY__
+typedef struct { pgprotval_t pgprot; } pgprot_t;
+typedef struct { pgdval_t pgd; } pgd_t;
+
+/* Macro so it can be used as lvalue */
+#define pgprot_val(prot)	((prot).pgprot)
+
+/* Must be macro so it can be used in initializers */
+#define __pgprot(x) ((pgprot_t) { (x) })
+
+static inline pgdval_t native_pgd_val(pgd_t pgd)
+{
+	return pgd.pgd;
+}
+
+static inline pgd_t native_make_pgd(pgdval_t val)
+{
+	return (pgd_t) { val };
+}
+
+#if PAGETABLE_LEVELS >= 3
+
+typedef struct { pmdval_t pmd; } pmd_t;
+
+static inline pmdval_t native_pmd_val(pmd_t pmd)
+{
+	return pmd.pmd;
+}
+
+static inline pmd_t native_make_pmd(unsigned long long pmd)
+{
+	return (pmd_t){ pmd };
+}
+
+#if PAGETABLE_LEVELS == 4
+
+typedef struct { pudval_t pud; } pud_t;
+
+static inline pud_t native_make_pud(unsigned long long pud)
+{
+	return (pud_t){ pud };
+}
+
+static inline pudval_t native_pud_val(pud_t pud)
+{
+	return pud.pud;
+}
+#else  /* PAGETABLE_LEVELS == 3 */
+#include <asm-generic/pgtable-nopud.h>
+#endif	/* PAGETABLE_LEVELS == 4 */
+#else  /* PAGETABLE_LEVELS == 2 */
+#include <asm-generic/pgtable-nopmd.h>
+#endif	/* PAGETABLE_LEVELS >= 3 */
+#endif	/* __ASSEMBLY__ */
+
+#ifndef CONFIG_PARAVIRT
+#define pgd_val(x)	native_pgd_val(x)
+#define __pgd(x)	native_make_pgd(x)
+
+#ifndef __PAGETABLE_PUD_FOLDED
+# define pud_val(x)	native_pud_val(x)
+# define __pud(x)	native_make_pud(x)
+#endif
+
+#ifndef __PAGETABLE_PMD_FOLDED
+# define pmd_val(x)	native_pmd_val(x)
+# define __pmd(x)	native_make_pmd(x)
+#endif
+
+#define pte_val(x)	native_pte_val(x)
+#define __pte(x)	native_make_pte(x)
+#endif	/* CONFIG_PARAVIRT */
+
+#define PTE_MASK	PHYSICAL_PAGE_MASK
+
+#define __PHYSICAL_MASK		((_AC(1,ULL) << __PHYSICAL_MASK_SHIFT) - 1)
+#define __VIRTUAL_MASK		((_AC(1,ULL) << __VIRTUAL_MASK_SHIFT) - 1)
+
+#define PAGE_OFFSET		((unsigned long)__PAGE_OFFSET)
+
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr)	(((addr)+PAGE_SIZE-1)&PAGE_MASK)
+
+#define __pa(x)		__phys_addr((unsigned long)(x))
+#define __pa_symbol(x)	__phys_addr(RELOC_HIDE((unsigned long)(x), 0))
+#define __va(x)		((void *)((unsigned long)(x)+PAGE_OFFSET))
+
+#ifdef CONFIG_FLATMEM
+#define pfn_valid(pfn)		((pfn) < max_mapnr)
+#endif /* CONFIG_FLATMEM */
+#define virt_to_page(kaddr)	pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
+#define virt_addr_valid(kaddr)	pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
+#define pfn_to_kaddr(pfn)      __va((pfn) << PAGE_SHIFT)
+
+#define VM_DATA_DEFAULT_FLAGS \
+	(((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
+	 VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+
+#define clear_user_page(page, vaddr, pg)	clear_page(page)
+#define copy_user_page(to, from, vaddr, pg)	copy_page(to, from)
+
+#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
+	alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
+#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
+
+#define __HAVE_ARCH_GATE_AREA 1
+
+#include <asm-generic/memory_model.h>
+#include <asm-generic/page.h>
+
+#endif	/* __KERNEL__ */
+#endif	/* _ASM_X86_PAGE_H */
===================================================================
--- a/include/asm-x86/page_32.h
+++ /dev/null
@@ -1,233 +0,0 @@
-#ifndef _I386_PAGE_H
-#define _I386_PAGE_H
-
-/* PAGE_SHIFT determines the page size */
-#define PAGE_SHIFT	12
-#define PAGE_SIZE	(1UL << PAGE_SHIFT)
-#define PAGE_MASK	(~(PAGE_SIZE-1))
-
-#define LARGE_PAGE_MASK (~(LARGE_PAGE_SIZE-1))
-#define LARGE_PAGE_SIZE (1UL << PMD_SHIFT)
-
-#ifdef __KERNEL__
-#ifndef __ASSEMBLY__
-
-#include <linux/string.h>
-
-#ifdef CONFIG_X86_USE_3DNOW
-
-#include <asm/mmx.h>
-
-static inline void clear_page(void *page)
-{
-	mmx_clear_page(page);
-}
-
-static inline void copy_page(void *to, void *from)
-{
-	mmx_copy_page(to, from);
-}
-
-#else
-
-/*
- *	On older X86 processors it's not a win to use MMX here it seems.
- *	Maybe the K6-III ?
- */
- 
-static inline void clear_page(void *page)
-{
-	memset(page, 0, PAGE_SIZE);
-}
-
-static inline void copy_page(void *to, void *from)
-{
-	memcpy(to, from, PAGE_SIZE);
-}
-
-#endif
-
-struct page;
-
-static void inline clear_user_page(void *page, unsigned long vaddr,
-				struct page *pg)
-{
-	clear_page(page);
-}
-
-static void inline copy_user_page(void *to, void *from, unsigned long vaddr,
-				struct page *topage)
-{
-	copy_page(to, from);
-}
-
-#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
-	alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
-#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
-
-/*
- * These are used to make use of C type-checking..
- */
-extern int nx_enabled;
-
-#ifdef CONFIG_X86_PAE
-typedef struct { unsigned long pte_low, pte_high; } pte_t;
-typedef struct { unsigned long long pmd; } pmd_t;
-typedef struct { unsigned long long pgd; } pgd_t;
-typedef struct { unsigned long long pgprot; } pgprot_t;
-
-static inline unsigned long long native_pgd_val(pgd_t pgd)
-{
-	return pgd.pgd;
-}
-
-static inline unsigned long long native_pmd_val(pmd_t pmd)
-{
-	return pmd.pmd;
-}
-
-static inline unsigned long long native_pte_val(pte_t pte)
-{
-	return pte.pte_low | ((unsigned long long)pte.pte_high << 32);
-}
-
-static inline pgd_t native_make_pgd(unsigned long long val)
-{
-	return (pgd_t) { val };
-}
-
-static inline pmd_t native_make_pmd(unsigned long long val)
-{
-	return (pmd_t) { val };
-}
-
-static inline pte_t native_make_pte(unsigned long long val)
-{
-	return (pte_t) { .pte_low = val, .pte_high = (val >> 32) } ;
-}
-
-#ifndef CONFIG_PARAVIRT
-#define pmd_val(x)	native_pmd_val(x)
-#define __pmd(x)	native_make_pmd(x)
-#endif
-
-#define HPAGE_SHIFT	21
-#include <asm-generic/pgtable-nopud.h>
-#else  /* !CONFIG_X86_PAE */
-typedef struct { unsigned long pte_low; } pte_t;
-typedef struct { unsigned long pgd; } pgd_t;
-typedef struct { unsigned long pgprot; } pgprot_t;
-#define boot_pte_t pte_t /* or would you rather have a typedef */
-
-static inline unsigned long native_pgd_val(pgd_t pgd)
-{
-	return pgd.pgd;
-}
-
-static inline unsigned long native_pte_val(pte_t pte)
-{
-	return pte.pte_low;
-}
-
-static inline pgd_t native_make_pgd(unsigned long val)
-{
-	return (pgd_t) { val };
-}
-
-static inline pte_t native_make_pte(unsigned long val)
-{
-	return (pte_t) { .pte_low = val };
-}
-
-#define HPAGE_SHIFT	22
-#include <asm-generic/pgtable-nopmd.h>
-#endif	/* CONFIG_X86_PAE */
-
-#define PTE_MASK	PAGE_MASK
-
-#ifdef CONFIG_HUGETLB_PAGE
-#define HPAGE_SIZE	((1UL) << HPAGE_SHIFT)
-#define HPAGE_MASK	(~(HPAGE_SIZE - 1))
-#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
-#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
-#endif
-
-#define pgprot_val(x)	((x).pgprot)
-#define __pgprot(x)	((pgprot_t) { (x) } )
-
-#ifndef CONFIG_PARAVIRT
-#define pgd_val(x)	native_pgd_val(x)
-#define __pgd(x)	native_make_pgd(x)
-#define pte_val(x)	native_pte_val(x)
-#define __pte(x)	native_make_pte(x)
-#endif
-
-#endif /* !__ASSEMBLY__ */
-
-/* to align the pointer to the (next) page boundary */
-#define PAGE_ALIGN(addr)	(((addr)+PAGE_SIZE-1)&PAGE_MASK)
-
-/*
- * This handles the memory map.. We could make this a config
- * option, but too many people screw it up, and too few need
- * it.
- *
- * A __PAGE_OFFSET of 0xC0000000 means that the kernel has
- * a virtual address space of one gigabyte, which limits the
- * amount of physical memory you can use to about 950MB. 
- *
- * If you want more physical memory than this then see the CONFIG_HIGHMEM4G
- * and CONFIG_HIGHMEM64G options in the kernel configuration.
- */
-
-#ifndef __ASSEMBLY__
-
-struct vm_area_struct;
-
-/*
- * This much address space is reserved for vmalloc() and iomap()
- * as well as fixmap mappings.
- */
-extern unsigned int __VMALLOC_RESERVE;
-
-extern int sysctl_legacy_va_layout;
-
-extern int page_is_ram(unsigned long pagenr);
-
-#endif /* __ASSEMBLY__ */
-
-#ifdef __ASSEMBLY__
-#define __PAGE_OFFSET		CONFIG_PAGE_OFFSET
-#else
-#define __PAGE_OFFSET		((unsigned long)CONFIG_PAGE_OFFSET)
-#endif
-
-
-#define PAGE_OFFSET		((unsigned long)__PAGE_OFFSET)
-#define VMALLOC_RESERVE		((unsigned long)__VMALLOC_RESERVE)
-#define MAXMEM			(-__PAGE_OFFSET-__VMALLOC_RESERVE)
-#define __pa(x)			((unsigned long)(x)-PAGE_OFFSET)
-/* __pa_symbol should be used for C visible symbols.
-   This seems to be the official gcc blessed way to do such arithmetic. */
-#define __pa_symbol(x)          __pa(RELOC_HIDE((unsigned long)(x),0))
-#define __va(x)			((void *)((unsigned long)(x)+PAGE_OFFSET))
-#define pfn_to_kaddr(pfn)      __va((pfn) << PAGE_SHIFT)
-#ifdef CONFIG_FLATMEM
-#define pfn_valid(pfn)		((pfn) < max_mapnr)
-#endif /* CONFIG_FLATMEM */
-#define virt_to_page(kaddr)	pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
-
-#define virt_addr_valid(kaddr)	pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
-
-#define VM_DATA_DEFAULT_FLAGS \
-	(VM_READ | VM_WRITE | \
-	((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
-		 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-
-#include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
-
-#define __HAVE_ARCH_GATE_AREA 1
-#endif /* __KERNEL__ */
-
-#endif /* _I386_PAGE_H */
===================================================================
--- a/include/asm-x86/page_64.h
+++ /dev/null
@@ -1,158 +0,0 @@
-#ifndef _X86_64_PAGE_H
-#define _X86_64_PAGE_H
-
-#include <linux/const.h>
-
-/* PAGE_SHIFT determines the page size */
-#define PAGE_SHIFT	12
-#define PAGE_SIZE	(_AC(1,UL) << PAGE_SHIFT)
-#define PAGE_MASK	(~(PAGE_SIZE-1))
-#define PHYSICAL_PAGE_MASK	(~(PAGE_SIZE-1) & __PHYSICAL_MASK)
-
-#ifdef CONFIG_THREAD_ORDER
-# define THREAD_ORDER	CONFIG_THREAD_ORDER
-#else
-# define THREAD_ORDER	1
-#endif
-
-#define THREAD_SIZE  (PAGE_SIZE << THREAD_ORDER)
-#define CURRENT_MASK (~(THREAD_SIZE-1))
-
-#define EXCEPTION_STACK_ORDER 0
-#define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER)
-
-#define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1)
-#define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER)
-
-#define IRQSTACK_ORDER 2
-#define IRQSTACKSIZE (PAGE_SIZE << IRQSTACK_ORDER)
-
-#define STACKFAULT_STACK 1
-#define DOUBLEFAULT_STACK 2
-#define NMI_STACK 3
-#define DEBUG_STACK 4
-#define MCE_STACK 5
-#define N_EXCEPTION_STACKS 5  /* hw limit: 7 */
-
-#define LARGE_PAGE_MASK (~(LARGE_PAGE_SIZE-1))
-#define LARGE_PAGE_SIZE (_AC(1,UL) << PMD_SHIFT)
-
-#define HPAGE_SHIFT PMD_SHIFT
-#define HPAGE_SIZE	(_AC(1,UL) << HPAGE_SHIFT)
-#define HPAGE_MASK	(~(HPAGE_SIZE - 1))
-#define HUGETLB_PAGE_ORDER	(HPAGE_SHIFT - PAGE_SHIFT)
-
-#ifdef __KERNEL__
-#ifndef __ASSEMBLY__
-
-extern unsigned long end_pfn;
-extern unsigned long end_pfn_map;
-
-void clear_page(void *page);
-void copy_page(void *to, void *from);
-
-struct page;
-
-static void inline clear_user_page(void *page, unsigned long vaddr,
-				struct page *pg)
-{
-	clear_page(page);
-}
-
-static void inline copy_user_page(void *to, void *from, unsigned long vaddr,
-				struct page *topage)
-{
-	copy_page(to, from);
-}
-
-#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \
-	alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr)
-#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE
-/*
- * These are used to make use of C type-checking..
- */
-typedef struct { unsigned long pte; } pte_t;
-typedef struct { unsigned long pmd; } pmd_t;
-typedef struct { unsigned long pud; } pud_t;
-typedef struct { unsigned long pgd; } pgd_t;
-#define PTE_MASK	PHYSICAL_PAGE_MASK
-
-typedef struct { unsigned long pgprot; } pgprot_t;
-
-extern unsigned long phys_base;
-
-#define pte_val(x)	((x).pte)
-#define pmd_val(x)	((x).pmd)
-#define pud_val(x)	((x).pud)
-#define pgd_val(x)	((x).pgd)
-#define pgprot_val(x)	((x).pgprot)
-
-#define __pte(x) ((pte_t) { (x) } )
-#define __pmd(x) ((pmd_t) { (x) } )
-#define __pud(x) ((pud_t) { (x) } )
-#define __pgd(x) ((pgd_t) { (x) } )
-#define __pgprot(x)	((pgprot_t) { (x) } )
-
-#endif /* !__ASSEMBLY__ */
-
-#define __PHYSICAL_START	CONFIG_PHYSICAL_START
-#define __KERNEL_ALIGN		0x200000
-
-/*
- * Make sure kernel is aligned to 2MB address. Catching it at compile
- * time is better. Change your config file and compile the kernel
- * for a 2MB aligned address (CONFIG_PHYSICAL_START)
- */
-#if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0
-#error "CONFIG_PHYSICAL_START must be a multiple of 2MB"
-#endif
-
-#define __START_KERNEL		(__START_KERNEL_map + __PHYSICAL_START)
-#define __START_KERNEL_map	_AC(0xffffffff80000000, UL)
-#define __PAGE_OFFSET           _AC(0xffff810000000000, UL)
-
-/* to align the pointer to the (next) page boundary */
-#define PAGE_ALIGN(addr)	(((addr)+PAGE_SIZE-1)&PAGE_MASK)
-
-/* See Documentation/x86_64/mm.txt for a description of the memory map. */
-#define __PHYSICAL_MASK_SHIFT	46
-#define __PHYSICAL_MASK		((_AC(1,UL) << __PHYSICAL_MASK_SHIFT) - 1)
-#define __VIRTUAL_MASK_SHIFT	48
-#define __VIRTUAL_MASK		((_AC(1,UL) << __VIRTUAL_MASK_SHIFT) - 1)
-
-#define KERNEL_TEXT_SIZE  (40*1024*1024)
-#define KERNEL_TEXT_START _AC(0xffffffff80000000, UL)
-#define PAGE_OFFSET		__PAGE_OFFSET
-
-#ifndef __ASSEMBLY__
-
-#include <asm/bug.h>
-
-extern unsigned long __phys_addr(unsigned long);
-
-#endif /* __ASSEMBLY__ */
-
-#define __pa(x)		__phys_addr((unsigned long)(x))
-#define __pa_symbol(x)	__phys_addr((unsigned long)(x))
-
-#define __va(x)			((void *)((unsigned long)(x)+PAGE_OFFSET))
-#define __boot_va(x)		__va(x)
-#define __boot_pa(x)		__pa(x)
-
-#define virt_to_page(kaddr)	pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
-#define virt_addr_valid(kaddr)	pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
-#define pfn_to_kaddr(pfn)      __va((pfn) << PAGE_SHIFT)
-
-#define VM_DATA_DEFAULT_FLAGS \
-	(((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0 ) | \
-	 VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-
-#define __HAVE_ARCH_GATE_AREA 1	
-#define vmemmap ((struct page *)VMEMMAP_START)
-
-#include <asm-generic/memory_model.h>
-#include <asm-generic/page.h>
-
-#endif /* __KERNEL__ */
-
-#endif /* _X86_64_PAGE_H */
===================================================================
--- a/include/asm-x86/pgtable_64.h
+++ b/include/asm-x86/pgtable_64.h
@@ -73,18 +73,18 @@ extern unsigned long empty_zero_page[PAG
 
 static inline void set_pte(pte_t *dst, pte_t val)
 {
-	pte_val(*dst) = pte_val(val);
+	*dst = val;
 } 
 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
 
 static inline void set_pmd(pmd_t *dst, pmd_t val)
 {
-        pmd_val(*dst) = pmd_val(val); 
+        *dst = val;
 } 
 
 static inline void set_pud(pud_t *dst, pud_t val)
 {
-	pud_val(*dst) = pud_val(val);
+	*dst = val;
 }
 
 static inline void pud_clear (pud_t *pud)
@@ -94,7 +94,7 @@ static inline void pud_clear (pud_t *pud
 
 static inline void set_pgd(pgd_t *dst, pgd_t val)
 {
-	pgd_val(*dst) = pgd_val(val); 
+	*dst = val;
 } 
 
 static inline void pgd_clear (pgd_t * pgd)
@@ -258,11 +258,11 @@ static inline unsigned long pmd_bad(pmd_
 
 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
 {
-	pte_t pte;
-	pte_val(pte) = (page_nr << PAGE_SHIFT);
-	pte_val(pte) |= pgprot_val(pgprot);
-	pte_val(pte) &= __supported_pte_mask;
-	return pte;
+	pteval_t pte;
+	pte = (page_nr << PAGE_SHIFT);
+	pte |= pgprot_val(pgprot);
+	pte &= __supported_pte_mask;
+	return __pte(pte);
 }
 
 /*
@@ -292,12 +292,12 @@ static inline int ptep_test_and_clear_yo
 {
 	if (!pte_young(*ptep))
 		return 0;
-	return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte);
+	return test_and_clear_bit(_PAGE_BIT_ACCESSED, (unsigned long *)&ptep->pte);
 }
 
 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
-	clear_bit(_PAGE_BIT_RW, &ptep->pte);
+	clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
 }
 
 /*
@@ -359,10 +359,11 @@ static inline int pmd_large(pmd_t pte) {
 /* Change flags of a PTE */
 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 { 
-	pte_val(pte) &= _PAGE_CHG_MASK;
-	pte_val(pte) |= pgprot_val(newprot);
-	pte_val(pte) &= __supported_pte_mask;
-       return pte; 
+	pteval_t val = pte_val(pte);
+	val &= _PAGE_CHG_MASK;
+	val |= pgprot_val(newprot);
+	val &= __supported_pte_mask;
+	return __pte(val);
 }
 
 #define pte_index(address) \

-- 

[PATCH 2/5] x86: unify pgtable*.h

[Jeremy Fitzhardinge]

[-- Attachment #1: x86-unify-pgtable_h.patch --]
[-- Type: text/plain, Size: 40902 bytes --]

All x86 modes and architectures have very similar pagetable
structures: the page flags, the accessors for testing/setting them,
and the combinations of page flags used for kernel and usermode
mappings are all the same.  The main difference is between 32 and
64-bit pagetable entries, with the latter supporting the NX bit.

The most significant difference between the modes/architectures is the
number of levels in the pagetable (4 for 64-bit, 3 for 32-bit/PAE, 2
for non-PAE 32-bit).  This accounts for the remaining code in the
various mode-specific headers.

I've tried to avoid changing formatting as much as possible, so that
the code motion is more obvious.  A subsequent patch will clean things
up in place.

Signed-off-by: Jeremy Fitzhardinge <Jeremy.Fitzhardinge@citrix.com>

---
 include/asm-x86/pgtable-2level.h |   17 -
 include/asm-x86/pgtable-3level.h |   38 ----
 include/asm-x86/pgtable.h        |  345 ++++++++++++++++++++++++++++++++++++++
 include/asm-x86/pgtable_32.h     |  229 -------------------------
 include/asm-x86/pgtable_64.h     |  287 ++++++-------------------------
 5 files changed, 413 insertions(+), 503 deletions(-)

===================================================================
--- a/include/asm-x86/pgtable-2level.h
+++ b/include/asm-x86/pgtable-2level.h
@@ -15,25 +15,24 @@ static inline void native_set_pte(pte_t 
 {
 	*ptep = pte;
 }
+
 static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
 				     pte_t *ptep , pte_t pte)
 {
 	native_set_pte(ptep, pte);
 }
+
 static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
 {
 	*pmdp = pmd;
 }
-#ifndef CONFIG_PARAVIRT
-#define set_pte(pteptr, pteval)		native_set_pte(pteptr, pteval)
-#define set_pte_at(mm,addr,ptep,pteval) native_set_pte_at(mm, addr, ptep, pteval)
-#define set_pmd(pmdptr, pmdval)		native_set_pmd(pmdptr, pmdval)
-#endif
 
+#undef set_pte_atomic
 #define set_pte_atomic(pteptr, pteval) set_pte(pteptr,pteval)
 #define set_pte_present(mm,addr,ptep,pteval) set_pte_at(mm,addr,ptep,pteval)
 
 #define pte_clear(mm,addr,xp)	do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
+#undef pmd_clear
 #define pmd_clear(xp)	do { set_pmd(xp, __pmd(0)); } while (0)
 
 static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *xp)
@@ -50,12 +49,6 @@ static inline pte_t native_ptep_get_and_
 #define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
 #endif
 
-#define pte_page(x)		pfn_to_page(pte_pfn(x))
-#define pte_none(x)		(!(x).pte_low)
-#define pte_pfn(x)		(pte_val(x) >> PAGE_SHIFT)
-#define pfn_pte(pfn, prot)	__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
-#define pfn_pmd(pfn, prot)	__pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
-
 /*
  * All present pages are kernel-executable:
  */
@@ -63,6 +56,8 @@ static inline int pte_exec_kernel(pte_t 
 {
 	return 1;
 }
+
+#define __supported_pte_mask	(~0ul)
 
 /*
  * Bits 0, 6 and 7 are taken, split up the 29 bits of offset
===================================================================
--- a/include/asm-x86/pgtable-3level.h
+++ b/include/asm-x86/pgtable-3level.h
@@ -94,17 +94,6 @@ static inline void native_pmd_clear(pmd_
 	*(tmp + 1) = 0;
 }
 
-#ifndef CONFIG_PARAVIRT
-#define set_pte(ptep, pte)			native_set_pte(ptep, pte)
-#define set_pte_at(mm, addr, ptep, pte)		native_set_pte_at(mm, addr, ptep, pte)
-#define set_pte_present(mm, addr, ptep, pte)	native_set_pte_present(mm, addr, ptep, pte)
-#define set_pte_atomic(ptep, pte)		native_set_pte_atomic(ptep, pte)
-#define set_pmd(pmdp, pmd)			native_set_pmd(pmdp, pmd)
-#define set_pud(pudp, pud)			native_set_pud(pudp, pud)
-#define pte_clear(mm, addr, ptep)		native_pte_clear(mm, addr, ptep)
-#define pmd_clear(pmd)				native_pmd_clear(pmd)
-#endif
-
 /*
  * Pentium-II erratum A13: in PAE mode we explicitly have to flush
  * the TLB via cr3 if the top-level pgd is changed...
@@ -119,10 +108,6 @@ static inline void pud_clear (pud_t * pu
 #define pud_page_vaddr(pud) \
 ((unsigned long) __va(pud_val(pud) & PAGE_MASK))
 
-
-/* Find an entry in the second-level page table.. */
-#define pmd_offset(pud, address) ((pmd_t *) pud_page(*(pud)) + \
-			pmd_index(address))
 
 #ifdef CONFIG_SMP
 static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
@@ -146,31 +131,8 @@ static inline int pte_same(pte_t a, pte_
 	return a.pte_low == b.pte_low && a.pte_high == b.pte_high;
 }
 
-#define pte_page(x)	pfn_to_page(pte_pfn(x))
-
-static inline int pte_none(pte_t pte)
-{
-	return !pte.pte_low && !pte.pte_high;
-}
-
-static inline unsigned long pte_pfn(pte_t pte)
-{
-	return pte_val(pte) >> PAGE_SHIFT;
-}
-
 extern unsigned long long __supported_pte_mask;
 
-static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
-{
-	return __pte((((unsigned long long)page_nr << PAGE_SHIFT) |
-		      pgprot_val(pgprot)) & __supported_pte_mask);
-}
-
-static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
-{
-	return __pmd((((unsigned long long)page_nr << PAGE_SHIFT) |
-		      pgprot_val(pgprot)) & __supported_pte_mask);
-}
 
 /*
  * Bits 0, 6 and 7 are taken in the low part of the pte,
===================================================================
--- a/include/asm-x86/pgtable.h
+++ b/include/asm-x86/pgtable.h
@@ -1,5 +1,350 @@
+#ifndef _ASM_X86_PGTABLE_H
+#define _ASM_X86_PGTABLE_H
+
+#include <linux/const.h>
+#include <asm/page.h>
+
+#ifndef __ASSEMBLY__
+/*
+ * ZERO_PAGE is a global shared page that is always zero: used
+ * for zero-mapped memory areas etc..
+ */
+extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
+#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
+
+void paging_init(void);
+
+#endif /* !__ASSEMBLY__ */
+
+
+/*
+ * _PAGE_PSE set in the page directory entry just means that
+ * the page directory entry points directly to a 4MB-aligned block of
+ * memory.
+ */
+#define _PAGE_BIT_PRESENT	0
+#define _PAGE_BIT_RW		1
+#define _PAGE_BIT_USER		2
+#define _PAGE_BIT_PWT		3
+#define _PAGE_BIT_PCD		4
+#define _PAGE_BIT_ACCESSED	5
+#define _PAGE_BIT_DIRTY		6
+#define _PAGE_BIT_FILE		6
+#define _PAGE_BIT_PSE		7	/* 4 MB (or 2MB) page */
+#define _PAGE_BIT_GLOBAL	8	/* Global TLB entry PPro+ */
+#define _PAGE_BIT_UNUSED1	9	/* available for programmer */
+#define _PAGE_BIT_UNUSED2	10
+#define _PAGE_BIT_UNUSED3	11
+#define _PAGE_BIT_NX		63	/* No execute: only valid after cpuid check */
+
+
+#define _PAGE_PRESENT	(_AC(1, UL) << _PAGE_BIT_PRESENT)
+#define _PAGE_RW	(_AC(1, UL) << _PAGE_BIT_RW)
+#define _PAGE_USER	(_AC(1, UL) << _PAGE_BIT_USER)
+#define _PAGE_PWT	(_AC(1, UL) << _PAGE_BIT_PWT)
+#define _PAGE_PCD	(_AC(1, UL) << _PAGE_BIT_PCD)
+#define _PAGE_ACCESSED	(_AC(1, UL) << _PAGE_BIT_ACCESSED)
+#define _PAGE_DIRTY	(_AC(1, UL) << _PAGE_BIT_DIRTY)
+#define _PAGE_PSE	(_AC(1, UL) << _PAGE_BIT_PSE)
+#define _PAGE_GLOBAL	(_AC(1, UL) << _PAGE_BIT_GLOBAL)
+#define _PAGE_UNUSED1	(_AC(1, UL) << _PAGE_BIT_UNUSED1)
+#define _PAGE_UNUSED2	(_AC(1, UL) << _PAGE_BIT_UNUSED2)
+#define _PAGE_UNUSED3	(_AC(1, UL) << _PAGE_BIT_UNUSED3)
+
+#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
+#define _PAGE_NX	(_AC(1, ULL) << _PAGE_BIT_NX)
+#else
+#define _PAGE_NX	0
+#endif
+
+/* If _PAGE_PRESENT is clear, we use these: */
+#define _PAGE_FILE	_PAGE_DIRTY	/* nonlinear file mapping, saved PTE; unset:swap */
+#define _PAGE_PROTNONE	_PAGE_PSE	/* if the user mapped it with PROT_NONE;
+					   pte_present gives true */
+
+#ifndef __ASSEMBLY__
+/*
+ * The following only work if pte_present() is true.
+ * Undefined behaviour if not..
+ */
+static inline int pte_dirty(pte_t pte)		{ return pte_val(pte) & _PAGE_DIRTY; }
+static inline int pte_young(pte_t pte)		{ return pte_val(pte) & _PAGE_ACCESSED; }
+static inline int pte_write(pte_t pte)		{ return pte_val(pte) & _PAGE_RW; }
+static inline int pte_file(pte_t pte)		{ return pte_val(pte) & _PAGE_FILE; }
+static inline int pte_huge(pte_t pte)		{ return pte_val(pte) & _PAGE_PSE; }
+
+#endif	/* __ASSEMBLY__ */
+
+#ifdef CONFIG_PARAVIRT
+#include <asm/paravirt.h>
+#else
+#define set_pte(ptep, pte)			native_set_pte(ptep, pte)
+#define set_pte_at(mm, addr, ptep, pte)		\
+	native_set_pte_at(mm, addr, ptep, pte)
+
+#define set_pte_present(mm, addr, ptep, pte)		\
+	native_set_pte_present(mm, addr, ptep, pte)
+#define set_pte_atomic(ptep, pte)		\
+	native_set_pte_atomic(ptep, pte)
+
+#define set_pmd(pmdp, pmd)			native_set_pmd(pmdp, pmd)
+
+#ifndef __PAGETABLE_PUD_FOLDED
+#define set_pgd(pgdp, pgd)			native_set_pgd(pgdp, pgd)
+#define set_pud(pudp, pud)			native_set_pud(pudp, pud)
+#define pgd_clear(pgd)				native_pgd_clear(pgd)
+#endif
+
+#ifndef __PAGETABLE_PMD_FOLDED
+#define pud_clear(pud)				native_pud_clear(pud)
+#endif
+
+#define pte_clear(mm, addr, ptep)		native_pte_clear(mm, addr, ptep)
+#define pmd_clear(pmd)				native_pmd_clear(pmd)
+
+#define pte_update(mm, addr, ptep)              do { } while (0)
+#define pte_update_defer(mm, addr, ptep)        do { } while (0)
+
+#endif	/* CONFIG_PARAVIRT */
+
 #ifdef CONFIG_X86_32
 # include "pgtable_32.h"
 #else
 # include "pgtable_64.h"
 #endif
+
+#ifndef __PAGETABLE_PUD_FOLDED
+#define PUD_SIZE	(_AC(1,UL) << PUD_SHIFT)
+#define PUD_MASK	(~(PUD_SIZE-1))
+#endif
+
+#ifndef __PAGETABLE_PMD_FOLDED
+#define PMD_SIZE	(_AC(1,UL) << PMD_SHIFT)
+#define PMD_MASK	(~(PMD_SIZE-1))
+#endif
+
+#define PGDIR_SIZE	(_AC(1,UL) << PGDIR_SHIFT)
+#define PGDIR_MASK	(~(PGDIR_SIZE-1))
+
+#define USER_PTRS_PER_PGD	((TASK_SIZE-1)/PGDIR_SIZE+1)
+
+#define FIRST_USER_ADDRESS	0
+
+#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
+#define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
+
+#define _PAGE_TABLE	\
+	(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
+#define _KERNPG_TABLE	\
+	(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
+#define _PAGE_CHG_MASK	\
+	(PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
+
+#ifndef __ASSEMBLY__
+
+#define PAGE_NONE	\
+	__pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
+#define PAGE_SHARED	\
+	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
+
+#define PAGE_SHARED_EXEC	\
+	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
+#define PAGE_COPY_NOEXEC	\
+	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
+#define PAGE_COPY_EXEC		\
+	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
+#define PAGE_COPY		\
+	PAGE_COPY_NOEXEC
+#define PAGE_READONLY		\
+	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
+#define PAGE_READONLY_EXEC	\
+	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
+#endif	/* __ASSEMBLY__ */
+
+#define _PAGE_KERNEL		\
+	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
+#define _PAGE_KERNEL_EXEC	\
+	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
+
+
+#define __PAGE_KERNEL_RO		(__PAGE_KERNEL & ~_PAGE_RW)
+#define __PAGE_KERNEL_RX		(__PAGE_KERNEL_EXEC & ~_PAGE_RW)
+#define __PAGE_KERNEL_NOCACHE		(__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
+#define __PAGE_KERNEL_LARGE		(__PAGE_KERNEL | _PAGE_PSE)
+#define __PAGE_KERNEL_LARGE_EXEC	(__PAGE_KERNEL_EXEC | _PAGE_PSE)
+#define __PAGE_KERNEL_VSYSCALL		\
+	(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
+#define __PAGE_KERNEL_VSYSCALL_NOCACHE	\
+	(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_PCD | _PAGE_PWT)
+
+
+#define PAGE_KERNEL		__pgprot(__PAGE_KERNEL)
+#define PAGE_KERNEL_EXEC	__pgprot(__PAGE_KERNEL_EXEC)
+#define PAGE_KERNEL_LARGE_EXEC	__pgprot(__PAGE_KERNEL_LARGE_EXEC)
+#define PAGE_KERNEL_RO		__pgprot(__PAGE_KERNEL_RO)
+#define PAGE_KERNEL_RX		__pgprot(__PAGE_KERNEL_RX)
+#define PAGE_KERNEL_NOCACHE	__pgprot(__PAGE_KERNEL_NOCACHE)
+#define PAGE_KERNEL_VSYSCALL32	__pgprot(__PAGE_KERNEL_VSYSCALL)
+#define PAGE_KERNEL_VSYSCALL	__pgprot(__PAGE_KERNEL_VSYSCALL)
+#define PAGE_KERNEL_LARGE	__pgprot(__PAGE_KERNEL_LARGE)
+#define PAGE_KERNEL_VSYSCALL_NOCACHE	__pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE)
+
+/*
+ * Without NX, the i386 can't do page protection for execute, and
+ * considers that the same are read. Also, write permissions imply
+ * read permissions.  This is the closest we can get..
+ */
+#define __P000	PAGE_NONE
+#define __P001	PAGE_READONLY
+#define __P010	PAGE_COPY
+#define __P011	PAGE_COPY
+#define __P100	PAGE_READONLY_EXEC
+#define __P101	PAGE_READONLY_EXEC
+#define __P110	PAGE_COPY_EXEC
+#define __P111	PAGE_COPY_EXEC
+
+#define __S000	PAGE_NONE
+#define __S001	PAGE_READONLY
+#define __S010	PAGE_SHARED
+#define __S011	PAGE_SHARED
+#define __S100	PAGE_READONLY_EXEC
+#define __S101	PAGE_READONLY_EXEC
+#define __S110	PAGE_SHARED_EXEC
+#define __S111	PAGE_SHARED_EXEC
+
+#ifndef __ASSEMBLY__
+
+static inline pte_t pte_mkclean(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
+static inline pte_t pte_mkold(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
+static inline pte_t pte_wrprotect(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
+static inline pte_t pte_mkexec(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_NX)); return pte; }
+static inline pte_t pte_mkdirty(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
+static inline pte_t pte_mkyoung(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
+static inline pte_t pte_mkwrite(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
+static inline pte_t pte_mkhuge(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_PSE)); return pte; }
+static inline pte_t pte_clrhuge(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_PSE)); return pte; }
+
+#ifndef __PAGETABLE_PUD_FOLDED
+static inline bool pgd_bad(pgd_t pgd)
+{
+	return (pgd_val(pgd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER)) != 0;
+}
+
+static inline bool pud_bad(pud_t pud)
+{
+	return (pud_val(pud) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER)) != 0;
+}
+#endif
+
+static inline bool pmd_bad(pmd_t pmd)
+{
+	return (pmd_val(pmd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER)) != 0;
+}
+
+/* Change flags of a PTE */
+static inline pte_t pte_modify(pte_t pte_old, pgprot_t newprot)
+{
+	pteval_t pte = pte_val(pte_old);
+	pte &= _PAGE_CHG_MASK;
+	pte |= pgprot_val(newprot);
+	pte &= __supported_pte_mask;
+	return __pte(pte);
+}
+
+/* page, protection -> pte */
+#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))
+
+static inline int pmd_large(pmd_t pte)
+{
+	return (pmd_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
+		((_PAGE_PSE | _PAGE_PRESENT));
+}
+
+/* PMD  - Level 2 access */
+#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PTE_MASK))
+#define pmd_page(pmd)		(pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
+
+/*
+ * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
+ *
+ * this macro returns the index of the entry in the pmd page which would
+ * control the given virtual address
+ */
+#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
+
+static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
+{
+	return __pmd((((unsigned long long)page_nr << PAGE_SHIFT) |
+		      pgprot_val(pgprot)) & __supported_pte_mask);
+}
+
+#ifndef __PAGETABLE_PMD_FOLDED
+/* Find an entry in the second-level page table.. */
+#define pmd_offset(dir, address)		\
+	((pmd_t *) pud_page_vaddr(*(dir)) + pmd_index(address))
+
+#define pmd_pfn(x)  ((pmd_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
+
+#endif	/* PAGETABLE_PMD_FOLDED */
+
+/* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
+#define pmd_none(x)	(!(unsigned long)pmd_val(x))
+#define pmd_present(x)	(pmd_val(x) & _PAGE_PRESENT)
+
+/*
+ * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
+ *
+ * this macro returns the index of the entry in the pte page which would
+ * control the given virtual address
+ */
+#define pte_index(address)					\
+	(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+#define pte_offset_kernel(dir, address)					\
+	((pte_t *) pmd_page_vaddr(*(dir)) +  pte_index(address))
+
+#define pte_none(x)	(!pte_val(x))
+#define pte_present(x)	(pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
+
+#define pages_to_mb(x)	((unsigned long)((x) >> (20-PAGE_SHIFT)))
+#define pte_page(x)	pfn_to_page(pte_pfn(x))
+#define pte_pfn(x)	((unsigned long)((pte_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT))
+
+static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
+{
+	pteval_t pte;
+	pte = (page_nr << PAGE_SHIFT);
+	pte |= pgprot_val(pgprot);
+	pte &= __supported_pte_mask;
+	return __pte(pte);
+}
+
+static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
+{
+	pte_t pte = native_ptep_get_and_clear(ptep);
+	pte_update(mm, addr, ptep);
+	return pte;
+}
+
+static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
+{
+	pte_t pte;
+	if (full) {
+		/*
+		 * Full address destruction in progress; paravirt does not
+		 * care about updates and native needs no locking
+		 */
+		pte = native_local_ptep_get_and_clear(ptep);
+	} else {
+		pte = ptep_get_and_clear(mm, addr, ptep);
+	}
+	return pte;
+}
+
+
+#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
+#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
+
+#include <asm-generic/pgtable.h>
+
+#endif	/* __ASSEMBLY__ */
+#endif	/* _ASM_X86_PGTABLE_H */
===================================================================
--- a/include/asm-x86/pgtable_32.h
+++ b/include/asm-x86/pgtable_32.h
@@ -25,12 +25,6 @@ struct mm_struct;
 struct mm_struct;
 struct vm_area_struct;
 
-/*
- * ZERO_PAGE is a global shared page that is always zero: used
- * for zero-mapped memory areas etc..
- */
-#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
-extern unsigned long empty_zero_page[1024];
 extern pgd_t swapper_pg_dir[1024];
 extern struct kmem_cache *pmd_cache;
 extern spinlock_t pgd_lock;
@@ -39,8 +33,8 @@ void check_pgt_cache(void);
 
 void pmd_ctor(struct kmem_cache *, void *);
 void pgtable_cache_init(void);
-void paging_init(void);
 
+extern unsigned long long __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
 
 /*
  * The Linux x86 paging architecture is 'compile-time dual-mode', it
@@ -49,20 +43,9 @@ void paging_init(void);
  */
 #ifdef CONFIG_X86_PAE
 # include <asm/pgtable-3level-defs.h>
-# define PMD_SIZE	(1UL << PMD_SHIFT)
-# define PMD_MASK	(~(PMD_SIZE-1))
 #else
 # include <asm/pgtable-2level-defs.h>
 #endif
-
-#define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
-#define PGDIR_MASK	(~(PGDIR_SIZE-1))
-
-#define USER_PTRS_PER_PGD	(TASK_SIZE/PGDIR_SIZE)
-#define FIRST_USER_ADDRESS	0
-
-#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
-#define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
 
 #define TWOLEVEL_PGDIR_SHIFT	22
 #define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
@@ -85,113 +68,6 @@ void paging_init(void);
 #endif
 
 /*
- * _PAGE_PSE set in the page directory entry just means that
- * the page directory entry points directly to a 4MB-aligned block of
- * memory. 
- */
-#define _PAGE_BIT_PRESENT	0
-#define _PAGE_BIT_RW		1
-#define _PAGE_BIT_USER		2
-#define _PAGE_BIT_PWT		3
-#define _PAGE_BIT_PCD		4
-#define _PAGE_BIT_ACCESSED	5
-#define _PAGE_BIT_DIRTY		6
-#define _PAGE_BIT_PSE		7	/* 4 MB (or 2MB) page, Pentium+, if present.. */
-#define _PAGE_BIT_GLOBAL	8	/* Global TLB entry PPro+ */
-#define _PAGE_BIT_UNUSED1	9	/* available for programmer */
-#define _PAGE_BIT_UNUSED2	10
-#define _PAGE_BIT_UNUSED3	11
-#define _PAGE_BIT_NX		63
-
-#define _PAGE_PRESENT	0x001
-#define _PAGE_RW	0x002
-#define _PAGE_USER	0x004
-#define _PAGE_PWT	0x008
-#define _PAGE_PCD	0x010
-#define _PAGE_ACCESSED	0x020
-#define _PAGE_DIRTY	0x040
-#define _PAGE_PSE	0x080	/* 4 MB (or 2MB) page, Pentium+, if present.. */
-#define _PAGE_GLOBAL	0x100	/* Global TLB entry PPro+ */
-#define _PAGE_UNUSED1	0x200	/* available for programmer */
-#define _PAGE_UNUSED2	0x400
-#define _PAGE_UNUSED3	0x800
-
-/* If _PAGE_PRESENT is clear, we use these: */
-#define _PAGE_FILE	0x040	/* nonlinear file mapping, saved PTE; unset:swap */
-#define _PAGE_PROTNONE	0x080	/* if the user mapped it with PROT_NONE;
-				   pte_present gives true */
-#ifdef CONFIG_X86_PAE
-#define _PAGE_NX	(1ULL<<_PAGE_BIT_NX)
-#else
-#define _PAGE_NX	0
-#endif
-
-#define _PAGE_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
-#define _KERNPG_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
-#define _PAGE_CHG_MASK	(PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
-
-#define PAGE_NONE \
-	__pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
-#define PAGE_SHARED \
-	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
-
-#define PAGE_SHARED_EXEC \
-	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
-#define PAGE_COPY_NOEXEC \
-	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
-#define PAGE_COPY_EXEC \
-	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
-#define PAGE_COPY \
-	PAGE_COPY_NOEXEC
-#define PAGE_READONLY \
-	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
-#define PAGE_READONLY_EXEC \
-	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
-
-#define _PAGE_KERNEL \
-	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
-#define _PAGE_KERNEL_EXEC \
-	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
-
-extern unsigned long long __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
-#define __PAGE_KERNEL_RO		(__PAGE_KERNEL & ~_PAGE_RW)
-#define __PAGE_KERNEL_RX		(__PAGE_KERNEL_EXEC & ~_PAGE_RW)
-#define __PAGE_KERNEL_NOCACHE		(__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
-#define __PAGE_KERNEL_LARGE		(__PAGE_KERNEL | _PAGE_PSE)
-#define __PAGE_KERNEL_LARGE_EXEC	(__PAGE_KERNEL_EXEC | _PAGE_PSE)
-
-#define PAGE_KERNEL		__pgprot(__PAGE_KERNEL)
-#define PAGE_KERNEL_RO		__pgprot(__PAGE_KERNEL_RO)
-#define PAGE_KERNEL_EXEC	__pgprot(__PAGE_KERNEL_EXEC)
-#define PAGE_KERNEL_RX		__pgprot(__PAGE_KERNEL_RX)
-#define PAGE_KERNEL_NOCACHE	__pgprot(__PAGE_KERNEL_NOCACHE)
-#define PAGE_KERNEL_LARGE	__pgprot(__PAGE_KERNEL_LARGE)
-#define PAGE_KERNEL_LARGE_EXEC	__pgprot(__PAGE_KERNEL_LARGE_EXEC)
-
-/*
- * The i386 can't do page protection for execute, and considers that
- * the same are read. Also, write permissions imply read permissions.
- * This is the closest we can get..
- */
-#define __P000	PAGE_NONE
-#define __P001	PAGE_READONLY
-#define __P010	PAGE_COPY
-#define __P011	PAGE_COPY
-#define __P100	PAGE_READONLY_EXEC
-#define __P101	PAGE_READONLY_EXEC
-#define __P110	PAGE_COPY_EXEC
-#define __P111	PAGE_COPY_EXEC
-
-#define __S000	PAGE_NONE
-#define __S001	PAGE_READONLY
-#define __S010	PAGE_SHARED
-#define __S011	PAGE_SHARED
-#define __S100	PAGE_READONLY_EXEC
-#define __S101	PAGE_READONLY_EXEC
-#define __S110	PAGE_SHARED_EXEC
-#define __S111	PAGE_SHARED_EXEC
-
-/*
  * Define this if things work differently on an i386 and an i486:
  * it will (on an i486) warn about kernel memory accesses that are
  * done without a 'access_ok(VERIFY_WRITE,..)'
@@ -201,37 +77,6 @@ extern unsigned long long __PAGE_KERNEL,
 /* The boot page tables (all created as a single array) */
 extern unsigned long pg0[];
 
-#define pte_present(x)	((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
-
-/* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
-#define pmd_none(x)	(!(unsigned long)pmd_val(x))
-#define pmd_present(x)	(pmd_val(x) & _PAGE_PRESENT)
-#define	pmd_bad(x)	((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
-
-
-#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
-
-/*
- * The following only work if pte_present() is true.
- * Undefined behaviour if not..
- */
-static inline int pte_dirty(pte_t pte)		{ return (pte).pte_low & _PAGE_DIRTY; }
-static inline int pte_young(pte_t pte)		{ return (pte).pte_low & _PAGE_ACCESSED; }
-static inline int pte_write(pte_t pte)		{ return (pte).pte_low & _PAGE_RW; }
-static inline int pte_huge(pte_t pte)		{ return (pte).pte_low & _PAGE_PSE; }
-
-/*
- * The following only works if pte_present() is not true.
- */
-static inline int pte_file(pte_t pte)		{ return (pte).pte_low & _PAGE_FILE; }
-
-static inline pte_t pte_mkclean(pte_t pte)	{ (pte).pte_low &= ~_PAGE_DIRTY; return pte; }
-static inline pte_t pte_mkold(pte_t pte)	{ (pte).pte_low &= ~_PAGE_ACCESSED; return pte; }
-static inline pte_t pte_wrprotect(pte_t pte)	{ (pte).pte_low &= ~_PAGE_RW; return pte; }
-static inline pte_t pte_mkdirty(pte_t pte)	{ (pte).pte_low |= _PAGE_DIRTY; return pte; }
-static inline pte_t pte_mkyoung(pte_t pte)	{ (pte).pte_low |= _PAGE_ACCESSED; return pte; }
-static inline pte_t pte_mkwrite(pte_t pte)	{ (pte).pte_low |= _PAGE_RW; return pte; }
-static inline pte_t pte_mkhuge(pte_t pte)	{ (pte).pte_low |= _PAGE_PSE; return pte; }
 
 #ifdef CONFIG_X86_PAE
 # include <asm/pgtable-3level.h>
@@ -307,30 +152,6 @@ static inline pte_t native_local_ptep_ge
 	__young;							\
 })
 
-#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
-static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
-{
-	pte_t pte = native_ptep_get_and_clear(ptep);
-	pte_update(mm, addr, ptep);
-	return pte;
-}
-
-#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
-static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
-{
-	pte_t pte;
-	if (full) {
-		/*
-		 * Full address destruction in progress; paravirt does not
-		 * care about updates and native needs no locking
-		 */
-		pte = native_local_ptep_get_and_clear(ptep);
-	} else {
-		pte = ptep_get_and_clear(mm, addr, ptep);
-	}
-	return pte;
-}
-
 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
@@ -365,27 +186,6 @@ static inline void clone_pgd_range(pgd_t
  * and a page entry and page directory to the page they refer to.
  */
 
-#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))
-
-static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
-{
-	pte.pte_low &= _PAGE_CHG_MASK;
-	pte.pte_low |= pgprot_val(newprot);
-#ifdef CONFIG_X86_PAE
-	/*
-	 * Chop off the NX bit (if present), and add the NX portion of
-	 * the newprot (if present):
-	 */
-	pte.pte_high &= ~(1 << (_PAGE_BIT_NX - 32));
-	pte.pte_high |= (pgprot_val(newprot) >> 32) & \
-					(__supported_pte_mask >> 32);
-#endif
-	return pte;
-}
-
-#define pmd_large(pmd) \
-((pmd_val(pmd) & (_PAGE_PSE|_PAGE_PRESENT)) == (_PAGE_PSE|_PAGE_PRESENT))
-
 /*
  * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
  *
@@ -406,31 +206,6 @@ static inline pte_t pte_modify(pte_t pte
  * of a process's
  */
 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
-
-/*
- * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
- *
- * this macro returns the index of the entry in the pmd page which would
- * control the given virtual address
- */
-#define pmd_index(address) \
-		(((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
-
-/*
- * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
- *
- * this macro returns the index of the entry in the pte page which would
- * control the given virtual address
- */
-#define pte_index(address) \
-		(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
-#define pte_offset_kernel(dir, address) \
-	((pte_t *) pmd_page_vaddr(*(dir)) +  pte_index(address))
-
-#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
-
-#define pmd_page_vaddr(pmd) \
-		((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
 
 /*
  * Helper function that returns the kernel pagetable entry controlling
@@ -510,6 +285,4 @@ static inline void paravirt_pagetable_se
 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)		\
 		remap_pfn_range(vma, vaddr, pfn, size, prot)
 
-#include <asm-generic/pgtable.h>
-
 #endif /* _I386_PGTABLE_H */
===================================================================
--- a/include/asm-x86/pgtable_64.h
+++ b/include/asm-x86/pgtable_64.h
@@ -21,17 +21,14 @@ extern unsigned long __supported_pte_mas
 
 #define swapper_pg_dir init_level4_pgt
 
-extern void paging_init(void);
 extern void clear_kernel_mapping(unsigned long addr, unsigned long size);
 
-/*
- * ZERO_PAGE is a global shared page that is always zero: used
- * for zero-mapped memory areas etc..
- */
-extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)];
-#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
+#endif /* !__ASSEMBLY__ */
 
-#endif /* !__ASSEMBLY__ */
+#define __PAGE_KERNEL \
+	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX | _PAGE_GLOBAL)
+#define __PAGE_KERNEL_EXEC \
+	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
 
 /*
  * PGDIR_SHIFT determines what a top-level page table entry can map
@@ -71,51 +68,71 @@ extern unsigned long empty_zero_page[PAG
 #define pgd_none(x)	(!pgd_val(x))
 #define pud_none(x)	(!pud_val(x))
 
-static inline void set_pte(pte_t *dst, pte_t val)
+struct mm_struct;
+
+static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *xp)
 {
-	*dst = val;
-} 
-#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
-
-static inline void set_pmd(pmd_t *dst, pmd_t val)
-{
-        *dst = val;
-} 
-
-static inline void set_pud(pud_t *dst, pud_t val)
-{
-	*dst = val;
+	*xp = native_make_pte(0);
 }
 
-static inline void pud_clear (pud_t *pud)
+/* local pte updates need not use xchg for locking */
+static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
 {
-	set_pud(pud, __pud(0));
+	pte_t res = *ptep;
+
+	/* Pure native function needs no input for mm, addr */
+	native_pte_clear(NULL, 0, ptep);
+	return res;
 }
 
-static inline void set_pgd(pgd_t *dst, pgd_t val)
+static inline pte_t native_ptep_get_and_clear(pte_t *xp)
 {
-	*dst = val;
-} 
-
-static inline void pgd_clear (pgd_t * pgd)
-{
-	set_pgd(pgd, __pgd(0));
+#ifdef CONFIG_SMP
+	return native_make_pte(xchg(&xp->pte, 0));
+#else
+	return native_local_ptep_get_and_clear(xp);
+#endif
 }
 
-#define ptep_get_and_clear(mm,addr,xp)	__pte(xchg(&(xp)->pte, 0))
+static inline void native_set_pte(pte_t *ptep , pte_t pte)
+{
+	*ptep = pte;
+}
 
-struct mm_struct;
+static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
+				     pte_t *ptep , pte_t pte)
+{
+	native_set_pte(ptep, pte);
+}
 
-static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
+static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
 {
-	pte_t pte;
-	if (full) {
-		pte = *ptep;
-		*ptep = __pte(0);
-	} else {
-		pte = ptep_get_and_clear(mm, addr, ptep);
-	}
-	return pte;
+	*pmdp = pmd;
+}
+
+static inline void native_pmd_clear(pmd_t *pmd)
+{
+	native_set_pmd(pmd, native_make_pmd(0));
+}
+
+static inline void native_set_pud(pud_t *pudp, pud_t pud)
+{
+	*pudp = pud;
+}
+
+static inline void native_pud_clear(pud_t *pud)
+{
+	native_set_pud(pud, native_make_pud(0));
+}
+
+static inline void native_set_pgd(pgd_t *pgdp, pgd_t pgd)
+{
+	*pgdp = pgd;
+}
+
+static inline void native_pgd_clear(pgd_t * pgd)
+{
+	native_set_pgd(pgd, native_make_pgd(0));
 }
 
 #define pte_same(a, b)		((a).pte == (b).pte)
@@ -124,16 +141,6 @@ static inline pte_t ptep_get_and_clear_f
 
 #endif /* !__ASSEMBLY__ */
 
-#define PMD_SIZE	(_AC(1,UL) << PMD_SHIFT)
-#define PMD_MASK	(~(PMD_SIZE-1))
-#define PUD_SIZE	(_AC(1,UL) << PUD_SHIFT)
-#define PUD_MASK	(~(PUD_SIZE-1))
-#define PGDIR_SIZE	(_AC(1,UL) << PGDIR_SHIFT)
-#define PGDIR_MASK	(~(PGDIR_SIZE-1))
-
-#define USER_PTRS_PER_PGD	((TASK_SIZE-1)/PGDIR_SIZE+1)
-#define FIRST_USER_ADDRESS	0
-
 #define MAXMEM		 _AC(0x3fffffffffff, UL)
 #define VMALLOC_START    _AC(0xffffc20000000000, UL)
 #define VMALLOC_END      _AC(0xffffe1ffffffffff, UL)
@@ -141,150 +148,6 @@ static inline pte_t ptep_get_and_clear_f
 #define MODULES_VADDR    _AC(0xffffffff88000000, UL)
 #define MODULES_END      _AC(0xfffffffffff00000, UL)
 #define MODULES_LEN   (MODULES_END - MODULES_VADDR)
-
-#define _PAGE_BIT_PRESENT	0
-#define _PAGE_BIT_RW		1
-#define _PAGE_BIT_USER		2
-#define _PAGE_BIT_PWT		3
-#define _PAGE_BIT_PCD		4
-#define _PAGE_BIT_ACCESSED	5
-#define _PAGE_BIT_DIRTY		6
-#define _PAGE_BIT_PSE		7	/* 4 MB (or 2MB) page */
-#define _PAGE_BIT_FILE		6
-#define _PAGE_BIT_GLOBAL	8	/* Global TLB entry PPro+ */
-#define _PAGE_BIT_NX           63       /* No execute: only valid after cpuid check */
-
-#define _PAGE_PRESENT	(_AC(1, UL)<<_PAGE_BIT_PRESENT)
-#define _PAGE_RW	(_AC(1, UL)<<_PAGE_BIT_RW)
-#define _PAGE_USER	(_AC(1, UL)<<_PAGE_BIT_USER)
-#define _PAGE_PWT	(_AC(1, UL)<<_PAGE_BIT_PWT)
-#define _PAGE_PCD	(_AC(1, UL)<<_PAGE_BIT_PCD)
-#define _PAGE_ACCESSED	(_AC(1, UL)<<_PAGE_BIT_ACCESSED)
-#define _PAGE_DIRTY	(_AC(1, UL)<<_PAGE_BIT_DIRTY)
-/* 2MB page */
-#define _PAGE_PSE	(_AC(1, UL)<<_PAGE_BIT_PSE)
-/* nonlinear file mapping, saved PTE; unset:swap */
-#define _PAGE_FILE	(_AC(1, UL)<<_PAGE_BIT_FILE)
-/* Global TLB entry */
-#define _PAGE_GLOBAL	(_AC(1, UL)<<_PAGE_BIT_GLOBAL)
-
-#define _PAGE_PROTNONE	0x080	/* If not present */
-#define _PAGE_NX        (_AC(1, UL)<<_PAGE_BIT_NX)
-
-#define _PAGE_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
-#define _KERNPG_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
-
-#define _PAGE_CHG_MASK	(PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
-
-#define PAGE_NONE	__pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
-#define PAGE_SHARED	__pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
-#define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
-#define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
-#define PAGE_COPY PAGE_COPY_NOEXEC
-#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
-#define PAGE_READONLY	__pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_NX)
-#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
-#define __PAGE_KERNEL \
-	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
-#define __PAGE_KERNEL_EXEC \
-	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
-#define __PAGE_KERNEL_NOCACHE \
-	(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_PCD | _PAGE_PWT | _PAGE_ACCESSED | _PAGE_NX)
-#define __PAGE_KERNEL_RO \
-	(_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_NX)
-#define __PAGE_KERNEL_VSYSCALL \
-	(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
-#define __PAGE_KERNEL_VSYSCALL_NOCACHE \
-	(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_PCD | _PAGE_PWT)
-#define __PAGE_KERNEL_LARGE \
-	(__PAGE_KERNEL | _PAGE_PSE)
-#define __PAGE_KERNEL_LARGE_EXEC \
-	(__PAGE_KERNEL_EXEC | _PAGE_PSE)
-
-#define MAKE_GLOBAL(x) __pgprot((x) | _PAGE_GLOBAL)
-
-#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
-#define PAGE_KERNEL_EXEC MAKE_GLOBAL(__PAGE_KERNEL_EXEC)
-#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
-#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
-#define PAGE_KERNEL_VSYSCALL32 __pgprot(__PAGE_KERNEL_VSYSCALL)
-#define PAGE_KERNEL_VSYSCALL MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL)
-#define PAGE_KERNEL_LARGE MAKE_GLOBAL(__PAGE_KERNEL_LARGE)
-#define PAGE_KERNEL_VSYSCALL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL_NOCACHE)
-
-/*         xwr */
-#define __P000	PAGE_NONE
-#define __P001	PAGE_READONLY
-#define __P010	PAGE_COPY
-#define __P011	PAGE_COPY
-#define __P100	PAGE_READONLY_EXEC
-#define __P101	PAGE_READONLY_EXEC
-#define __P110	PAGE_COPY_EXEC
-#define __P111	PAGE_COPY_EXEC
-
-#define __S000	PAGE_NONE
-#define __S001	PAGE_READONLY
-#define __S010	PAGE_SHARED
-#define __S011	PAGE_SHARED
-#define __S100	PAGE_READONLY_EXEC
-#define __S101	PAGE_READONLY_EXEC
-#define __S110	PAGE_SHARED_EXEC
-#define __S111	PAGE_SHARED_EXEC
-
-#ifndef __ASSEMBLY__
-
-static inline unsigned long pgd_bad(pgd_t pgd)
-{
-	return pgd_val(pgd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
-}
-
-static inline unsigned long pud_bad(pud_t pud)
-{
-	return pud_val(pud) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
-}
-
-static inline unsigned long pmd_bad(pmd_t pmd)
-{
-	return pmd_val(pmd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER);
-}
-
-#define pte_none(x)	(!pte_val(x))
-#define pte_present(x)	(pte_val(x) & (_PAGE_PRESENT | _PAGE_PROTNONE))
-#define pte_clear(mm,addr,xp)	do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
-
-#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))	/* FIXME: is this right? */
-#define pte_page(x)	pfn_to_page(pte_pfn(x))
-#define pte_pfn(x)  ((pte_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
-
-static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
-{
-	pteval_t pte;
-	pte = (page_nr << PAGE_SHIFT);
-	pte |= pgprot_val(pgprot);
-	pte &= __supported_pte_mask;
-	return __pte(pte);
-}
-
-/*
- * The following only work if pte_present() is true.
- * Undefined behaviour if not..
- */
-#define __LARGE_PTE (_PAGE_PSE|_PAGE_PRESENT)
-static inline int pte_dirty(pte_t pte)		{ return pte_val(pte) & _PAGE_DIRTY; }
-static inline int pte_young(pte_t pte)		{ return pte_val(pte) & _PAGE_ACCESSED; }
-static inline int pte_write(pte_t pte)		{ return pte_val(pte) & _PAGE_RW; }
-static inline int pte_file(pte_t pte)		{ return pte_val(pte) & _PAGE_FILE; }
-static inline int pte_huge(pte_t pte)		{ return pte_val(pte) & _PAGE_PSE; }
-
-static inline pte_t pte_mkclean(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
-static inline pte_t pte_mkold(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
-static inline pte_t pte_wrprotect(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
-static inline pte_t pte_mkexec(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_NX)); return pte; }
-static inline pte_t pte_mkdirty(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
-static inline pte_t pte_mkyoung(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
-static inline pte_t pte_mkwrite(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
-static inline pte_t pte_mkhuge(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_PSE)); return pte; }
-static inline pte_t pte_clrhuge(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_PSE)); return pte; }
 
 struct vm_area_struct;
 
@@ -300,15 +163,11 @@ static inline void ptep_set_wrprotect(st
 	clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
 }
 
+#ifndef __ASSEMBLY__
 /*
  * Macro to mark a page protection value as "uncacheable".
  */
 #define pgprot_noncached(prot)	(__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT))
-
-static inline int pmd_large(pmd_t pte) { 
-	return (pmd_val(pte) & __LARGE_PTE) == __LARGE_PTE; 
-} 	
-
 
 /*
  * Conversion functions: convert a page and protection to a page entry,
@@ -326,7 +185,7 @@ static inline int pmd_large(pmd_t pte) {
 #define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT)
 #define mk_kernel_pgd(address) ((pgd_t){ (address) | _KERNPG_TABLE })
 
-/* PUD - Level3 access */
+/* PUD - Level 3 access */
 /* to find an entry in a page-table-directory. */
 #define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
 #define pud_page(pud)		(pfn_to_page(pud_val(pud) >> PAGE_SHIFT))
@@ -341,36 +200,14 @@ static inline int pmd_large(pmd_t pte) {
 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
 #define pmd_offset(dir, address) ((pmd_t *) pud_page_vaddr(*(dir)) + \
 			pmd_index(address))
-#define pmd_none(x)	(!pmd_val(x))
 #define pmd_present(x)	(pmd_val(x) & _PAGE_PRESENT)
-#define pmd_clear(xp)	do { set_pmd(xp, __pmd(0)); } while (0)
-#define pfn_pmd(nr,prot) (__pmd(((nr) << PAGE_SHIFT) | pgprot_val(prot)))
-#define pmd_pfn(x)  ((pmd_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
 
 #define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
 #define pgoff_to_pte(off) ((pte_t) { ((off) << PAGE_SHIFT) | _PAGE_FILE })
 #define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT
 
 /* PTE - Level 1 access. */
-
-/* page, protection -> pte */
-#define mk_pte(page, pgprot)	pfn_pte(page_to_pfn(page), (pgprot))
  
-/* Change flags of a PTE */
-static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
-{ 
-	pteval_t val = pte_val(pte);
-	val &= _PAGE_CHG_MASK;
-	val |= pgprot_val(newprot);
-	val &= __supported_pte_mask;
-	return __pte(val);
-}
-
-#define pte_index(address) \
-		(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
-#define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \
-			pte_index(address))
-
 /* x86-64 always has all page tables mapped. */
 #define pte_offset_map(dir,address) pte_offset_kernel(dir,address)
 #define pte_offset_map_nested(dir,address) pte_offset_kernel(dir,address)
@@ -427,11 +264,9 @@ pte_t *lookup_address(unsigned long addr
    (((o) & (1UL << (__VIRTUAL_MASK_SHIFT-1))) ? ((o) | (~__VIRTUAL_MASK)) : (o))
 
 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
-#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
-#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
 #define __HAVE_ARCH_PTE_SAME
-#include <asm-generic/pgtable.h>
+
 #endif /* !__ASSEMBLY__ */
 
 #endif /* _X86_64_PGTABLE_H */

-- 

[PATCH 3/5] x86: fix up formatting in pgtable*.h

[Jeremy Fitzhardinge]

[-- Attachment #1: x86-normalize-pgtable-formatting.patch --]
[-- Type: text/plain, Size: 11500 bytes --]

Fix up various pieces of unconventional formatting in
asm-x86/pgtable*.h.  In some cases, the old formatting was arguablly
clearer with a wide enough terminal, but this patch gives the option
of using a more standard form.

Signed-off-by: Jeremy Fitzhardinge <Jeremy.Fitzhardinge@citrix.com>
---
 include/asm-x86/paravirt.h       |    5 ++
 include/asm-x86/pgtable-2level.h |   40 ++++++++++------
 include/asm-x86/pgtable-3level.h |   27 ++++++-----
 include/asm-x86/pgtable.h        |   91 ++++++++++++++++++++++++++++++++------
 include/asm-x86/pgtable_64.h     |   20 +++++---
 5 files changed, 136 insertions(+), 47 deletions(-)

===================================================================
--- a/include/asm-x86/paravirt.h
+++ b/include/asm-x86/paravirt.h
@@ -947,6 +947,11 @@ static inline void set_pte_at(struct mm_
 	PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pteval.pte_low);
 }
 
+static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
+{
+	set_pte_at(mm, addr, ptep, __pte(0));
+}
+
 static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
 {
 	PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, pmdval.pud.pgd.pgd);
===================================================================
--- a/include/asm-x86/pgtable-2level.h
+++ b/include/asm-x86/pgtable-2level.h
@@ -28,26 +28,37 @@ static inline void native_set_pmd(pmd_t 
 }
 
 #undef set_pte_atomic
-#define set_pte_atomic(pteptr, pteval) set_pte(pteptr,pteval)
-#define set_pte_present(mm,addr,ptep,pteval) set_pte_at(mm,addr,ptep,pteval)
-
-#define pte_clear(mm,addr,xp)	do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
-#undef pmd_clear
-#define pmd_clear(xp)	do { set_pmd(xp, __pmd(0)); } while (0)
-
-static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *xp)
+static inline void set_pte_atomic(pte_t *ptep, pte_t pteval)
 {
-	*xp = __pte(0);
+	set_pte(ptep, pteval);
 }
 
-#ifdef CONFIG_SMP
+static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
+				   pte_t *ptep, pte_t pteval)
+{
+	set_pte_at(mm, addr, ptep, pteval);
+}
+
+static inline void native_pte_clear(struct mm_struct *mm,
+				    unsigned long addr, pte_t *ptep)
+{
+	set_pte_at(mm, addr, ptep, __pte(0));
+}
+
+#undef pmd_clear
+static inline void pmd_clear(pmd_t *pmdp)
+{
+	set_pmd(pmdp, __pmd(0));
+}
+
 static inline pte_t native_ptep_get_and_clear(pte_t *xp)
 {
+#ifdef CONFIG_SMP
 	return __pte(xchg(&xp->pte_low, 0));
+#else
+	return native_local_ptep_get_and_clear(xp);
+#endif
 }
-#else
-#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
-#endif
 
 /*
  * All present pages are kernel-executable:
@@ -68,7 +79,8 @@ static inline int pte_exec_kernel(pte_t 
 /* Encode and de-code a swap entry */
 #define __swp_type(x)			(((x).val >> 1) & 0x1f)
 #define __swp_offset(x)			((x).val >> 8)
-#define __swp_entry(type, offset)	((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
+#define __swp_entry(type, offset)	\
+	((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
 #define __pte_to_swp_entry(pte)		((swp_entry_t) { (pte).pte_low })
 #define __swp_entry_to_pte(x)		((pte_t) { (x).val })
 
===================================================================
--- a/include/asm-x86/pgtable-3level.h
+++ b/include/asm-x86/pgtable-3level.h
@@ -9,7 +9,8 @@
  */
 
 #define pte_ERROR(e) \
-	printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, &(e), (e).pte_high, (e).pte_low)
+	printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__,	\
+	       &(e), (e).pte_high, (e).pte_low)
 #define pmd_ERROR(e) \
 	printk("%s:%d: bad pmd %p(%016Lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
 #define pgd_ERROR(e) \
@@ -39,6 +40,7 @@ static inline void native_set_pte(pte_t 
 	smp_wmb();
 	ptep->pte_low = pte.pte_low;
 }
+
 static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
 				     pte_t *ptep , pte_t pte)
 {
@@ -65,10 +67,12 @@ static inline void native_set_pte_atomic
 {
 	set_64bit((unsigned long long *)(ptep),native_pte_val(pte));
 }
+
 static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
 {
 	set_64bit((unsigned long long *)(pmdp),native_pmd_val(pmd));
 }
+
 static inline void native_set_pud(pud_t *pudp, pud_t pud)
 {
 	*pudp = pud;
@@ -79,7 +83,8 @@ static inline void native_set_pud(pud_t 
  * entry, so clear the bottom half first and enforce ordering with a compiler
  * barrier.
  */
-static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
+static inline void native_pte_clear(struct mm_struct *mm,
+				    unsigned long addr, pte_t *ptep)
 {
 	ptep->pte_low = 0;
 	smp_wmb();
@@ -100,30 +105,30 @@ static inline void native_pmd_clear(pmd_
  * We do not let the generic code free and clear pgd entries due to
  * this erratum.
  */
-static inline void pud_clear (pud_t * pud) { }
+static inline void pud_clear(pud_t * pud) { }
 
-#define pud_page(pud) \
-((struct page *) __va(pud_val(pud) & PAGE_MASK))
+#define pud_page(pud)					\
+	((struct page *) __va(pud_val(pud) & PAGE_MASK))
 
-#define pud_page_vaddr(pud) \
-((unsigned long) __va(pud_val(pud) & PAGE_MASK))
+#define pud_page_vaddr(pud)				\
+	((unsigned long) __va(pud_val(pud) & PAGE_MASK))
 
 
-#ifdef CONFIG_SMP
 static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
 {
 	pte_t res;
 
+#ifdef CONFIG_SMP
 	/* xchg acts as a barrier before the setting of the high bits */
 	res.pte_low = xchg(&ptep->pte_low, 0);
 	res.pte_high = ptep->pte_high;
 	ptep->pte_high = 0;
+#else
+	res = native_local_ptep_get_and_clear(xp);
+#endif
 
 	return res;
 }
-#else
-#define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
-#endif
 
 #define __HAVE_ARCH_PTE_SAME
 static inline int pte_same(pte_t a, pte_t b)
===================================================================
--- a/include/asm-x86/pgtable.h
+++ b/include/asm-x86/pgtable.h
@@ -67,11 +67,30 @@ void paging_init(void);
  * The following only work if pte_present() is true.
  * Undefined behaviour if not..
  */
-static inline int pte_dirty(pte_t pte)		{ return pte_val(pte) & _PAGE_DIRTY; }
-static inline int pte_young(pte_t pte)		{ return pte_val(pte) & _PAGE_ACCESSED; }
-static inline int pte_write(pte_t pte)		{ return pte_val(pte) & _PAGE_RW; }
-static inline int pte_file(pte_t pte)		{ return pte_val(pte) & _PAGE_FILE; }
-static inline int pte_huge(pte_t pte)		{ return pte_val(pte) & _PAGE_PSE; }
+static inline int pte_dirty(pte_t pte)
+{
+	return pte_val(pte) & _PAGE_DIRTY;
+}
+
+static inline int pte_young(pte_t pte)
+{
+	return pte_val(pte) & _PAGE_ACCESSED;
+}
+
+static inline int pte_write(pte_t pte)
+{
+	return pte_val(pte) & _PAGE_RW;
+}
+
+static inline int pte_file(pte_t pte)
+{
+	return pte_val(pte) & _PAGE_FILE;
+}
+
+static inline int pte_huge(pte_t pte)
+{
+	return pte_val(pte) & _PAGE_PSE;
+}
 
 #endif	/* __ASSEMBLY__ */
 
@@ -213,15 +232,59 @@ static inline int pte_huge(pte_t pte)		{
 
 #ifndef __ASSEMBLY__
 
-static inline pte_t pte_mkclean(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
-static inline pte_t pte_mkold(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
-static inline pte_t pte_wrprotect(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
-static inline pte_t pte_mkexec(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_NX)); return pte; }
-static inline pte_t pte_mkdirty(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
-static inline pte_t pte_mkyoung(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
-static inline pte_t pte_mkwrite(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
-static inline pte_t pte_mkhuge(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_PSE)); return pte; }
-static inline pte_t pte_clrhuge(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_PSE)); return pte; }
+static inline pte_t pte_mkclean(pte_t pte)
+{
+	set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY));
+	return pte;
+}
+
+static inline pte_t pte_mkold(pte_t pte)
+{
+	set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED));
+	return pte;
+}
+
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+	set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW));
+	return pte;
+}
+
+static inline pte_t pte_mkexec(pte_t pte)
+{
+	set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_NX));
+	return pte;
+}
+
+static inline pte_t pte_mkdirty(pte_t pte)
+{
+	set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY));
+	return pte;
+}
+
+static inline pte_t pte_mkyoung(pte_t pte)
+{
+	set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED));
+	return pte;
+}
+
+static inline pte_t pte_mkwrite(pte_t pte)
+{
+	set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW));
+	return pte;
+}
+
+static inline pte_t pte_mkhuge(pte_t pte)
+{
+	set_pte(&pte, __pte(pte_val(pte) | _PAGE_PSE));
+	return pte;
+}
+
+static inline pte_t pte_clrhuge(pte_t pte)
+{
+	set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_PSE));
+	return pte;
+}
 
 #ifndef __PAGETABLE_PUD_FOLDED
 static inline bool pgd_bad(pgd_t pgd)
===================================================================
--- a/include/asm-x86/pgtable_64.h
+++ b/include/asm-x86/pgtable_64.h
@@ -178,7 +178,8 @@ static inline void ptep_set_wrprotect(st
 /*
  * Level 4 access.
  */
-#define pgd_page_vaddr(pgd) ((unsigned long) __va((unsigned long)pgd_val(pgd) & PTE_MASK))
+#define pgd_page_vaddr(pgd)	\
+	((unsigned long) __va((unsigned long)pgd_val(pgd) & PTE_MASK))
 #define pgd_page(pgd)		(pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT))
 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
 #define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr))
@@ -188,11 +189,13 @@ static inline void ptep_set_wrprotect(st
 
 /* PUD - Level 3 access */
 /* to find an entry in a page-table-directory. */
-#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
+#define pud_page_vaddr(pud)	((unsigned long) __va(pud_val(pud) & PHYSICAL_PAGE_MASK))
 #define pud_page(pud)		(pfn_to_page(pud_val(pud) >> PAGE_SHIFT))
-#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
-#define pud_offset(pgd, address) ((pud_t *) pgd_page_vaddr(*(pgd)) + pud_index(address))
-#define pud_present(pud) (pud_val(pud) & _PAGE_PRESENT)
+#define pud_index(address)	\
+	(((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
+#define pud_offset(pgd, address)	\
+	((pud_t *) pgd_page_vaddr(*(pgd)) + pud_index(address))
+#define pud_present(pud)	(pud_val(pud) & _PAGE_PRESENT)
 
 /* PMD  - Level 2 access */
 #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PTE_MASK))
@@ -236,7 +239,8 @@ static inline void ptep_set_wrprotect(st
 /* Encode and de-code a swap entry */
 #define __swp_type(x)			(((x).val >> 1) & 0x3f)
 #define __swp_offset(x)			((x).val >> 8)
-#define __swp_entry(type, offset)	((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
+#define __swp_entry(type, offset)	\
+	((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
 #define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })
 #define __swp_entry_to_pte(x)		((pte_t) { (x).val })
 
@@ -247,8 +251,8 @@ extern int kern_addr_valid(unsigned long
 
 pte_t *lookup_address(unsigned long addr);
 
-#define io_remap_pfn_range(vma, vaddr, pfn, size, prot)		\
-		remap_pfn_range(vma, vaddr, pfn, size, prot)
+#define io_remap_pfn_range(vma, vaddr, pfn, size, prot)	\
+	remap_pfn_range(vma, vaddr, pfn, size, prot)
 
 #define HAVE_ARCH_UNMAPPED_AREA
 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN

-- 

[PATCH 4/5] x86: use a uniform structure for pte_t

[Jeremy Fitzhardinge]

[-- Attachment #1: x86-use-pte-union.patch --]
[-- Type: text/plain, Size: 28848 bytes --]

Make pte_t have the same basic structure for all pagetable formats so
that it can be accessed in a uniform way.

This allows a number of follow-on opportunities for sharing code.

Signed-off-by: Jeremy Fitzhardinge <Jeremy.Fitzhardinge@citrix.com>
---
 arch/x86/kernel/efi_64.c              |    2 
 arch/x86/kernel/vmi_32.c              |   10 -
 arch/x86/mach-voyager/voyager_basic.c |    1 
 arch/x86/xen/mmu.c                    |    4 
 include/asm-x86/page.h                |   56 ++++------
 include/asm-x86/paravirt.h            |  157 +++++++++++++++++------------
 include/asm-x86/pgtable-2level.h      |   33 +++---
 include/asm-x86/pgtable-3level.h      |   17 +--
 include/asm-x86/pgtable.h             |  177 +++++++++++++++++++++++++++------
 include/asm-x86/pgtable_32.h          |   55 ----------
 include/asm-x86/pgtable_64.h          |   52 ++-------
 include/asm-x86/tlbflush.h            |    1 
 include/xen/page.h                    |    4 
 13 files changed, 313 insertions(+), 256 deletions(-)

===================================================================
--- a/arch/x86/kernel/efi_64.c
+++ b/arch/x86/kernel/efi_64.c
@@ -91,7 +91,7 @@ void __init efi_call_phys_prelog(void)
 	local_irq_save(efi_flags);
 	early_runtime_code_mapping_set_exec(1);
 	vaddress = (unsigned long)__va(0x0UL);
-	pgd_val(save_pgd) = pgd_val(*pgd_offset_k(0x0UL));
+	save_pgd = *pgd_offset_k(0x0UL);
 	set_pgd(pgd_offset_k(0x0UL), *pgd_offset_k(vaddress));
 	__flush_tlb_all();
 }
===================================================================
--- a/arch/x86/kernel/vmi_32.c
+++ b/arch/x86/kernel/vmi_32.c
@@ -475,10 +475,10 @@ static void vmi_set_pmd(pmd_t *pmdp, pmd
 static void vmi_set_pmd(pmd_t *pmdp, pmd_t pmdval)
 {
 #ifdef CONFIG_X86_PAE
-	const pte_t pte = { pmdval.pmd, pmdval.pmd >> 32 };
+	const pte_t pte = { .pte = pmdval.pmd };
 	vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PMD);
 #else
-	const pte_t pte = { pmdval.pud.pgd.pgd };
+	const pte_t pte = { .pte = pmdval.pud.pgd.pgd };
 	vmi_check_page_type(__pa(pmdp) >> PAGE_SHIFT, VMI_PAGE_PGD);
 #endif
 	vmi_ops.set_pte(pte, (pte_t *)pmdp, VMI_PAGE_PD);
@@ -508,21 +508,21 @@ static void vmi_set_pud(pud_t *pudp, pud
 static void vmi_set_pud(pud_t *pudp, pud_t pudval)
 {
 	/* Um, eww */
-	const pte_t pte = { pudval.pgd.pgd, pudval.pgd.pgd >> 32 };
+	const pte_t pte = { .pte = pudval.pgd.pgd };
 	vmi_check_page_type(__pa(pudp) >> PAGE_SHIFT, VMI_PAGE_PGD);
 	vmi_ops.set_pte(pte, (pte_t *)pudp, VMI_PAGE_PDP);
 }
 
 static void vmi_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 {
-	const pte_t pte = { 0 };
+	const pte_t pte = { .pte = 0 };
 	vmi_check_page_type(__pa(ptep) >> PAGE_SHIFT, VMI_PAGE_PTE);
 	vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
 }
 
 static void vmi_pmd_clear(pmd_t *pmd)
 {
-	const pte_t pte = { 0 };
+	const pte_t pte = { .pte = 0 };
 	vmi_check_page_type(__pa(pmd) >> PAGE_SHIFT, VMI_PAGE_PMD);
 	vmi_ops.set_pte(pte, (pte_t *)pmd, VMI_PAGE_PD);
 }
===================================================================
--- a/arch/x86/mach-voyager/voyager_basic.c
+++ b/arch/x86/mach-voyager/voyager_basic.c
@@ -25,6 +25,7 @@
 #include <linux/smp.h>
 #include <linux/nodemask.h>
 #include <asm/io.h>
+#include <asm/pgtable.h>
 #include <asm/voyager.h>
 #include <asm/vic.h>
 #include <linux/pm.h>
===================================================================
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -248,7 +248,7 @@ pte_t xen_make_pte(unsigned long long pt
 
 	pte &= ~_PAGE_PCD;
 
-	return (pte_t){ pte, pte >> 32 };
+	return (pte_t){ .pte = pte };
 }
 
 pmd_t xen_make_pmd(unsigned long long pmd)
@@ -299,7 +299,7 @@ pte_t xen_make_pte(unsigned long pte)
 
 	pte &= ~_PAGE_PCD;
 
-	return (pte_t){ pte };
+	return (pte_t){ .pte = pte };
 }
 
 pgd_t xen_make_pgd(unsigned long pgd)
===================================================================
--- a/include/asm-x86/page.h
+++ b/include/asm-x86/page.h
@@ -82,17 +82,8 @@ typedef u32	pgdval_t;
 typedef u32	pgdval_t;
 typedef u32	pgprotval_t;
 
-typedef struct { unsigned long pte_low; } pte_t, boot_pte_t;
+typedef union { unsigned long pte, pte_low; } pte_t, boot_pte_t;
 
-static inline pteval_t native_pte_val(pte_t pte)
-{
-	return pte.pte_low;
-}
-
-static inline pte_t native_make_pte(pteval_t val)
-{
-	return (pte_t) { val };
-}
 #endif	/* __ASSEMBLY__ */
 
 #else	/* CONFIG_X86_PAE */
@@ -111,17 +102,13 @@ typedef u64	pgdval_t;
 typedef u64	pgdval_t;
 typedef u64	pgprotval_t;
 
-typedef struct { unsigned long pte_low, pte_high; } pte_t;
+typedef union {
+	struct {
+		u32 pte_low, pte_high;
+	};
+	pteval_t pte;
+} pte_t;
 
-static inline pteval_t native_pte_val(pte_t pte)
-{
-	return pte.pte_low | ((unsigned long long)pte.pte_high << 32);
-}
-
-static inline pte_t native_make_pte(pteval_t val)
-{
-	return (pte_t) { .pte_low = val, .pte_high = (val >> 32) } ;
-}
 #endif	/* __ASSEMBLY__ */
 
 #endif	 /* CONFIG_X86_PAE */
@@ -142,17 +129,12 @@ typedef u64	pgdval_t;
 typedef u64	pgdval_t;
 typedef u64	pgprotval_t;
 
-typedef struct { pteval_t pte; } pte_t;
-
-static inline pteval_t native_pte_val(pte_t pte)
-{
-	return pte.pte;
-}
-
-static inline pte_t native_make_pte(pteval_t pte)
-{
-	return (pte_t){ pte };
-}
+typedef union {
+	struct {
+		u32 pte_low, pte_high;
+	};
+	pteval_t pte;
+} pte_t;
 
 extern unsigned long phys_base;
 extern unsigned long end_pfn;
@@ -246,6 +228,16 @@ static inline pgd_t native_make_pgd(pgdv
 	return (pgd_t) { val };
 }
 
+static inline pteval_t native_pte_val(pte_t pte)
+{
+	return pte.pte;
+}
+
+static inline pte_t native_make_pte(pteval_t val)
+{
+	return (pte_t) { .pte = val };
+}
+
 #if PAGETABLE_LEVELS >= 3
 
 typedef struct { pmdval_t pmd; } pmd_t;
@@ -275,9 +267,11 @@ static inline pudval_t native_pud_val(pu
 }
 #else  /* PAGETABLE_LEVELS == 3 */
 #include <asm-generic/pgtable-nopud.h>
+#define native_pud_val(x)	native_pgd_val((x).pgd)
 #endif	/* PAGETABLE_LEVELS == 4 */
 #else  /* PAGETABLE_LEVELS == 2 */
 #include <asm-generic/pgtable-nopmd.h>
+#define native_pmd_val(x)	native_pud_val((x).pgd)
 #endif	/* PAGETABLE_LEVELS >= 3 */
 #endif	/* __ASSEMBLY__ */
 
===================================================================
--- a/include/asm-x86/paravirt.h
+++ b/include/asm-x86/paravirt.h
@@ -829,54 +829,16 @@ static inline void pte_update_defer(stru
 }
 
 #ifdef CONFIG_X86_PAE
-static inline pte_t __pte(unsigned long long val)
+static inline pmd_t __pmd(pmdval_t val)
 {
-	unsigned long long ret = PVOP_CALL2(unsigned long long,
-					    pv_mmu_ops.make_pte,
-					    val, val >> 32);
-	return (pte_t) { ret, ret >> 32 };
-}
-
-static inline pmd_t __pmd(unsigned long long val)
-{
-	return (pmd_t) { PVOP_CALL2(unsigned long long, pv_mmu_ops.make_pmd,
+	return (pmd_t) { PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
 				    val, val >> 32) };
 }
 
-static inline pgd_t __pgd(unsigned long long val)
+static inline pmdval_t pmd_val(pmd_t x)
 {
-	return (pgd_t) { PVOP_CALL2(unsigned long long, pv_mmu_ops.make_pgd,
-				    val, val >> 32) };
-}
-
-static inline unsigned long long pte_val(pte_t x)
-{
-	return PVOP_CALL2(unsigned long long, pv_mmu_ops.pte_val,
-			  x.pte_low, x.pte_high);
-}
-
-static inline unsigned long long pmd_val(pmd_t x)
-{
-	return PVOP_CALL2(unsigned long long, pv_mmu_ops.pmd_val,
+	return PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
 			  x.pmd, x.pmd >> 32);
-}
-
-static inline unsigned long long pgd_val(pgd_t x)
-{
-	return PVOP_CALL2(unsigned long long, pv_mmu_ops.pgd_val,
-			  x.pgd, x.pgd >> 32);
-}
-
-static inline void set_pte(pte_t *ptep, pte_t pteval)
-{
-	PVOP_VCALL3(pv_mmu_ops.set_pte, ptep, pteval.pte_low, pteval.pte_high);
-}
-
-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
-			      pte_t *ptep, pte_t pteval)
-{
-	/* 5 arg words */
-	pv_mmu_ops.set_pte_at(mm, addr, ptep, pteval);
 }
 
 static inline void set_pte_atomic(pte_t *ptep, pte_t pteval)
@@ -892,16 +854,15 @@ static inline void set_pte_present(struc
 	pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
 }
 
-static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
-{
-	PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp,
-		    pmdval.pmd, pmdval.pmd >> 32);
-}
-
 static inline void set_pud(pud_t *pudp, pud_t pudval)
 {
 	PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
 		    pudval.pgd.pgd, pudval.pgd.pgd >> 32);
+}
+
+static inline void pud_clear(pud_t *pudp)
+{
+	/* unused in 32-bit */
 }
 
 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
@@ -913,50 +874,120 @@ static inline void pmd_clear(pmd_t *pmdp
 {
 	PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
 }
+#endif	/* CONFIG_X86_PAE */
 
-#else  /* !CONFIG_X86_PAE */
+static inline pte_t __pte(pteval_t val)
+{
+	pteval_t ret;
 
-static inline pte_t __pte(unsigned long val)
-{
-	return (pte_t) { PVOP_CALL1(unsigned long, pv_mmu_ops.make_pte, val) };
+	if (sizeof(pteval_t) > sizeof(long))
+		ret = PVOP_CALL2(pteval_t, pv_mmu_ops.make_pte,
+				 val, (u64)val >> 32);
+	else
+		ret = PVOP_CALL1(pteval_t, pv_mmu_ops.make_pte, val);
+
+	return native_make_pte(ret);
 }
 
-static inline pgd_t __pgd(unsigned long val)
+static inline pteval_t pte_val(pte_t x)
 {
-	return (pgd_t) { PVOP_CALL1(unsigned long, pv_mmu_ops.make_pgd, val) };
+	pteval_t ret, val;
+
+	val = native_pte_val(x);
+
+	if (sizeof(pteval_t) > sizeof(long))
+		ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
+				 val, (u64)val >> 32);
+	else
+		ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val, val);
+
+	return ret;
 }
 
-static inline unsigned long pte_val(pte_t x)
+static inline pgd_t __pgd(pgdval_t val)
 {
-	return PVOP_CALL1(unsigned long, pv_mmu_ops.pte_val, x.pte_low);
+	pgdval_t ret;
+
+	if (sizeof(pgdval_t) > sizeof(long))
+		ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
+				 val, (u64)val >> 32);
+	else
+		ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
+				 val);
+
+	return native_make_pgd(ret);
 }
 
-static inline unsigned long pgd_val(pgd_t x)
+static inline pgdval_t pgd_val(pgd_t x)
 {
-	return PVOP_CALL1(unsigned long, pv_mmu_ops.pgd_val, x.pgd);
+	pgdval_t ret;
+
+	if (sizeof(pgdval_t) > sizeof(long))
+		ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
+				 x.pgd, (u64)x.pgd >> 32);
+	else
+		ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
+				 x.pgd);
+
+	return ret;
 }
 
 static inline void set_pte(pte_t *ptep, pte_t pteval)
 {
-	PVOP_VCALL2(pv_mmu_ops.set_pte, ptep, pteval.pte_low);
+	pteval_t val = native_pte_val(pteval);
+
+	if (sizeof(val) > sizeof(long))
+		PVOP_VCALL3(pv_mmu_ops.set_pte, ptep, val, (u64)val >> 32);
+	else
+		PVOP_VCALL2(pv_mmu_ops.set_pte, ptep, val);
 }
 
 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 			      pte_t *ptep, pte_t pteval)
 {
-	PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pteval.pte_low);
+	pteval_t val = native_pte_val(pteval);
+
+	if (sizeof(val) > sizeof(long))
+		/* 5 arg words */
+		pv_mmu_ops.set_pte_at(mm, addr, ptep, pteval);
+	else
+		PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, val);
 }
 
-static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
+static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
+{
+	pmdval_t val = pmd_val(pmdval);
+
+	if (sizeof(val) > sizeof(long))
+		PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
+	else
+		PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
+}
+
+#ifndef CONFIG_X86_PAE
+static inline void set_pte_atomic(pte_t *ptep, pte_t pteval)
+{
+	set_pte(ptep, pteval);
+}
+
+static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
+				   pte_t *ptep, pte_t pte)
+{
+	set_pte_at(mm, addr, ptep, pte);
+}
+
+static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
+				   pte_t *ptep)
 {
 	set_pte_at(mm, addr, ptep, __pte(0));
 }
 
-static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
+static inline void pmd_clear(pmd_t *pmdp)
 {
-	PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, pmdval.pud.pgd.pgd);
+	set_pmd(pmdp, __pmd(0));
 }
 #endif	/* CONFIG_X86_PAE */
+
 
 /* Lazy mode for batching updates / context switch */
 enum paravirt_lazy_mode {
===================================================================
--- a/include/asm-x86/pgtable-2level.h
+++ b/include/asm-x86/pgtable-2level.h
@@ -27,37 +27,40 @@ static inline void native_set_pmd(pmd_t 
 	*pmdp = pmd;
 }
 
-#undef set_pte_atomic
-static inline void set_pte_atomic(pte_t *ptep, pte_t pteval)
+static inline void native_set_pte_atomic(pte_t *ptep, pte_t pteval)
 {
-	set_pte(ptep, pteval);
+	native_set_pte(ptep, pteval);
 }
 
-static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
-				   pte_t *ptep, pte_t pteval)
+static inline void native_set_pte_present(struct mm_struct *mm, unsigned long addr,
+					  pte_t *ptep, pte_t pteval)
 {
-	set_pte_at(mm, addr, ptep, pteval);
+	native_set_pte_at(mm, addr, ptep, pteval);
 }
 
 static inline void native_pte_clear(struct mm_struct *mm,
 				    unsigned long addr, pte_t *ptep)
 {
-	set_pte_at(mm, addr, ptep, __pte(0));
+	native_set_pte_at(mm, addr, ptep, __pte(0));
 }
 
-#undef pmd_clear
-static inline void pmd_clear(pmd_t *pmdp)
+static inline void native_pmd_clear(pmd_t *pmdp)
 {
-	set_pmd(pmdp, __pmd(0));
+	native_set_pmd(pmdp, __pmd(0));
 }
 
 static inline pte_t native_ptep_get_and_clear(pte_t *xp)
 {
+	pte_t ret;
+
 #ifdef CONFIG_SMP
-	return __pte(xchg(&xp->pte_low, 0));
+	ret = __pte(xchg(&xp->pte_low, 0));
 #else
-	return native_local_ptep_get_and_clear(xp);
+	ret = *xp;
+	native_pte_clear(NULL, 0, xp);
 #endif
+
+	return ret;
 }
 
 /*
@@ -80,14 +83,14 @@ static inline int pte_exec_kernel(pte_t 
 	((((pte).pte_low >> 1) & 0x1f ) + (((pte).pte_low >> 8) << 5 ))
 
 #define pgoff_to_pte(off) \
-	((pte_t) { (((off) & 0x1f) << 1) + (((off) >> 5) << 8) + _PAGE_FILE })
+	((pte_t) { .pte = (((off) & 0x1f) << 1) + (((off) >> 5) << 8) + _PAGE_FILE })
 
 /* Encode and de-code a swap entry */
 #define __swp_type(x)			(((x).val >> 1) & 0x1f)
 #define __swp_offset(x)			((x).val >> 8)
 #define __swp_entry(type, offset)	\
 	((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
-#define __pte_to_swp_entry(pte)		((swp_entry_t) { (pte).pte_low })
-#define __swp_entry_to_pte(x)		((pte_t) { (x).val })
+#define __pte_to_swp_entry(pte)		((swp_entry_t){.val = native_pte_val(pte)})
+#define __swp_entry_to_pte(x)		(native_make_pte((x).val))
 
 #endif /* _I386_PGTABLE_2LEVEL_H */
===================================================================
--- a/include/asm-x86/pgtable-3level.h
+++ b/include/asm-x86/pgtable-3level.h
@@ -105,7 +105,7 @@ static inline void native_pmd_clear(pmd_
  * We do not let the generic code free and clear pgd entries due to
  * this erratum.
  */
-static inline void pud_clear(pud_t * pud) { }
+static inline void native_pud_clear(pud_t * pud) { }
 
 #define pud_page(pud)					\
 	((struct page *) __va(pud_val(pud) & PAGE_MASK))
@@ -124,16 +124,11 @@ static inline pte_t native_ptep_get_and_
 	res.pte_high = ptep->pte_high;
 	ptep->pte_high = 0;
 #else
-	res = native_local_ptep_get_and_clear(xp);
+	res = *ptep;
+	native_pte_clear(NULL, 0, ptep);
 #endif
 
 	return res;
-}
-
-#define __HAVE_ARCH_PTE_SAME
-static inline int pte_same(pte_t a, pte_t b)
-{
-	return a.pte_low == b.pte_low && a.pte_high == b.pte_high;
 }
 
 extern unsigned long long __supported_pte_mask;
@@ -144,15 +139,15 @@ extern unsigned long long __supported_pt
  * put the 32 bits of offset into the high part.
  */
 #define pte_to_pgoff(pte) ((pte).pte_high)
-#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) })
+#define pgoff_to_pte(off) ((pte_t) { { .pte_low = _PAGE_FILE, .pte_high = (off) } })
 #define PTE_FILE_MAX_BITS       32
 
 /* Encode and de-code a swap entry */
 #define __swp_type(x)			(((x).val) & 0x1f)
 #define __swp_offset(x)			((x).val >> 5)
 #define __swp_entry(type, offset)	((swp_entry_t){(type) | (offset) << 5})
-#define __pte_to_swp_entry(pte)		((swp_entry_t){ (pte).pte_high })
-#define __swp_entry_to_pte(x)		((pte_t){ 0, (x).val })
+#define __pte_to_swp_entry(pte)		((swp_entry_t){.val = native_pte_val(pte) >> 32})
+#define __swp_entry_to_pte(x)		(native_make_pte((pteval_t)(x).val << 32))
 
 #define __pmd_free_tlb(tlb, x)		do { } while (0)
 
===================================================================
--- a/include/asm-x86/pgtable.h
+++ b/include/asm-x86/pgtable.h
@@ -5,6 +5,9 @@
 #include <asm/page.h>
 
 #ifndef __ASSEMBLY__
+#include <linux/mm_types.h>
+#include <asm/tlbflush.h>
+
 /*
  * ZERO_PAGE is a global shared page that is always zero: used
  * for zero-mapped memory areas etc..
@@ -94,43 +97,153 @@ static inline int pte_huge(pte_t pte)
 
 #endif	/* __ASSEMBLY__ */
 
-#ifdef CONFIG_PARAVIRT
-#include <asm/paravirt.h>
-#else
-#define set_pte(ptep, pte)			native_set_pte(ptep, pte)
-#define set_pte_at(mm, addr, ptep, pte)		\
-	native_set_pte_at(mm, addr, ptep, pte)
-
-#define set_pte_present(mm, addr, ptep, pte)		\
-	native_set_pte_present(mm, addr, ptep, pte)
-#define set_pte_atomic(ptep, pte)		\
-	native_set_pte_atomic(ptep, pte)
-
-#define set_pmd(pmdp, pmd)			native_set_pmd(pmdp, pmd)
-
-#ifndef __PAGETABLE_PUD_FOLDED
-#define set_pgd(pgdp, pgd)			native_set_pgd(pgdp, pgd)
-#define set_pud(pudp, pud)			native_set_pud(pudp, pud)
-#define pgd_clear(pgd)				native_pgd_clear(pgd)
-#endif
-
-#ifndef __PAGETABLE_PMD_FOLDED
-#define pud_clear(pud)				native_pud_clear(pud)
-#endif
-
-#define pte_clear(mm, addr, ptep)		native_pte_clear(mm, addr, ptep)
-#define pmd_clear(pmd)				native_pmd_clear(pmd)
-
-#define pte_update(mm, addr, ptep)              do { } while (0)
-#define pte_update_defer(mm, addr, ptep)        do { } while (0)
-
-#endif	/* CONFIG_PARAVIRT */
-
 #ifdef CONFIG_X86_32
 # include "pgtable_32.h"
 #else
 # include "pgtable_64.h"
 #endif
+
+#ifndef __ASSEMBLY__
+
+#ifdef CONFIG_PARAVIRT
+#include <asm/paravirt.h>
+#else  /* !CONFIG_PARAVIRT */
+
+static inline void set_pte(pte_t *ptep, pte_t pte)
+{
+	native_set_pte(ptep, pte);
+}
+
+static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
+			      pte_t *ptep, pte_t pte)
+{
+	native_set_pte_at(mm, addr, ptep, pte);
+}
+
+static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
+				   pte_t *ptep, pte_t pte)
+{
+	native_set_pte_present(mm, addr, ptep, pte);
+}
+
+static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
+{
+	native_set_pte_atomic(ptep, pte);
+}
+
+static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
+{
+	native_set_pmd(pmdp, pmd);
+}
+
+#ifndef __PAGETABLE_PUD_FOLDED
+static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
+{
+	native_set_pgd(pgdp, pgd);
+}
+
+static inline void pgd_clear(pgd_t *pgdp)
+{
+	native_pgd_clear(pgdp);
+}
+#endif	/* PUD_FOLDED */
+
+#ifndef __PAGETABLE_PMD_FOLDED
+static inline void pud_clear(pud_t *pudp)
+{
+	native_pud_clear(pudp);
+}
+
+static inline void set_pud(pud_t *pudp, pud_t pud)
+{
+	native_set_pud(pudp, pud);
+}
+#endif	/* PMD_FOLDED */
+
+static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
+{
+	native_pte_clear(mm, addr, ptep);
+}
+
+static inline void pmd_clear(pmd_t *pmdp)
+{
+	native_pmd_clear(pmdp);
+}
+
+/*
+ * Rules for using pte_update - it must be called after any PTE update which
+ * has not been done using the set_pte / clear_pte interfaces.  It is used by
+ * shadow mode hypervisors to resynchronize the shadow page tables.  Kernel PTE
+ * updates should either be sets, clears, or set_pte_atomic for P->P
+ * transitions, which means this hook should only be called for user PTEs.
+ * This hook implies a P->P protection or access change has taken place, which
+ * requires a subsequent TLB flush.  The notification can optionally be delayed
+ * until the TLB flush event by using the pte_update_defer form of the
+ * interface, but care must be taken to assure that the flush happens while
+ * still holding the same page table lock so that the shadow and primary pages
+ * do not become out of sync on SMP.
+ */
+static inline void pte_update(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
+{
+}
+
+static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
+				    pte_t *ptep)
+{
+}
+#endif	/* CONFIG_PARAVIRT */
+
+#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
+static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
+					    unsigned long addr, pte_t *ptep)
+{
+	int ret = 0;
+
+	if (pte_young(*ptep))
+		ret = test_and_clear_bit(_PAGE_BIT_ACCESSED, (unsigned long *)&ptep->pte);
+	if (ret)
+		pte_update(vma->vm_mm, addr, ptep);
+
+	return ret;
+}
+
+#define __HAVE_ARCH_PTE_SAME
+static inline int pte_same(pte_t a, pte_t b)
+{
+	return a.pte == b.pte;
+}
+
+/*
+ * We only update the dirty/accessed state if we set
+ * the dirty bit by hand in the kernel, since the hardware
+ * will do the accessed bit for us, and we don't want to
+ * race with other CPU's that might be updating the dirty
+ * bit at the same time.
+ */
+#define  __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
+static inline int ptep_set_access_flags(struct vm_area_struct *vma,
+					unsigned long address,
+					pte_t *ptep, pte_t entry, int dirty)
+{
+	int changed = !pte_same(*ptep, entry);
+
+	if (changed && dirty) {
+		set_pte(ptep, entry);
+		pte_update_defer(vma->vm_mm, address, ptep);
+		flush_tlb_page(vma, address);
+	}
+	return changed;
+}
+
+#define __HAVE_ARCH_PTEP_SET_WRPROTECT
+static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
+{
+	clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
+	pte_update(mm, addr, ptep);
+}
+
+#endif	/* __ASSEMBLY__ */
+
 
 #ifndef __PAGETABLE_PUD_FOLDED
 #define PUD_SIZE	(_AC(1,UL) << PUD_SHIFT)
===================================================================
--- a/include/asm-x86/pgtable_32.h
+++ b/include/asm-x86/pgtable_32.h
@@ -84,24 +84,6 @@ extern unsigned long pg0[];
 # include <asm/pgtable-2level.h>
 #endif
 
-#ifndef CONFIG_PARAVIRT
-/*
- * Rules for using pte_update - it must be called after any PTE update which
- * has not been done using the set_pte / clear_pte interfaces.  It is used by
- * shadow mode hypervisors to resynchronize the shadow page tables.  Kernel PTE
- * updates should either be sets, clears, or set_pte_atomic for P->P
- * transitions, which means this hook should only be called for user PTEs.
- * This hook implies a P->P protection or access change has taken place, which
- * requires a subsequent TLB flush.  The notification can optionally be delayed
- * until the TLB flush event by using the pte_update_defer form of the
- * interface, but care must be taken to assure that the flush happens while
- * still holding the same page table lock so that the shadow and primary pages
- * do not become out of sync on SMP.
- */
-#define pte_update(mm, addr, ptep)		do { } while (0)
-#define pte_update_defer(mm, addr, ptep)	do { } while (0)
-#endif
-
 /* local pte updates need not use xchg for locking */
 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
 {
@@ -112,36 +94,6 @@ static inline pte_t native_local_ptep_ge
 	return res;
 }
 
-/*
- * We only update the dirty/accessed state if we set
- * the dirty bit by hand in the kernel, since the hardware
- * will do the accessed bit for us, and we don't want to
- * race with other CPU's that might be updating the dirty
- * bit at the same time.
- */
-#define  __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
-#define ptep_set_access_flags(vma, address, ptep, entry, dirty)		\
-({									\
-	int __changed = !pte_same(*(ptep), entry);			\
-	if (__changed && dirty) {					\
-		(ptep)->pte_low = (entry).pte_low;			\
-		pte_update_defer((vma)->vm_mm, (address), (ptep));	\
-		flush_tlb_page(vma, address);				\
-	}								\
-	__changed;							\
-})
-
-#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
-#define ptep_test_and_clear_young(vma, addr, ptep) ({			\
-	int __ret = 0;							\
-	if (pte_young(*(ptep)))						\
-		__ret = test_and_clear_bit(_PAGE_BIT_ACCESSED,		\
-						&(ptep)->pte_low);	\
-	if (__ret)							\
-		pte_update((vma)->vm_mm, addr, ptep);			\
-	__ret;								\
-})
-
 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
 #define ptep_clear_flush_young(vma, address, ptep)			\
 ({									\
@@ -151,13 +103,6 @@ static inline pte_t native_local_ptep_ge
 		flush_tlb_page(vma, address);				\
 	__young;							\
 })
-
-#define __HAVE_ARCH_PTEP_SET_WRPROTECT
-static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
-{
-	clear_bit(_PAGE_BIT_RW, &ptep->pte_low);
-	pte_update(mm, addr, ptep);
-}
 
 /*
  * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
===================================================================
--- a/include/asm-x86/pgtable_64.h
+++ b/include/asm-x86/pgtable_64.h
@@ -135,7 +135,16 @@ static inline void native_pgd_clear(pgd_
 	native_set_pgd(pgd, native_make_pgd(0));
 }
 
-#define pte_same(a, b)		((a).pte == (b).pte)
+static inline void native_set_pte_atomic(pte_t *ptep, pte_t pteval)
+{
+	native_set_pte(ptep, pteval);
+}
+
+static inline void native_set_pte_present(struct mm_struct *mm, unsigned long addr,
+					  pte_t *ptep, pte_t pteval)
+{
+	native_set_pte_at(mm, addr, ptep, pteval);
+}
 
 #define pte_pgprot(a)	(__pgprot((a).pte & ~PHYSICAL_PAGE_MASK))
 
@@ -149,19 +158,6 @@ static inline void native_pgd_clear(pgd_
 #define MODULES_END      _AC(0xfffffffffff00000, UL)
 #define MODULES_LEN   (MODULES_END - MODULES_VADDR)
 
-struct vm_area_struct;
-
-static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
-{
-	if (!pte_young(*ptep))
-		return 0;
-	return test_and_clear_bit(_PAGE_BIT_ACCESSED, (unsigned long *)&ptep->pte);
-}
-
-static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
-{
-	clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
-}
 
 #ifndef __ASSEMBLY__
 /*
@@ -205,8 +201,8 @@ static inline void ptep_set_wrprotect(st
 			pmd_index(address))
 #define pmd_present(x)	(pmd_val(x) & _PAGE_PRESENT)
 
-#define pte_to_pgoff(pte) ((pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
-#define pgoff_to_pte(off) ((pte_t) { ((off) << PAGE_SHIFT) | _PAGE_FILE })
+#define pte_to_pgoff(pte) ((native_pte_val(pte) & PHYSICAL_PAGE_MASK) >> PAGE_SHIFT)
+#define pgoff_to_pte(off) native_make_pte(((off) << PAGE_SHIFT) | _PAGE_FILE)
 #define PTE_FILE_MAX_BITS __PHYSICAL_MASK_SHIFT
 
 /* PTE - Level 1 access. */
@@ -219,29 +215,13 @@ static inline void ptep_set_wrprotect(st
 
 #define update_mmu_cache(vma,address,pte) do { } while (0)
 
-/* We only update the dirty/accessed state if we set
- * the dirty bit by hand in the kernel, since the hardware
- * will do the accessed bit for us, and we don't want to
- * race with other CPU's that might be updating the dirty
- * bit at the same time. */
-#define  __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
-#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
-({									  \
-	int __changed = !pte_same(*(__ptep), __entry);			  \
-	if (__changed && __dirty) {					  \
-		set_pte(__ptep, __entry);			  	  \
-		flush_tlb_page(__vma, __address);		  	  \
-	}								  \
-	__changed;							  \
-})
-
 /* Encode and de-code a swap entry */
 #define __swp_type(x)			(((x).val >> 1) & 0x3f)
 #define __swp_offset(x)			((x).val >> 8)
 #define __swp_entry(type, offset)	\
 	((swp_entry_t) { ((type) << 1) | ((offset) << 8) })
-#define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val(pte) })
-#define __swp_entry_to_pte(x)		((pte_t) { (x).val })
+#define __pte_to_swp_entry(pte)		((swp_entry_t) { .val = native_pte_val(pte) })
+#define __swp_entry_to_pte(x)		(native_make_pte((x).val))
 
 extern spinlock_t pgd_lock;
 extern struct list_head pgd_list;
@@ -267,10 +247,6 @@ pte_t *lookup_address(unsigned long addr
 #define	kc_offset_to_vaddr(o) \
    (((o) & (1UL << (__VIRTUAL_MASK_SHIFT-1))) ? ((o) | (~__VIRTUAL_MASK)) : (o))
 
-#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
-#define __HAVE_ARCH_PTEP_SET_WRPROTECT
-#define __HAVE_ARCH_PTE_SAME
-
 #endif /* !__ASSEMBLY__ */
 
 #endif /* _X86_64_PGTABLE_H */
===================================================================
--- a/include/asm-x86/tlbflush.h
+++ b/include/asm-x86/tlbflush.h
@@ -1,7 +1,6 @@
 #ifndef _ASM_X86_TLBFLUSH_H
 #define _ASM_X86_TLBFLUSH_H
 
-#include <linux/mm.h>
 #include <linux/sched.h>
 
 #include <asm/processor.h>
===================================================================
--- a/include/xen/page.h
+++ b/include/xen/page.h
@@ -156,11 +156,11 @@ static inline pte_t mfn_pte(unsigned lon
 
 static inline unsigned long long pte_val_ma(pte_t x)
 {
-	return ((unsigned long long)x.pte_high << 32) | x.pte_low;
+	return x.pte;
 }
 #define pmd_val_ma(v) ((v).pmd)
 #define pud_val_ma(v) ((v).pgd.pgd)
-#define __pte_ma(x)	((pte_t) { .pte_low = (x), .pte_high = (x)>>32 } )
+#define __pte_ma(x)	((pte_t) { .pte = (x) })
 #define __pmd_ma(x)	((pmd_t) { (x) } )
 #else  /* !X86_PAE */
 #define pte_mfn(_pte) ((_pte).pte_low >> PAGE_SHIFT)

-- 

[PATCH 5/5] x86: clean up pagetable-related printk format warnings

[Jeremy Fitzhardinge]

[-- Attachment #1: x86-pagetable-printk-warnings.patch --]
[-- Type: text/plain, Size: 4192 bytes --]

Clean up a number of warnings about printk format mismatches.

Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>

---
 arch/x86/kernel/setup_32.c   |    6 +++---
 arch/x86/mm/fault_32.c       |    2 +-
 arch/x86/mm/fault_64.c       |    8 ++++----
 include/asm-x86/pgtable_64.h |    8 ++++----
 4 files changed, 12 insertions(+), 12 deletions(-)

===================================================================
--- a/arch/x86/kernel/setup_32.c
+++ b/arch/x86/kernel/setup_32.c
@@ -335,7 +335,7 @@ unsigned long __init find_max_low_pfn(vo
 		if (highmem_pages + MAXMEM_PFN < max_pfn)
 			max_pfn = MAXMEM_PFN + highmem_pages;
 		if (highmem_pages + MAXMEM_PFN > max_pfn) {
-			printk("only %luMB highmem pages available, ignoring highmem size of %uMB.\n", pages_to_mb(max_pfn - MAXMEM_PFN), pages_to_mb(highmem_pages));
+			printk("only %luMB highmem pages available, ignoring highmem size of %luMB.\n", pages_to_mb(max_pfn - MAXMEM_PFN), pages_to_mb(highmem_pages));
 			highmem_pages = 0;
 		}
 		max_low_pfn = MAXMEM_PFN;
@@ -362,12 +362,12 @@ unsigned long __init find_max_low_pfn(vo
 			highmem_pages = 0;
 #ifdef CONFIG_HIGHMEM
 		if (highmem_pages >= max_pfn) {
-			printk(KERN_ERR "highmem size specified (%uMB) is bigger than pages available (%luMB)!.\n", pages_to_mb(highmem_pages), pages_to_mb(max_pfn));
+			printk(KERN_ERR "highmem size specified (%luMB) is bigger than pages available (%luMB)!.\n", pages_to_mb(highmem_pages), pages_to_mb(max_pfn));
 			highmem_pages = 0;
 		}
 		if (highmem_pages) {
 			if (max_low_pfn-highmem_pages < 64*1024*1024/PAGE_SIZE){
-				printk(KERN_ERR "highmem size %uMB results in smaller than 64MB lowmem, ignoring it.\n", pages_to_mb(highmem_pages));
+				printk(KERN_ERR "highmem size %luMB results in smaller than 64MB lowmem, ignoring it.\n", pages_to_mb(highmem_pages));
 				highmem_pages = 0;
 			}
 			max_low_pfn -= highmem_pages;
===================================================================
--- a/arch/x86/mm/fault_32.c
+++ b/arch/x86/mm/fault_32.c
@@ -557,7 +557,7 @@ no_context:
 			page &= ~_PAGE_NX;
 		}
 #else
-		printk("*pde = %08lx ", page);
+		printk("*pde = %08x ", page);
 #endif
 
 		/*
===================================================================
--- a/arch/x86/mm/fault_64.c
+++ b/arch/x86/mm/fault_64.c
@@ -157,22 +157,22 @@ void dump_pagetable(unsigned long addres
 	pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK); 
 	pgd += pgd_index(address);
 	if (bad_address(pgd)) goto bad;
-	printk("PGD %lx ", pgd_val(*pgd));
+	printk("PGD %llx ", pgd_val(*pgd));
 	if (!pgd_present(*pgd)) goto ret; 
 
 	pud = pud_offset(pgd, address);
 	if (bad_address(pud)) goto bad;
-	printk("PUD %lx ", pud_val(*pud));
+	printk("PUD %llx ", pud_val(*pud));
 	if (!pud_present(*pud))	goto ret;
 
 	pmd = pmd_offset(pud, address);
 	if (bad_address(pmd)) goto bad;
-	printk("PMD %lx ", pmd_val(*pmd));
+	printk("PMD %llx ", pmd_val(*pmd));
 	if (!pmd_present(*pmd) || pmd_large(*pmd)) goto ret;
 
 	pte = pte_offset_kernel(pmd, address);
 	if (bad_address(pte)) goto bad;
-	printk("PTE %lx", pte_val(*pte)); 
+	printk("PTE %llx", pte_val(*pte));
 ret:
 	printk("\n");
 	return;
===================================================================
--- a/include/asm-x86/pgtable_64.h
+++ b/include/asm-x86/pgtable_64.h
@@ -57,13 +57,13 @@ extern void clear_kernel_mapping(unsigne
 #ifndef __ASSEMBLY__
 
 #define pte_ERROR(e) \
-	printk("%s:%d: bad pte %p(%016lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
+	printk("%s:%d: bad pte %p(%016llx).\n", __FILE__, __LINE__, &(e), pte_val(e))
 #define pmd_ERROR(e) \
-	printk("%s:%d: bad pmd %p(%016lx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
+	printk("%s:%d: bad pmd %p(%016llx).\n", __FILE__, __LINE__, &(e), pmd_val(e))
 #define pud_ERROR(e) \
-	printk("%s:%d: bad pud %p(%016lx).\n", __FILE__, __LINE__, &(e), pud_val(e))
+	printk("%s:%d: bad pud %p(%016llx).\n", __FILE__, __LINE__, &(e), pud_val(e))
 #define pgd_ERROR(e) \
-	printk("%s:%d: bad pgd %p(%016lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
+	printk("%s:%d: bad pgd %p(%016llx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
 
 #define pgd_none(x)	(!pgd_val(x))
 #define pud_none(x)	(!pud_val(x))

-- 

Re: [PATCH 0/5] x86: another attempt at x86 pagetable unification

[Ingo Molnar]

* Jeremy Fitzhardinge <jeremy@goop.org> wrote:

> Hi Ingo,
> 
> Here's another round of the pagetable unification patches.  I've done 
> a few dozen rounds of randconfig builds on both 32- and 64-bit, so I 
> hope that will prevent compile problems in your test environment.
> 
> I've also boot-tested 64-bit and 32-bit PAE/non-PAE configs (both 
> paravirt and non-paravirt).

thanks, applied.

	Ingo

Re: [PATCH 0/5] x86: another attempt at x86 pagetable unification

[Ingo Molnar]

* Jeremy Fitzhardinge <jeremy@goop.org> wrote:

> Here's another round of the pagetable unification patches.  I've done 
> a few dozen rounds of randconfig builds on both 32- and 64-bit, so I 
> hope that will prevent compile problems in your test environment.
> 
> I've also boot-tested 64-bit and 32-bit PAE/non-PAE configs (both 
> paravirt and non-paravirt).

i've done a dozen random tests too and it's looking good so far. Nice 
work!

pgtable_32.h and pgtable_64.h still look a tiny bit messy from the 
include file dependencies POV. For example pgtable_32.h:

 #include <asm/processor.h>
 #include <asm/fixmap.h>
 #include <linux/threads.h>
 #include <asm/paravirt.h>

 #include <linux/bitops.h>
 #include <linux/slab.h>
 #include <linux/list.h>
 #include <linux/spinlock.h>

that asm/paravirt.h include is already present in pgtable.h, in a 
somewhat quirky way:

#ifdef CONFIG_PARAVIRT
#include <asm/paravirt.h>
#else  /* !CONFIG_PARAVIRT */

also, most of the:

  scripts/checkpatch.pl --file include/asm-x86/pgtable*.h

complaints are real ones and should be fixed.

would you be interested in cleaning up that stuff once and forever? It 
would be a fine approach if you just tried to quickly push for a "high 
quality" end result in a series of patches and sent that series to me, 
without having tested it fully through - i can figure out whatever build 
breakages and dependencies there still are. So there would be no 
expectation of getting such a cleanup series right in the first (or 
second, or third) attempt, this is spaghetti code that has been 
accumulated up for years. The important thing would be to be careful to 
not introduce runtime breakages accidentally - build breakages due to 
some include file dependency we can sort out just fine. Hm?

	Ingo

Re: [PATCH 0/5] x86: another attempt at x86 pagetable unification

[Ingo Molnar]

[-- Attachment #1: Type: text/plain, Size: 4235 bytes --]


* Ingo Molnar <mingo@elte.hu> wrote:

> > Here's another round of the pagetable unification patches.  I've 
> > done a few dozen rounds of randconfig builds on both 32- and 64-bit, 
> > so I hope that will prevent compile problems in your test 
> > environment.
> > 
> > I've also boot-tested 64-bit and 32-bit PAE/non-PAE configs (both 
> > paravirt and non-paravirt).
> 
> i've done a dozen random tests too and it's looking good so far. Nice 
> work!

found a couple of bugs.

firstly, 64-bit wasnt so lucky, you broke iounmap()/change_page_attr()
:-)

The crash is here:

[    0.000000] PCI: Calling quirk ffffffff804625d0 for 0000:00:02.0
[    0.000000] PCI: Calling quirk ffffffff80565b10 for 0000:00:02.0
[    0.000000] ------------[ cut here ]------------
[    0.000000] kernel BUG at arch/x86/mm/pageattr_64.c:176!
[    0.000000] invalid opcode: 0000 [1] SMP 
[    0.000000] CPU 1 
[    0.000000] Modules linked in:
[    0.000000] Pid: 1, comm: swapper Not tainted 2.6.24-rc5 #5
[    0.000000] RIP: 0010:[<ffffffff802229b9>]  [<ffffffff802229b9>] __change_page_attr+0x189/0x2e0
[    0.000000] RSP: 0018:ffff81003f9c3d30  EFLAGS: 00010282
[    0.000000] RAX: 0000000000000400 RBX: 00000000000da103 RCX: ffffe20000000370
[    0.000000] RDX: 000000000000006e RSI: 00003ffffffff000 RDI: ffff81000000a000
[    0.000000] RBP: ffff81003f9c3d90 R08: 80000000da0001e3 R09: 0000000000000001
[    0.000000] R10: 0000000000000001 R11: 00000000ffffffff R12: ffff81000000a680
[    0.000000] R13: 0000000000000001 R14: 8000000000000163 R15: ffff8100da103000
[    0.000000] FS:  0000000000000000(0000) GS:ffff81003f8014b0(0000) knlGS:0000000000000000
[    0.000000] CS:  0010 DS: 0018 ES: 0018 CR0: 000000008005003b
[    0.000000] CR2: 0000000000000000 CR3: 0000000000201000 CR4: 00000000000006e0
[    0.000000] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
[    0.000000] DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
[    0.000000] Process swapper (pid: 1, threadinfo ffff81003f9c2000, task ffff81003f9c0000)
[    0.000000] Stack:  ffff8100da102000 8000000000000163 8000000000000163 0000000000000000
[    0.000000]  ffffffff809320e0 ffff8100da102000 ffff81003f9c3d70 00000000000da103
[    0.000000]  ffff8100da103000 0000000000000001 8000000000000163 0000000000000000
[    0.000000] Call Trace:
[    0.000000]  [<ffffffff80222bb6>] change_page_attr_addr+0xa6/0x150
[    0.000000]  [<ffffffff8022243b>] ioremap_change_attr+0x5b/0x70
[    0.000000]  [<ffffffff8022265f>] iounmap+0xbf/0xe0
[    0.000000]  [<ffffffff80565e23>] quirk_usb_early_handoff+0x313/0x410
[    0.000000]  [<ffffffff8044a109>] kobject_put+0x19/0x20
[    0.000000]  [<ffffffff804a45d5>] put_device+0x15/0x20
[    0.000000]  [<ffffffff804611bd>] pci_fixup_device+0x8d/0xe0
[    0.000000]  [<ffffffff8045f53d>] pci_init+0x1d/0x40
[    0.000000]  [<ffffffff80a04794>] kernel_init+0x164/0x350
[    0.000000]  [<ffffffff8025cd9f>] trace_hardirqs_on+0xbf/0x160
[    0.000000]  [<ffffffff806fc824>] trace_hardirqs_on_thunk+0x35/0x3a
[    0.000000]  [<ffffffff8025cd9f>] trace_hardirqs_on+0xbf/0x160
[    0.000000]  [<ffffffff8020cba8>] child_rip+0xa/0x12
[    0.000000]  [<ffffffff8020c2bf>] restore_args+0x0/0x30
[    0.000000]  [<ffffffff80a04630>] kernel_init+0x0/0x350
[    0.000000]  [<ffffffff8020cb9e>] child_rip+0x0/0x12
[    0.000000] 
[    0.000000] 
[    0.000000] Code: 0f 0b eb fe 0f 0b eb fe 0f 0b eb fe 0f 0b eb fe 48 b8 7f 0f 
[    0.000000] RIP  [<ffffffff802229b9>] __change_page_attr+0x189/0x2e0
[    0.000000]  RSP <ffff81003f9c3d30>
[    0.000000] Kernel panic - not syncing: Attempted to kill init!

secondly, as i tried to bisect it, it would build and boot at this 
patch:

  Subject: x86: clean up asm-x86/page*.h

but wouldnt build at this patch:

  Subject: x86: unify pgtable*.h

nor at this patch:

  Subject: x86: fix up formatting in pgtable*.h

it finally built at:

  Subject: x86: use a uniform structure for pte_t

but crashed. So the bug is in one of those 3 patches. Please make them 
bisect-friendly.

full bootlog and config attached. (The crash happens reliably here - if 
you cannot reproduce it then i can try any fix from you. I've removed 
the 5 patches of yours for now from x86.git.)

	Ingo

[-- Attachment #2: config --]
[-- Type: text/plain, Size: 49060 bytes --]

#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.24-rc5
# Thu Dec 20 11:47:21 2007
#
CONFIG_64BIT=y
# CONFIG_X86_32 is not set
CONFIG_X86_64=y
CONFIG_X86=y
# CONFIG_GENERIC_LOCKBREAK is not set
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_CLOCKSOURCE_WATCHDOG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_SEMAPHORE_SLEEPERS=y
CONFIG_MMU=y
CONFIG_ZONE_DMA=y
# CONFIG_QUICKLIST is not set
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_BUG=y
# CONFIG_GENERIC_GPIO is not set
CONFIG_GENERIC_HWEIGHT=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_DMI=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ZONE_DMA32=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_AUDIT_ARCH=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_PENDING_IRQ=y
CONFIG_X86_HT=y
# CONFIG_KTIME_SCALAR is not set
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"

#
# General setup
#
CONFIG_EXPERIMENTAL=y
CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
# CONFIG_TASK_IO_ACCOUNTING is not set
# CONFIG_USER_NS is not set
CONFIG_PID_NS=y
# CONFIG_AUDIT is not set
CONFIG_IKCONFIG=y
# CONFIG_IKCONFIG_PROC is not set
CONFIG_LOG_BUF_SHIFT=20
CONFIG_CGROUPS=y
# CONFIG_CGROUP_DEBUG is not set
# CONFIG_CGROUP_NS is not set
CONFIG_CPUSETS=y
CONFIG_FAIR_GROUP_SCHED=y
# CONFIG_FAIR_USER_SCHED is not set
CONFIG_FAIR_CGROUP_SCHED=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_SYSFS_DEPRECATED=y
CONFIG_PROC_PID_CPUSET=y
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
# CONFIG_EMBEDDED is not set
CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_EXTRA_PASS=y
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLUB_DEBUG=y
# CONFIG_SLAB is not set
CONFIG_SLUB=y
# CONFIG_SLOB is not set
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_UNLOAD is not set
CONFIG_MODVERSIONS=y
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
CONFIG_STOP_MACHINE=y
CONFIG_BLOCK=y
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_BLK_DEV_BSG is not set
CONFIG_BLOCK_COMPAT=y

#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
# CONFIG_IOSCHED_DEADLINE is not set
CONFIG_IOSCHED_CFQ=m
CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"

#
# Processor type and features
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ=y
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_SMP=y
CONFIG_X86_PC=y
# CONFIG_X86_ELAN is not set
# CONFIG_X86_VOYAGER is not set
# CONFIG_X86_NUMAQ is not set
# CONFIG_X86_SUMMIT is not set
# CONFIG_X86_BIGSMP is not set
# CONFIG_X86_VISWS is not set
# CONFIG_X86_GENERICARCH is not set
# CONFIG_X86_ES7000 is not set
# CONFIG_X86_RDC321X is not set
# CONFIG_X86_VSMP is not set
# CONFIG_M386 is not set
# CONFIG_M486 is not set
# CONFIG_M586 is not set
# CONFIG_M586TSC is not set
# CONFIG_M586MMX is not set
# CONFIG_M686 is not set
# CONFIG_MPENTIUMII is not set
# CONFIG_MPENTIUMIII is not set
# CONFIG_MPENTIUMM is not set
# CONFIG_MPENTIUM4 is not set
# CONFIG_MK6 is not set
# CONFIG_MK7 is not set
# CONFIG_MK8 is not set
# CONFIG_MCRUSOE is not set
# CONFIG_MEFFICEON is not set
# CONFIG_MWINCHIPC6 is not set
# CONFIG_MWINCHIP2 is not set
# CONFIG_MWINCHIP3D is not set
# CONFIG_MGEODEGX1 is not set
# CONFIG_MGEODE_LX is not set
# CONFIG_MCYRIXIII is not set
# CONFIG_MVIAC3_2 is not set
# CONFIG_MVIAC7 is not set
# CONFIG_MPSC is not set
CONFIG_MCORE2=y
# CONFIG_GENERIC_CPU is not set
CONFIG_X86_L1_CACHE_BYTES=64
CONFIG_X86_INTERNODE_CACHE_BYTES=64
CONFIG_X86_CMPXCHG=y
CONFIG_X86_L1_CACHE_SHIFT=6
CONFIG_X86_GOOD_APIC=y
CONFIG_X86_INTEL_USERCOPY=y
CONFIG_X86_USE_PPRO_CHECKSUM=y
CONFIG_X86_TSC=y
CONFIG_X86_MINIMUM_CPU_FAMILY=64
CONFIG_X86_DEBUGCTLMSR=y
CONFIG_HPET_TIMER=y
CONFIG_GART_IOMMU=y
CONFIG_CALGARY_IOMMU=y
# CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT is not set
CONFIG_SWIOTLB=y
CONFIG_NR_CPUS=8
CONFIG_SCHED_SMT=y
CONFIG_SCHED_MC=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_VOLUNTARY=y
# CONFIG_PREEMPT is not set
CONFIG_PREEMPT_BKL=y
CONFIG_X86_LOCAL_APIC=y
CONFIG_X86_IO_APIC=y
CONFIG_X86_MCE=y
# CONFIG_X86_MCE_INTEL is not set
# CONFIG_X86_MCE_AMD is not set
# CONFIG_MICROCODE is not set
# CONFIG_X86_MSR is not set
CONFIG_X86_CPUID=m
CONFIG_NUMA=y
CONFIG_K8_NUMA=y
CONFIG_THREAD_ORDER=1
CONFIG_NUMA_EMU=y
CONFIG_NODES_SHIFT=6
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_SELECT_MEMORY_MODEL=y
# CONFIG_FLATMEM_MANUAL is not set
# CONFIG_DISCONTIGMEM_MANUAL is not set
CONFIG_SPARSEMEM_MANUAL=y
CONFIG_SPARSEMEM=y
CONFIG_NEED_MULTIPLE_NODES=y
CONFIG_HAVE_MEMORY_PRESENT=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSEMEM_VMEMMAP=y
# CONFIG_MEMORY_HOTPLUG is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_MIGRATION=y
CONFIG_RESOURCES_64BIT=y
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y
# CONFIG_MTRR is not set
# CONFIG_SECCOMP is not set
# CONFIG_CC_STACKPROTECTOR is not set
CONFIG_HZ_100=y
# CONFIG_HZ_250 is not set
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=100
# CONFIG_KEXEC is not set
CONFIG_CRASH_DUMP=y
CONFIG_PHYSICAL_START=0x200000
# CONFIG_RELOCATABLE is not set
CONFIG_PHYSICAL_ALIGN=0x200000
CONFIG_HOTPLUG_CPU=y
# CONFIG_COMPAT_VDSO is not set
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y

#
# Power management options
#
# CONFIG_PM is not set
CONFIG_SUSPEND_SMP_POSSIBLE=y
CONFIG_HIBERNATION_SMP_POSSIBLE=y

#
# CPU Frequency scaling
#
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_TABLE=y
# CONFIG_CPU_FREQ_DEBUG is not set
# CONFIG_CPU_FREQ_STAT is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set

#
# CPUFreq processor drivers
#
# CONFIG_X86_POWERNOW_K8 is not set
CONFIG_X86_P4_CLOCKMOD=m

#
# shared options
#
CONFIG_X86_SPEEDSTEP_LIB=m
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y

#
# Bus options (PCI etc.)
#
CONFIG_PCI=y
CONFIG_PCI_DIRECT=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCIEPORTBUS is not set
CONFIG_ARCH_SUPPORTS_MSI=y
# CONFIG_PCI_MSI is not set
CONFIG_PCI_LEGACY=y
CONFIG_PCI_DEBUG=y
CONFIG_HT_IRQ=y
CONFIG_ISA_DMA_API=y
CONFIG_K8_NB=y
CONFIG_PCCARD=m
CONFIG_PCMCIA_DEBUG=y
# CONFIG_PCMCIA is not set
CONFIG_CARDBUS=y

#
# PC-card bridges
#
CONFIG_YENTA=m
CONFIG_YENTA_O2=y
CONFIG_YENTA_RICOH=y
CONFIG_YENTA_TI=y
CONFIG_YENTA_ENE_TUNE=y
CONFIG_YENTA_TOSHIBA=y
CONFIG_PCCARD_NONSTATIC=m
# CONFIG_HOTPLUG_PCI is not set

#
# Executable file formats / Emulations
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_IA32_EMULATION=y
# CONFIG_IA32_AOUT is not set
CONFIG_COMPAT=y
CONFIG_COMPAT_FOR_U64_ALIGNMENT=y
CONFIG_SYSVIPC_COMPAT=y

#
# Networking
#
CONFIG_NET=y

#
# Networking options
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
CONFIG_XFRM_SUB_POLICY=y
CONFIG_XFRM_MIGRATE=y
CONFIG_NET_KEY=y
CONFIG_NET_KEY_MIGRATE=y
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
CONFIG_ARPD=y
CONFIG_SYN_COOKIES=y
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
CONFIG_INET_IPCOMP=m
CONFIG_INET_XFRM_TUNNEL=m
CONFIG_INET_TUNNEL=m
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
CONFIG_INET_XFRM_MODE_TUNNEL=m
CONFIG_INET_XFRM_MODE_BEET=m
# CONFIG_INET_LRO is not set
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
CONFIG_TCP_CONG_ADVANCED=y
CONFIG_TCP_CONG_BIC=m
CONFIG_TCP_CONG_CUBIC=y
CONFIG_TCP_CONG_WESTWOOD=y
CONFIG_TCP_CONG_HTCP=y
# CONFIG_TCP_CONG_HSTCP is not set
# CONFIG_TCP_CONG_HYBLA is not set
CONFIG_TCP_CONG_VEGAS=y
CONFIG_TCP_CONG_SCALABLE=y
# CONFIG_TCP_CONG_LP is not set
# CONFIG_TCP_CONG_VENO is not set
CONFIG_TCP_CONG_YEAH=y
# CONFIG_TCP_CONG_ILLINOIS is not set
# CONFIG_DEFAULT_BIC is not set
# CONFIG_DEFAULT_CUBIC is not set
# CONFIG_DEFAULT_HTCP is not set
# CONFIG_DEFAULT_VEGAS is not set
# CONFIG_DEFAULT_WESTWOOD is not set
CONFIG_DEFAULT_RENO=y
CONFIG_DEFAULT_TCP_CONG="reno"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IP_VS is not set
CONFIG_IPV6=y
CONFIG_IPV6_PRIVACY=y
# CONFIG_IPV6_ROUTER_PREF is not set
# CONFIG_IPV6_OPTIMISTIC_DAD is not set
CONFIG_INET6_AH=y
CONFIG_INET6_ESP=y
CONFIG_INET6_IPCOMP=y
CONFIG_IPV6_MIP6=y
CONFIG_INET6_XFRM_TUNNEL=y
CONFIG_INET6_TUNNEL=y
CONFIG_INET6_XFRM_MODE_TRANSPORT=y
# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
# CONFIG_INET6_XFRM_MODE_BEET is not set
CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=y
CONFIG_IPV6_SIT=m
CONFIG_IPV6_TUNNEL=y
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_SUBTREES=y
CONFIG_NETLABEL=y
CONFIG_NETWORK_SECMARK=y
CONFIG_NETFILTER=y
CONFIG_NETFILTER_DEBUG=y
CONFIG_BRIDGE_NETFILTER=y

#
# Core Netfilter Configuration
#
CONFIG_NETFILTER_NETLINK=m
CONFIG_NETFILTER_NETLINK_QUEUE=m
CONFIG_NETFILTER_NETLINK_LOG=m
CONFIG_NF_CONNTRACK_ENABLED=m
CONFIG_NF_CONNTRACK=m
# CONFIG_NF_CT_ACCT is not set
CONFIG_NF_CONNTRACK_MARK=y
# CONFIG_NF_CONNTRACK_SECMARK is not set
# CONFIG_NF_CONNTRACK_EVENTS is not set
# CONFIG_NF_CT_PROTO_SCTP is not set
# CONFIG_NF_CT_PROTO_UDPLITE is not set
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
# CONFIG_NF_CONNTRACK_H323 is not set
CONFIG_NF_CONNTRACK_IRC=m
CONFIG_NF_CONNTRACK_NETBIOS_NS=m
# CONFIG_NF_CONNTRACK_PPTP is not set
CONFIG_NF_CONNTRACK_SANE=m
CONFIG_NF_CONNTRACK_SIP=m
CONFIG_NF_CONNTRACK_TFTP=m
# CONFIG_NF_CT_NETLINK is not set
CONFIG_NETFILTER_XTABLES=y
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
CONFIG_NETFILTER_XT_TARGET_DSCP=m
CONFIG_NETFILTER_XT_TARGET_MARK=y
# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
CONFIG_NETFILTER_XT_TARGET_NFLOG=y
CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
CONFIG_NETFILTER_XT_TARGET_TRACE=m
CONFIG_NETFILTER_XT_TARGET_SECMARK=y
# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
CONFIG_NETFILTER_XT_MATCH_COMMENT=y
# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set
# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
CONFIG_NETFILTER_XT_MATCH_DSCP=m
CONFIG_NETFILTER_XT_MATCH_ESP=m
CONFIG_NETFILTER_XT_MATCH_HELPER=m
CONFIG_NETFILTER_XT_MATCH_LENGTH=m
CONFIG_NETFILTER_XT_MATCH_LIMIT=y
CONFIG_NETFILTER_XT_MATCH_MAC=y
CONFIG_NETFILTER_XT_MATCH_MARK=y
CONFIG_NETFILTER_XT_MATCH_POLICY=m
# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
CONFIG_NETFILTER_XT_MATCH_REALM=y
# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
CONFIG_NETFILTER_XT_MATCH_STATE=m
CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
CONFIG_NETFILTER_XT_MATCH_STRING=m
CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
# CONFIG_NETFILTER_XT_MATCH_TIME is not set
CONFIG_NETFILTER_XT_MATCH_U32=m
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m

#
# IP: Netfilter Configuration
#
CONFIG_NF_CONNTRACK_IPV4=m
CONFIG_NF_CONNTRACK_PROC_COMPAT=y
# CONFIG_IP_NF_QUEUE is not set
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_IPRANGE=m
CONFIG_IP_NF_MATCH_TOS=m
# CONFIG_IP_NF_MATCH_RECENT is not set
# CONFIG_IP_NF_MATCH_ECN is not set
CONFIG_IP_NF_MATCH_AH=m
CONFIG_IP_NF_MATCH_TTL=m
# CONFIG_IP_NF_MATCH_OWNER is not set
# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
CONFIG_IP_NF_FILTER=m
# CONFIG_IP_NF_TARGET_REJECT is not set
CONFIG_IP_NF_TARGET_LOG=m
# CONFIG_IP_NF_TARGET_ULOG is not set
CONFIG_NF_NAT=m
CONFIG_NF_NAT_NEEDED=y
# CONFIG_IP_NF_TARGET_MASQUERADE is not set
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_TARGET_NETMAP=m
# CONFIG_IP_NF_TARGET_SAME is not set
# CONFIG_NF_NAT_SNMP_BASIC is not set
CONFIG_NF_NAT_FTP=m
CONFIG_NF_NAT_IRC=m
CONFIG_NF_NAT_TFTP=m
CONFIG_NF_NAT_AMANDA=m
# CONFIG_NF_NAT_PPTP is not set
# CONFIG_NF_NAT_H323 is not set
CONFIG_NF_NAT_SIP=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_TOS=m
CONFIG_IP_NF_TARGET_ECN=m
# CONFIG_IP_NF_TARGET_TTL is not set
CONFIG_IP_NF_TARGET_CLUSTERIP=m
CONFIG_IP_NF_RAW=m
# CONFIG_IP_NF_ARPTABLES is not set

#
# IPv6: Netfilter Configuration (EXPERIMENTAL)
#
CONFIG_NF_CONNTRACK_IPV6=m
# CONFIG_IP6_NF_QUEUE is not set
CONFIG_IP6_NF_IPTABLES=m
# CONFIG_IP6_NF_MATCH_RT is not set
CONFIG_IP6_NF_MATCH_OPTS=m
# CONFIG_IP6_NF_MATCH_FRAG is not set
# CONFIG_IP6_NF_MATCH_HL is not set
CONFIG_IP6_NF_MATCH_OWNER=m
# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
CONFIG_IP6_NF_MATCH_AH=m
CONFIG_IP6_NF_MATCH_MH=m
CONFIG_IP6_NF_MATCH_EUI64=m
CONFIG_IP6_NF_FILTER=m
# CONFIG_IP6_NF_TARGET_LOG is not set
CONFIG_IP6_NF_TARGET_REJECT=m
# CONFIG_IP6_NF_MANGLE is not set
# CONFIG_IP6_NF_RAW is not set

#
# DECnet: Netfilter Configuration
#
CONFIG_DECNET_NF_GRABULATOR=m

#
# Bridge: Netfilter Configuration
#
CONFIG_BRIDGE_NF_EBTABLES=m
# CONFIG_BRIDGE_EBT_BROUTE is not set
# CONFIG_BRIDGE_EBT_T_FILTER is not set
CONFIG_BRIDGE_EBT_T_NAT=m
CONFIG_BRIDGE_EBT_802_3=m
# CONFIG_BRIDGE_EBT_AMONG is not set
# CONFIG_BRIDGE_EBT_ARP is not set
# CONFIG_BRIDGE_EBT_IP is not set
CONFIG_BRIDGE_EBT_LIMIT=m
# CONFIG_BRIDGE_EBT_MARK is not set
# CONFIG_BRIDGE_EBT_PKTTYPE is not set
# CONFIG_BRIDGE_EBT_STP is not set
# CONFIG_BRIDGE_EBT_VLAN is not set
# CONFIG_BRIDGE_EBT_ARPREPLY is not set
# CONFIG_BRIDGE_EBT_DNAT is not set
# CONFIG_BRIDGE_EBT_MARK_T is not set
# CONFIG_BRIDGE_EBT_REDIRECT is not set
CONFIG_BRIDGE_EBT_SNAT=m
CONFIG_BRIDGE_EBT_LOG=m
# CONFIG_BRIDGE_EBT_ULOG is not set
CONFIG_IP_DCCP=y
CONFIG_INET_DCCP_DIAG=y

#
# DCCP CCIDs Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP_CCID2 is not set
CONFIG_IP_DCCP_CCID3=m
CONFIG_IP_DCCP_TFRC_LIB=m
CONFIG_IP_DCCP_CCID3_DEBUG=y
CONFIG_IP_DCCP_CCID3_RTO=100

#
# DCCP Kernel Hacking
#
CONFIG_IP_DCCP_DEBUG=y
CONFIG_NET_DCCPPROBE=m
CONFIG_IP_SCTP=y
CONFIG_SCTP_DBG_MSG=y
CONFIG_SCTP_DBG_OBJCNT=y
# CONFIG_SCTP_HMAC_NONE is not set
CONFIG_SCTP_HMAC_SHA1=y
# CONFIG_SCTP_HMAC_MD5 is not set
CONFIG_TIPC=m
# CONFIG_TIPC_ADVANCED is not set
# CONFIG_TIPC_DEBUG is not set
CONFIG_ATM=m
CONFIG_ATM_CLIP=m
# CONFIG_ATM_CLIP_NO_ICMP is not set
CONFIG_ATM_LANE=m
# CONFIG_ATM_MPOA is not set
CONFIG_ATM_BR2684=m
CONFIG_ATM_BR2684_IPFILTER=y
CONFIG_BRIDGE=y
CONFIG_VLAN_8021Q=m
CONFIG_DECNET=y
CONFIG_DECNET_ROUTER=y
CONFIG_LLC=y
CONFIG_LLC2=m
CONFIG_IPX=m
CONFIG_IPX_INTERN=y
CONFIG_ATALK=y
CONFIG_DEV_APPLETALK=m
# CONFIG_IPDDP is not set
# CONFIG_X25 is not set
CONFIG_LAPB=y
# CONFIG_ECONET is not set
CONFIG_WAN_ROUTER=m
CONFIG_NET_SCHED=y

#
# Queueing/Scheduling
#
# CONFIG_NET_SCH_CBQ is not set
CONFIG_NET_SCH_HTB=y
CONFIG_NET_SCH_HFSC=y
# CONFIG_NET_SCH_ATM is not set
CONFIG_NET_SCH_PRIO=y
CONFIG_NET_SCH_RR=y
# CONFIG_NET_SCH_RED is not set
# CONFIG_NET_SCH_SFQ is not set
CONFIG_NET_SCH_TEQL=y
# CONFIG_NET_SCH_TBF is not set
CONFIG_NET_SCH_GRED=y
CONFIG_NET_SCH_DSMARK=m
CONFIG_NET_SCH_NETEM=y
CONFIG_NET_SCH_INGRESS=m

#
# Classification
#
CONFIG_NET_CLS=y
CONFIG_NET_CLS_BASIC=m
# CONFIG_NET_CLS_TCINDEX is not set
CONFIG_NET_CLS_ROUTE4=m
CONFIG_NET_CLS_ROUTE=y
CONFIG_NET_CLS_FW=m
CONFIG_NET_CLS_U32=y
CONFIG_CLS_U32_PERF=y
# CONFIG_CLS_U32_MARK is not set
CONFIG_NET_CLS_RSVP=y
CONFIG_NET_CLS_RSVP6=y
CONFIG_NET_EMATCH=y
CONFIG_NET_EMATCH_STACK=32
# CONFIG_NET_EMATCH_CMP is not set
# CONFIG_NET_EMATCH_NBYTE is not set
# CONFIG_NET_EMATCH_U32 is not set
# CONFIG_NET_EMATCH_META is not set
CONFIG_NET_EMATCH_TEXT=m
CONFIG_NET_CLS_ACT=y
CONFIG_NET_ACT_POLICE=y
CONFIG_NET_ACT_GACT=m
CONFIG_GACT_PROB=y
# CONFIG_NET_ACT_MIRRED is not set
# CONFIG_NET_ACT_IPT is not set
CONFIG_NET_ACT_NAT=y
CONFIG_NET_ACT_PEDIT=m
CONFIG_NET_ACT_SIMP=m
CONFIG_NET_CLS_POLICE=y
CONFIG_NET_CLS_IND=y
CONFIG_NET_SCH_FIFO=y

#
# Network testing
#
CONFIG_NET_PKTGEN=m
CONFIG_NET_TCPPROBE=m
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
CONFIG_BT=m
CONFIG_BT_L2CAP=m
CONFIG_BT_SCO=m
CONFIG_BT_RFCOMM=m
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BNEP=m
# CONFIG_BT_BNEP_MC_FILTER is not set
CONFIG_BT_BNEP_PROTO_FILTER=y
# CONFIG_BT_HIDP is not set

#
# Bluetooth device drivers
#
CONFIG_BT_HCIUSB=m
CONFIG_BT_HCIUSB_SCO=y
CONFIG_BT_HCIBTSDIO=m
CONFIG_BT_HCIUART=m
CONFIG_BT_HCIUART_H4=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_BT_HCIUART_LL=y
# CONFIG_BT_HCIBCM203X is not set
# CONFIG_BT_HCIBPA10X is not set
CONFIG_BT_HCIBFUSB=m
CONFIG_BT_HCIVHCI=m
CONFIG_AF_RXRPC=m
# CONFIG_AF_RXRPC_DEBUG is not set
# CONFIG_RXKAD is not set
CONFIG_FIB_RULES=y

#
# Wireless
#
CONFIG_CFG80211=m
# CONFIG_NL80211 is not set
CONFIG_WIRELESS_EXT=y
CONFIG_MAC80211=m
CONFIG_MAC80211_RCSIMPLE=y
# CONFIG_MAC80211_LEDS is not set
CONFIG_MAC80211_DEBUGFS=y
CONFIG_MAC80211_DEBUG=y
CONFIG_MAC80211_VERBOSE_DEBUG=y
CONFIG_MAC80211_LOWTX_FRAME_DUMP=y
# CONFIG_TKIP_DEBUG is not set
# CONFIG_MAC80211_DEBUG_COUNTERS is not set
# CONFIG_MAC80211_IBSS_DEBUG is not set
CONFIG_MAC80211_VERBOSE_PS_DEBUG=y
# CONFIG_IEEE80211 is not set
CONFIG_RFKILL=m
CONFIG_RFKILL_INPUT=m
CONFIG_RFKILL_LEDS=y
# CONFIG_NET_9P is not set

#
# Device Drivers
#

#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
CONFIG_CONNECTOR=m
# CONFIG_MTD is not set
CONFIG_PARPORT=y
CONFIG_PARPORT_PC=m
CONFIG_PARPORT_SERIAL=m
CONFIG_PARPORT_PC_FIFO=y
# CONFIG_PARPORT_PC_SUPERIO is not set
# CONFIG_PARPORT_GSC is not set
CONFIG_PARPORT_AX88796=m
# CONFIG_PARPORT_1284 is not set
CONFIG_PARPORT_NOT_PC=y
# CONFIG_BLK_DEV is not set
# CONFIG_MISC_DEVICES is not set
CONFIG_TIFM_CORE=m
# CONFIG_IDE is not set

#
# SCSI device support
#
CONFIG_RAID_ATTRS=y
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
CONFIG_SCSI_TGT=m
CONFIG_SCSI_NETLINK=y
CONFIG_SCSI_PROC_FS=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=y
# CONFIG_BLK_DEV_SR_VENDOR is not set
CONFIG_CHR_DEV_SG=m
CONFIG_CHR_DEV_SCH=m

#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
CONFIG_SCSI_LOGGING=y
# CONFIG_SCSI_SCAN_ASYNC is not set
CONFIG_SCSI_WAIT_SCAN=m

#
# SCSI Transports
#
CONFIG_SCSI_SPI_ATTRS=y
CONFIG_SCSI_FC_ATTRS=m
# CONFIG_SCSI_FC_TGT_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
CONFIG_SCSI_SAS_ATTRS=m
CONFIG_SCSI_SAS_LIBSAS=m
CONFIG_SCSI_SAS_ATA=y
CONFIG_SCSI_SAS_LIBSAS_DEBUG=y
CONFIG_SCSI_SRP_ATTRS=m
CONFIG_SCSI_SRP_TGT_ATTRS=y
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_ATA=y
# CONFIG_ATA_NONSTANDARD is not set
CONFIG_SATA_AHCI=y
CONFIG_SATA_SVW=m
CONFIG_ATA_PIIX=y
CONFIG_SATA_MV=m
CONFIG_SATA_NV=y
CONFIG_PDC_ADMA=y
CONFIG_SATA_QSTOR=m
# CONFIG_SATA_PROMISE is not set
CONFIG_SATA_SX4=y
CONFIG_SATA_SIL=m
# CONFIG_SATA_SIL24 is not set
CONFIG_SATA_SIS=y
CONFIG_SATA_ULI=y
CONFIG_SATA_VIA=y
# CONFIG_SATA_VITESSE is not set
CONFIG_SATA_INIC162X=m
CONFIG_PATA_ALI=y
CONFIG_PATA_AMD=y
# CONFIG_PATA_ARTOP is not set
# CONFIG_PATA_ATIIXP is not set
# CONFIG_PATA_CMD640_PCI is not set
CONFIG_PATA_CMD64X=m
CONFIG_PATA_CS5520=y
CONFIG_PATA_CS5530=y
CONFIG_PATA_CYPRESS=m
CONFIG_PATA_EFAR=y
# CONFIG_ATA_GENERIC is not set
# CONFIG_PATA_HPT366 is not set
CONFIG_PATA_HPT37X=m
CONFIG_PATA_HPT3X2N=y
CONFIG_PATA_HPT3X3=y
# CONFIG_PATA_HPT3X3_DMA is not set
CONFIG_PATA_IT821X=y
# CONFIG_PATA_IT8213 is not set
CONFIG_PATA_JMICRON=y
CONFIG_PATA_TRIFLEX=y
CONFIG_PATA_MARVELL=y
# CONFIG_PATA_MPIIX is not set
CONFIG_PATA_OLDPIIX=y
# CONFIG_PATA_NETCELL is not set
CONFIG_PATA_NS87410=m
CONFIG_PATA_NS87415=y
# CONFIG_PATA_OPTI is not set
CONFIG_PATA_OPTIDMA=m
CONFIG_PATA_PDC_OLD=y
# CONFIG_PATA_RADISYS is not set
CONFIG_PATA_RZ1000=y
# CONFIG_PATA_SC1200 is not set
# CONFIG_PATA_SERVERWORKS is not set
# CONFIG_PATA_PDC2027X is not set
CONFIG_PATA_SIL680=m
CONFIG_PATA_SIS=y
# CONFIG_PATA_VIA is not set
CONFIG_PATA_WINBOND=y
# CONFIG_MD is not set
# CONFIG_FUSION is not set

#
# IEEE 1394 (FireWire) support
#
CONFIG_FIREWIRE=m
# CONFIG_FIREWIRE_OHCI is not set
# CONFIG_FIREWIRE_SBP2 is not set
CONFIG_IEEE1394=y

#
# Subsystem Options
#
CONFIG_IEEE1394_VERBOSEDEBUG=y

#
# Controllers
#
# CONFIG_IEEE1394_PCILYNX is not set
CONFIG_IEEE1394_OHCI1394=y

#
# Protocols
#
CONFIG_IEEE1394_VIDEO1394=m
CONFIG_IEEE1394_SBP2=m
# CONFIG_IEEE1394_SBP2_PHYS_DMA is not set
CONFIG_IEEE1394_ETH1394_ROM_ENTRY=y
CONFIG_IEEE1394_ETH1394=m
CONFIG_IEEE1394_DV1394=m
CONFIG_IEEE1394_RAWIO=y
# CONFIG_I2O is not set
# CONFIG_MACINTOSH_DRIVERS is not set
CONFIG_NETDEVICES=y
# CONFIG_NETDEVICES_MULTIQUEUE is not set
CONFIG_IFB=m
# CONFIG_DUMMY is not set
CONFIG_BONDING=y
CONFIG_MACVLAN=m
CONFIG_EQUALIZER=m
CONFIG_TUN=m
CONFIG_VETH=m
CONFIG_IP1000=m
CONFIG_ARCNET=y
CONFIG_ARCNET_1201=y
CONFIG_ARCNET_1051=y
CONFIG_ARCNET_RAW=m
# CONFIG_ARCNET_CAP is not set
CONFIG_ARCNET_COM90xx=y
CONFIG_ARCNET_COM90xxIO=y
# CONFIG_ARCNET_RIM_I is not set
# CONFIG_ARCNET_COM20020 is not set
# CONFIG_PHYLIB is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
CONFIG_HAPPYMEAL=m
CONFIG_SUNGEM=y
# CONFIG_CASSINI is not set
CONFIG_NET_VENDOR_3COM=y
CONFIG_VORTEX=m
# CONFIG_TYPHOON is not set
# CONFIG_NET_TULIP is not set
CONFIG_HP100=y
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
CONFIG_NET_PCI=y
CONFIG_PCNET32=m
CONFIG_PCNET32_NAPI=y
CONFIG_AMD8111_ETH=m
# CONFIG_AMD8111E_NAPI is not set
CONFIG_ADAPTEC_STARFIRE=y
CONFIG_ADAPTEC_STARFIRE_NAPI=y
CONFIG_B44=y
CONFIG_B44_PCI_AUTOSELECT=y
CONFIG_B44_PCICORE_AUTOSELECT=y
CONFIG_B44_PCI=y
CONFIG_FORCEDETH=y
# CONFIG_FORCEDETH_NAPI is not set
# CONFIG_EEPRO100 is not set
CONFIG_E100=y
CONFIG_FEALNX=y
CONFIG_NATSEMI=y
CONFIG_NE2K_PCI=y
# CONFIG_8139CP is not set
CONFIG_8139TOO=y
CONFIG_8139TOO_PIO=y
# CONFIG_8139TOO_TUNE_TWISTER is not set
# CONFIG_8139TOO_8129 is not set
CONFIG_8139_OLD_RX_RESET=y
CONFIG_SIS900=y
CONFIG_EPIC100=y
# CONFIG_SUNDANCE is not set
CONFIG_VIA_RHINE=y
CONFIG_VIA_RHINE_MMIO=y
CONFIG_VIA_RHINE_NAPI=y
CONFIG_SC92031=m
# CONFIG_NET_POCKET is not set
# CONFIG_NETDEV_1000 is not set
CONFIG_NETDEV_10000=y
# CONFIG_CHELSIO_T1 is not set
# CONFIG_CHELSIO_T3 is not set
# CONFIG_IXGBE is not set
# CONFIG_IXGB is not set
CONFIG_S2IO=m
# CONFIG_S2IO_NAPI is not set
# CONFIG_MYRI10GE is not set
CONFIG_NETXEN_NIC=m
CONFIG_NIU=y
# CONFIG_MLX4_CORE is not set
CONFIG_TEHUTI=m
# CONFIG_TR is not set

#
# Wireless LAN
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set

#
# USB Network Adapters
#
CONFIG_USB_CATC=m
CONFIG_USB_KAWETH=m
CONFIG_USB_PEGASUS=y
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_USBNET is not set
CONFIG_WAN=y
# CONFIG_LANMEDIA is not set
# CONFIG_HDLC is not set
CONFIG_DLCI=y
CONFIG_DLCI_MAX=8
CONFIG_WAN_ROUTER_DRIVERS=m
# CONFIG_CYCLADES_SYNC is not set
CONFIG_SBNI=m
# CONFIG_SBNI_MULTILINE is not set
# CONFIG_ATM_DRIVERS is not set
CONFIG_FDDI=y
# CONFIG_DEFXX is not set
CONFIG_SKFP=m
CONFIG_HIPPI=y
# CONFIG_ROADRUNNER is not set
CONFIG_PLIP=y
CONFIG_PPP=m
# CONFIG_PPP_MULTILINK is not set
CONFIG_PPP_FILTER=y
CONFIG_PPP_ASYNC=m
# CONFIG_PPP_SYNC_TTY is not set
# CONFIG_PPP_DEFLATE is not set
CONFIG_PPP_BSDCOMP=m
# CONFIG_PPP_MPPE is not set
CONFIG_PPPOE=m
CONFIG_PPPOATM=m
CONFIG_PPPOL2TP=m
# CONFIG_SLIP is not set
CONFIG_SLHC=m
# CONFIG_NET_FC is not set
# CONFIG_SHAPER is not set
CONFIG_NETCONSOLE=y
CONFIG_NETCONSOLE_DYNAMIC=y
CONFIG_NETPOLL=y
# CONFIG_NETPOLL_TRAP is not set
CONFIG_NET_POLL_CONTROLLER=y
# CONFIG_ISDN is not set
CONFIG_PHONE=y
CONFIG_PHONE_IXJ=y

#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
CONFIG_INPUT_POLLDEV=y

#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set

#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
CONFIG_KEYBOARD_ATKBD=y
CONFIG_KEYBOARD_SUNKBD=y
CONFIG_KEYBOARD_LKKBD=y
CONFIG_KEYBOARD_XTKBD=m
CONFIG_KEYBOARD_NEWTON=m
CONFIG_KEYBOARD_STOWAWAY=y
CONFIG_INPUT_MOUSE=y
CONFIG_MOUSE_PS2=y
CONFIG_MOUSE_PS2_ALPS=y
CONFIG_MOUSE_PS2_LOGIPS2PP=y
CONFIG_MOUSE_PS2_SYNAPTICS=y
CONFIG_MOUSE_PS2_LIFEBOOK=y
CONFIG_MOUSE_PS2_TRACKPOINT=y
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
CONFIG_MOUSE_SERIAL=y
# CONFIG_MOUSE_APPLETOUCH is not set
CONFIG_MOUSE_VSXXXAA=m
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ADS7846=m
# CONFIG_TOUCHSCREEN_FUJITSU is not set
CONFIG_TOUCHSCREEN_GUNZE=m
# CONFIG_TOUCHSCREEN_ELO is not set
CONFIG_TOUCHSCREEN_MTOUCH=m
# CONFIG_TOUCHSCREEN_MK712 is not set
# CONFIG_TOUCHSCREEN_PENMOUNT is not set
CONFIG_TOUCHSCREEN_TOUCHRIGHT=m
CONFIG_TOUCHSCREEN_TOUCHWIN=m
CONFIG_TOUCHSCREEN_UCB1400=y
CONFIG_TOUCHSCREEN_USB_COMPOSITE=y
CONFIG_TOUCHSCREEN_USB_EGALAX=y
CONFIG_TOUCHSCREEN_USB_PANJIT=y
CONFIG_TOUCHSCREEN_USB_3M=y
CONFIG_TOUCHSCREEN_USB_ITM=y
CONFIG_TOUCHSCREEN_USB_ETURBO=y
CONFIG_TOUCHSCREEN_USB_GUNZE=y
CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y
CONFIG_TOUCHSCREEN_USB_IRTOUCH=y
CONFIG_TOUCHSCREEN_USB_IDEALTEK=y
CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y
CONFIG_TOUCHSCREEN_USB_GOTOP=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_PCSPKR=m
CONFIG_INPUT_ATI_REMOTE=y
# CONFIG_INPUT_ATI_REMOTE2 is not set
# CONFIG_INPUT_KEYSPAN_REMOTE is not set
# CONFIG_INPUT_POWERMATE is not set
CONFIG_INPUT_YEALINK=y
CONFIG_INPUT_UINPUT=m

#
# Hardware I/O ports
#
CONFIG_SERIO=y
CONFIG_SERIO_I8042=y
CONFIG_SERIO_SERPORT=m
CONFIG_SERIO_CT82C710=y
# CONFIG_SERIO_PARKBD is not set
# CONFIG_SERIO_PCIPS2 is not set
CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_RAW=m
CONFIG_GAMEPORT=m
# CONFIG_GAMEPORT_NS558 is not set
CONFIG_GAMEPORT_L4=m
# CONFIG_GAMEPORT_EMU10K1 is not set
# CONFIG_GAMEPORT_FM801 is not set

#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
# CONFIG_SERIAL_NONSTANDARD is not set

#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set

#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_SERIAL_JSM=y
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_PRINTER=m
CONFIG_LP_CONSOLE=y
CONFIG_PPDEV=m
CONFIG_IPMI_HANDLER=y
CONFIG_IPMI_PANIC_EVENT=y
CONFIG_IPMI_PANIC_STRING=y
CONFIG_IPMI_DEVICE_INTERFACE=m
CONFIG_IPMI_SI=y
CONFIG_IPMI_WATCHDOG=y
CONFIG_IPMI_POWEROFF=m
CONFIG_HW_RANDOM=m
# CONFIG_HW_RANDOM_INTEL is not set
# CONFIG_HW_RANDOM_AMD is not set
CONFIG_NVRAM=y
# CONFIG_RTC is not set
CONFIG_GEN_RTC=m
# CONFIG_GEN_RTC_X is not set
CONFIG_R3964=y
# CONFIG_APPLICOM is not set
# CONFIG_MWAVE is not set
CONFIG_PC8736x_GPIO=m
CONFIG_NSC_GPIO=m
CONFIG_RAW_DRIVER=m
CONFIG_MAX_RAW_DEVS=256
CONFIG_HANGCHECK_TIMER=m
CONFIG_TCG_TPM=y
CONFIG_TCG_ATMEL=m
CONFIG_TELCLOCK=m
CONFIG_DEVPORT=y
CONFIG_I2C=m
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=m

#
# I2C Algorithms
#
CONFIG_I2C_ALGOBIT=m
CONFIG_I2C_ALGOPCF=m
CONFIG_I2C_ALGOPCA=m

#
# I2C Hardware Bus support
#
# CONFIG_I2C_ALI1535 is not set
# CONFIG_I2C_ALI1563 is not set
CONFIG_I2C_ALI15X3=m
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_AMD8111 is not set
CONFIG_I2C_I801=m
# CONFIG_I2C_I810 is not set
CONFIG_I2C_PIIX4=m
CONFIG_I2C_NFORCE2=m
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PARPORT is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
CONFIG_I2C_PROSAVAGE=m
CONFIG_I2C_SAVAGE4=m
CONFIG_I2C_SIMTEC=m
# CONFIG_I2C_SIS5595 is not set
CONFIG_I2C_SIS630=m
# CONFIG_I2C_SIS96X is not set
CONFIG_I2C_TAOS_EVM=m
CONFIG_I2C_STUB=m
CONFIG_I2C_TINY_USB=m
CONFIG_I2C_VIA=m
# CONFIG_I2C_VIAPRO is not set
# CONFIG_I2C_VOODOO3 is not set

#
# Miscellaneous I2C Chip support
#
# CONFIG_SENSORS_DS1337 is not set
CONFIG_SENSORS_DS1374=m
# CONFIG_DS1682 is not set
# CONFIG_SENSORS_EEPROM is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_PCF8591 is not set
CONFIG_SENSORS_MAX6875=m
CONFIG_SENSORS_TSL2550=m
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
CONFIG_I2C_DEBUG_BUS=y
# CONFIG_I2C_DEBUG_CHIP is not set

#
# SPI support
#
CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y

#
# SPI Master Controller Drivers
#
CONFIG_SPI_BITBANG=m
CONFIG_SPI_BUTTERFLY=m
# CONFIG_SPI_LM70_LLP is not set

#
# SPI Protocol Masters
#
CONFIG_SPI_AT25=y
# CONFIG_SPI_SPIDEV is not set
CONFIG_SPI_TLE62X0=y
# CONFIG_W1 is not set
CONFIG_POWER_SUPPLY=m
CONFIG_POWER_SUPPLY_DEBUG=y
# CONFIG_PDA_POWER is not set
# CONFIG_BATTERY_DS2760 is not set
CONFIG_HWMON=y
CONFIG_HWMON_VID=y
CONFIG_SENSORS_ABITUGURU=y
CONFIG_SENSORS_ABITUGURU3=m
# CONFIG_SENSORS_AD7418 is not set
CONFIG_SENSORS_ADM1021=m
CONFIG_SENSORS_ADM1025=m
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1029 is not set
# CONFIG_SENSORS_ADM1031 is not set
CONFIG_SENSORS_ADM9240=m
CONFIG_SENSORS_ADT7470=m
# CONFIG_SENSORS_K8TEMP is not set
# CONFIG_SENSORS_ASB100 is not set
# CONFIG_SENSORS_ATXP1 is not set
CONFIG_SENSORS_DS1621=m
CONFIG_SENSORS_I5K_AMB=m
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_F71882FG is not set
# CONFIG_SENSORS_F75375S is not set
# CONFIG_SENSORS_FSCHER is not set
# CONFIG_SENSORS_FSCPOS is not set
CONFIG_SENSORS_FSCHMD=m
CONFIG_SENSORS_GL518SM=m
CONFIG_SENSORS_GL520SM=m
# CONFIG_SENSORS_CORETEMP is not set
CONFIG_SENSORS_IBMPEX=y
CONFIG_SENSORS_IT87=m
# CONFIG_SENSORS_LM63 is not set
CONFIG_SENSORS_LM70=y
CONFIG_SENSORS_LM75=m
# CONFIG_SENSORS_LM77 is not set
CONFIG_SENSORS_LM78=m
# CONFIG_SENSORS_LM80 is not set
# CONFIG_SENSORS_LM83 is not set
CONFIG_SENSORS_LM85=m
CONFIG_SENSORS_LM87=m
# CONFIG_SENSORS_LM90 is not set
# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_LM93 is not set
CONFIG_SENSORS_MAX1619=m
CONFIG_SENSORS_MAX6650=m
CONFIG_SENSORS_PC87360=y
CONFIG_SENSORS_PC87427=y
CONFIG_SENSORS_SIS5595=m
# CONFIG_SENSORS_DME1737 is not set
CONFIG_SENSORS_SMSC47M1=m
# CONFIG_SENSORS_SMSC47M192 is not set
# CONFIG_SENSORS_SMSC47B397 is not set
CONFIG_SENSORS_THMC50=m
CONFIG_SENSORS_VIA686A=y
CONFIG_SENSORS_VT1211=y
CONFIG_SENSORS_VT8231=m
CONFIG_SENSORS_W83781D=m
CONFIG_SENSORS_W83791D=m
CONFIG_SENSORS_W83792D=m
CONFIG_SENSORS_W83793=m
# CONFIG_SENSORS_W83L785TS is not set
CONFIG_SENSORS_W83627HF=m
CONFIG_SENSORS_W83627EHF=m
# CONFIG_SENSORS_HDAPS is not set
# CONFIG_SENSORS_APPLESMC is not set
CONFIG_HWMON_DEBUG_CHIP=y
# CONFIG_WATCHDOG is not set

#
# Sonics Silicon Backplane
#
CONFIG_SSB_POSSIBLE=y
CONFIG_SSB=y
CONFIG_SSB_PCIHOST_POSSIBLE=y
CONFIG_SSB_PCIHOST=y
# CONFIG_SSB_DEBUG is not set
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
CONFIG_SSB_DRIVER_PCICORE=y

#
# Multifunction device drivers
#
CONFIG_MFD_SM501=m

#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
# CONFIG_DAB is not set

#
# Graphics support
#
CONFIG_AGP=y
CONFIG_AGP_AMD64=y
CONFIG_AGP_INTEL=m
# CONFIG_AGP_SIS is not set
CONFIG_AGP_VIA=m
CONFIG_DRM=m
CONFIG_DRM_TDFX=m
# CONFIG_DRM_R128 is not set
CONFIG_DRM_RADEON=m
CONFIG_DRM_I810=m
CONFIG_DRM_I830=m
# CONFIG_DRM_I915 is not set
CONFIG_DRM_MGA=m
CONFIG_DRM_SIS=m
# CONFIG_DRM_VIA is not set
CONFIG_DRM_SAVAGE=m
CONFIG_VGASTATE=m
CONFIG_VIDEO_OUTPUT_CONTROL=y
CONFIG_FB=m
# CONFIG_FIRMWARE_EDID is not set
CONFIG_FB_DDC=m
CONFIG_FB_CFB_FILLRECT=m
CONFIG_FB_CFB_COPYAREA=m
CONFIG_FB_CFB_IMAGEBLIT=m
# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
CONFIG_FB_SYS_FILLRECT=m
CONFIG_FB_SYS_COPYAREA=m
CONFIG_FB_SYS_IMAGEBLIT=m
CONFIG_FB_SYS_FOPS=m
CONFIG_FB_DEFERRED_IO=y
CONFIG_FB_SVGALIB=m
# CONFIG_FB_MACMODES is not set
CONFIG_FB_BACKLIGHT=y
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_TILEBLITTING=y

#
# Frame buffer hardware drivers
#
# CONFIG_FB_CIRRUS is not set
# CONFIG_FB_PM2 is not set
CONFIG_FB_CYBER2000=m
# CONFIG_FB_ARC is not set
# CONFIG_FB_VGA16 is not set
# CONFIG_FB_UVESA is not set
CONFIG_FB_HECUBA=m
CONFIG_FB_HGA=m
CONFIG_FB_HGA_ACCEL=y
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_NVIDIA is not set
CONFIG_FB_RIVA=m
CONFIG_FB_RIVA_I2C=y
# CONFIG_FB_RIVA_DEBUG is not set
CONFIG_FB_RIVA_BACKLIGHT=y
CONFIG_FB_LE80578=m
CONFIG_FB_CARILLO_RANCH=m
CONFIG_FB_INTEL=m
# CONFIG_FB_INTEL_DEBUG is not set
# CONFIG_FB_INTEL_I2C is not set
CONFIG_FB_MATROX=m
CONFIG_FB_MATROX_MILLENIUM=y
# CONFIG_FB_MATROX_MYSTIQUE is not set
CONFIG_FB_MATROX_G=y
# CONFIG_FB_MATROX_I2C is not set
CONFIG_FB_MATROX_MULTIHEAD=y
# CONFIG_FB_RADEON is not set
# CONFIG_FB_ATY128 is not set
# CONFIG_FB_ATY is not set
# CONFIG_FB_S3 is not set
# CONFIG_FB_SAVAGE is not set
CONFIG_FB_SIS=m
CONFIG_FB_SIS_300=y
# CONFIG_FB_SIS_315 is not set
CONFIG_FB_NEOMAGIC=m
CONFIG_FB_KYRO=m
CONFIG_FB_3DFX=m
CONFIG_FB_3DFX_ACCEL=y
CONFIG_FB_VOODOO1=m
# CONFIG_FB_VT8623 is not set
# CONFIG_FB_TRIDENT is not set
CONFIG_FB_ARK=m
# CONFIG_FB_PM3 is not set
# CONFIG_FB_GEODE is not set
# CONFIG_FB_SM501 is not set
# CONFIG_FB_VIRTUAL is not set
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CORGI=y
CONFIG_BACKLIGHT_PROGEAR=y

#
# Display device support
#
CONFIG_DISPLAY_SUPPORT=y

#
# Display hardware drivers
#

#
# Console display driver support
#
CONFIG_VGA_CONSOLE=y
# CONFIG_VGACON_SOFT_SCROLLBACK is not set
# CONFIG_VIDEO_SELECT is not set
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE is not set
# CONFIG_LOGO is not set

#
# Sound
#
# CONFIG_SOUND is not set
CONFIG_AC97_BUS=y
# CONFIG_HID_SUPPORT is not set
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
CONFIG_USB=y
CONFIG_USB_DEBUG=y

#
# Miscellaneous USB options
#
# CONFIG_USB_DEVICEFS is not set
CONFIG_USB_DEVICE_CLASS=y
CONFIG_USB_DYNAMIC_MINORS=y
# CONFIG_USB_OTG is not set

#
# USB Host Controller Drivers
#
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_SPLIT_ISO=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_EHCI_TT_NEWSCHED=y
CONFIG_USB_ISP116X_HCD=m
CONFIG_USB_OHCI_HCD=y
# CONFIG_USB_OHCI_HCD_SSB is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_USB_UHCI_HCD=y
CONFIG_USB_U132_HCD=m
CONFIG_USB_SL811_HCD=y
CONFIG_USB_R8A66597_HCD=y

#
# USB Device Class drivers
#
CONFIG_USB_ACM=y
CONFIG_USB_PRINTER=m

#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#

#
# may also be needed; see USB_STORAGE Help for more information
#
# CONFIG_USB_STORAGE is not set
CONFIG_USB_LIBUSUAL=y

#
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
CONFIG_USB_MICROTEK=y
# CONFIG_USB_MON is not set

#
# USB port drivers
#
# CONFIG_USB_USS720 is not set

#
# USB Serial Converter support
#
CONFIG_USB_SERIAL=m
CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_AIRCABLE=m
# CONFIG_USB_SERIAL_AIRPRIME is not set
CONFIG_USB_SERIAL_ARK3116=m
# CONFIG_USB_SERIAL_BELKIN is not set
CONFIG_USB_SERIAL_CH341=m
CONFIG_USB_SERIAL_WHITEHEAT=m
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
CONFIG_USB_SERIAL_CP2101=m
# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
CONFIG_USB_SERIAL_EMPEG=m
# CONFIG_USB_SERIAL_FTDI_SIO is not set
CONFIG_USB_SERIAL_FUNSOFT=m
CONFIG_USB_SERIAL_VISOR=m
# CONFIG_USB_SERIAL_IPAQ is not set
CONFIG_USB_SERIAL_IR=m
CONFIG_USB_SERIAL_EDGEPORT=m
CONFIG_USB_SERIAL_EDGEPORT_TI=m
# CONFIG_USB_SERIAL_GARMIN is not set
CONFIG_USB_SERIAL_IPW=m
CONFIG_USB_SERIAL_KEYSPAN_PDA=m
CONFIG_USB_SERIAL_KEYSPAN=m
# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set
CONFIG_USB_SERIAL_KEYSPAN_USA28=y
CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set
CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set
CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set
# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set
# CONFIG_USB_SERIAL_KLSI is not set
# CONFIG_USB_SERIAL_KOBIL_SCT is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_MOS7720 is not set
CONFIG_USB_SERIAL_MOS7840=m
# CONFIG_USB_SERIAL_NAVMAN is not set
CONFIG_USB_SERIAL_PL2303=m
# CONFIG_USB_SERIAL_OTI6858 is not set
CONFIG_USB_SERIAL_HP4X=m
CONFIG_USB_SERIAL_SAFE=m
CONFIG_USB_SERIAL_SAFE_PADDED=y
CONFIG_USB_SERIAL_SIERRAWIRELESS=m
# CONFIG_USB_SERIAL_TI is not set
CONFIG_USB_SERIAL_CYBERJACK=m
CONFIG_USB_SERIAL_XIRCOM=m
CONFIG_USB_SERIAL_OPTION=m
# CONFIG_USB_SERIAL_OMNINET is not set
CONFIG_USB_SERIAL_DEBUG=m
CONFIG_USB_EZUSB=y

#
# USB Miscellaneous drivers
#
CONFIG_USB_EMI62=y
CONFIG_USB_EMI26=m
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_AUERSWALD is not set
CONFIG_USB_RIO500=m
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_BERRY_CHARGE is not set
CONFIG_USB_LED=y
CONFIG_USB_CYPRESS_CY7C63=y
CONFIG_USB_CYTHERM=m
CONFIG_USB_PHIDGET=m
# CONFIG_USB_PHIDGETKIT is not set
CONFIG_USB_PHIDGETMOTORCONTROL=m
CONFIG_USB_PHIDGETSERVO=m
# CONFIG_USB_IDMOUSE is not set
CONFIG_USB_FTDI_ELAN=m
# CONFIG_USB_APPLEDISPLAY is not set
CONFIG_USB_SISUSBVGA=m
# CONFIG_USB_SISUSBVGA_CON is not set
# CONFIG_USB_LD is not set
CONFIG_USB_TRANCEVIBRATOR=m
CONFIG_USB_IOWARRIOR=m

#
# USB DSL modem support
#
# CONFIG_USB_ATM is not set

#
# USB Gadget Support
#
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG=y
# CONFIG_USB_GADGET_DEBUG_FILES is not set
CONFIG_USB_GADGET_DEBUG_FS=y
CONFIG_USB_GADGET_SELECTED=y
# CONFIG_USB_GADGET_AMD5536UDC is not set
# CONFIG_USB_GADGET_ATMEL_USBA is not set
# CONFIG_USB_GADGET_FSL_USB2 is not set
# CONFIG_USB_GADGET_NET2280 is not set
# CONFIG_USB_GADGET_PXA2XX is not set
# CONFIG_USB_GADGET_M66592 is not set
CONFIG_USB_GADGET_GOKU=y
CONFIG_USB_GOKU=y
# CONFIG_USB_GADGET_LH7A40X is not set
# CONFIG_USB_GADGET_OMAP is not set
# CONFIG_USB_GADGET_S3C2410 is not set
# CONFIG_USB_GADGET_AT91 is not set
# CONFIG_USB_GADGET_DUMMY_HCD is not set
# CONFIG_USB_GADGET_DUALSPEED is not set
# CONFIG_USB_ZERO is not set
# CONFIG_USB_ETH is not set
CONFIG_USB_GADGETFS=y
# CONFIG_USB_FILE_STORAGE is not set
# CONFIG_USB_G_SERIAL is not set
# CONFIG_USB_MIDI_GADGET is not set
CONFIG_MMC=m
CONFIG_MMC_DEBUG=y
CONFIG_MMC_UNSAFE_RESUME=y

#
# MMC/SD Card Drivers
#
# CONFIG_MMC_BLOCK is not set
CONFIG_SDIO_UART=m

#
# MMC/SD Host Controller Drivers
#
# CONFIG_MMC_SDHCI is not set
CONFIG_MMC_WBSD=m
CONFIG_MMC_TIFM_SD=m
# CONFIG_MMC_SPI is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y

#
# LED drivers
#

#
# LED Triggers
#
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=m
# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
# CONFIG_INFINIBAND is not set
CONFIG_EDAC=y

#
# Reporting subsystems
#
# CONFIG_EDAC_DEBUG is not set
# CONFIG_EDAC_MM_EDAC is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set

#
# RTC interfaces
#
# CONFIG_RTC_INTF_SYSFS is not set
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
CONFIG_RTC_DRV_TEST=y

#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_DS1307 is not set
CONFIG_RTC_DRV_DS1374=m
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
CONFIG_RTC_DRV_RS5C372=m
CONFIG_RTC_DRV_ISL1208=m
# CONFIG_RTC_DRV_X1205 is not set
CONFIG_RTC_DRV_PCF8563=m
CONFIG_RTC_DRV_PCF8583=m
# CONFIG_RTC_DRV_M41T80 is not set

#
# SPI RTC drivers
#
CONFIG_RTC_DRV_RS5C348=y
CONFIG_RTC_DRV_MAX6902=m

#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
CONFIG_RTC_DRV_DS1553=m
# CONFIG_RTC_DRV_STK17TA8 is not set
CONFIG_RTC_DRV_DS1742=y
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T59 is not set
CONFIG_RTC_DRV_V3020=y

#
# on-CPU RTC drivers
#
CONFIG_DMADEVICES=y

#
# DMA Devices
#
CONFIG_INTEL_IOATDMA=y
CONFIG_DMA_ENGINE=y

#
# DMA Clients
#
CONFIG_NET_DMA=y
CONFIG_DCA=y
# CONFIG_AUXDISPLAY is not set
CONFIG_VIRTUALIZATION=y
# CONFIG_KVM is not set

#
# Userspace I/O
#
CONFIG_UIO=y
CONFIG_UIO_CIF=m

#
# Firmware Drivers
#
# CONFIG_EDD is not set
# CONFIG_DELL_RBU is not set
CONFIG_DCDBAS=y
# CONFIG_DMIID is not set

#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
CONFIG_EXT2_FS_XIP=y
CONFIG_FS_XIP=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
# CONFIG_EXT4DEV_FS is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
CONFIG_OCFS2_FS=y
CONFIG_OCFS2_DEBUG_MASKLOG=y
# CONFIG_OCFS2_DEBUG_FS is not set
CONFIG_MINIX_FS=m
CONFIG_ROMFS_FS=y
# CONFIG_INOTIFY is not set
CONFIG_QUOTA=y
# CONFIG_QUOTA_NETLINK_INTERFACE is not set
CONFIG_PRINT_QUOTA_WARNING=y
# CONFIG_QFMT_V1 is not set
CONFIG_QFMT_V2=y
CONFIG_QUOTACTL=y
CONFIG_DNOTIFY=y
CONFIG_AUTOFS_FS=m
CONFIG_AUTOFS4_FS=y
# CONFIG_FUSE_FS is not set

#
# CD-ROM/DVD Filesystems
#
CONFIG_ISO9660_FS=y
# CONFIG_JOLIET is not set
CONFIG_ZISOFS=y
CONFIG_UDF_FS=m
CONFIG_UDF_NLS=y

#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
CONFIG_NTFS_FS=m
# CONFIG_NTFS_DEBUG is not set
# CONFIG_NTFS_RW is not set

#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_PROC_KCORE is not set
# CONFIG_PROC_VMCORE is not set
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
CONFIG_CONFIGFS_FS=y

#
# Miscellaneous filesystems
#
CONFIG_ADFS_FS=m
CONFIG_ADFS_FS_RW=y
# CONFIG_AFFS_FS is not set
CONFIG_ECRYPT_FS=y
CONFIG_HFS_FS=m
# CONFIG_HFSPLUS_FS is not set
CONFIG_BEFS_FS=y
# CONFIG_BEFS_DEBUG is not set
CONFIG_BFS_FS=m
# CONFIG_EFS_FS is not set
CONFIG_CRAMFS=m
CONFIG_VXFS_FS=m
CONFIG_HPFS_FS=y
CONFIG_QNX4FS_FS=y
CONFIG_SYSV_FS=y
CONFIG_UFS_FS=y
CONFIG_UFS_FS_WRITE=y
# CONFIG_UFS_DEBUG is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
CONFIG_NFSD=m
# CONFIG_NFSD_V3 is not set
# CONFIG_NFSD_TCP is not set
CONFIG_LOCKD=y
CONFIG_EXPORTFS=m
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=m
# CONFIG_SUNRPC_BIND34 is not set
CONFIG_RPCSEC_GSS_KRB5=m
CONFIG_RPCSEC_GSS_SPKM3=m
CONFIG_SMB_FS=y
# CONFIG_SMB_NLS_DEFAULT is not set
# CONFIG_CIFS is not set
CONFIG_NCP_FS=y
# CONFIG_NCPFS_PACKET_SIGNING is not set
# CONFIG_NCPFS_IOCTL_LOCKING is not set
CONFIG_NCPFS_STRONG=y
CONFIG_NCPFS_NFS_NS=y
CONFIG_NCPFS_OS2_NS=y
# CONFIG_NCPFS_SMALLDOS is not set
# CONFIG_NCPFS_NLS is not set
# CONFIG_NCPFS_EXTRAS is not set
CONFIG_CODA_FS=y
# CONFIG_CODA_FS_OLD_API is not set
# CONFIG_AFS_FS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
CONFIG_ACORN_PARTITION=y
CONFIG_ACORN_PARTITION_CUMANA=y
# CONFIG_ACORN_PARTITION_EESOX is not set
CONFIG_ACORN_PARTITION_ICS=y
# CONFIG_ACORN_PARTITION_ADFS is not set
CONFIG_ACORN_PARTITION_POWERTEC=y
CONFIG_ACORN_PARTITION_RISCIX=y
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
CONFIG_ATARI_PARTITION=y
CONFIG_MAC_PARTITION=y
CONFIG_MSDOS_PARTITION=y
CONFIG_BSD_DISKLABEL=y
CONFIG_MINIX_SUBPARTITION=y
# CONFIG_SOLARIS_X86_PARTITION is not set
CONFIG_UNIXWARE_DISKLABEL=y
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
CONFIG_ULTRIX_PARTITION=y
# CONFIG_SUN_PARTITION is not set
# CONFIG_KARMA_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
# CONFIG_SYSV68_PARTITION is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
CONFIG_NLS_CODEPAGE_775=m
# CONFIG_NLS_CODEPAGE_850 is not set
CONFIG_NLS_CODEPAGE_852=y
CONFIG_NLS_CODEPAGE_855=m
# CONFIG_NLS_CODEPAGE_857 is not set
CONFIG_NLS_CODEPAGE_860=m
# CONFIG_NLS_CODEPAGE_861 is not set
CONFIG_NLS_CODEPAGE_862=y
CONFIG_NLS_CODEPAGE_863=m
CONFIG_NLS_CODEPAGE_864=y
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
CONFIG_NLS_CODEPAGE_869=m
CONFIG_NLS_CODEPAGE_936=y
CONFIG_NLS_CODEPAGE_950=y
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
CONFIG_NLS_CODEPAGE_874=y
CONFIG_NLS_ISO8859_8=m
# CONFIG_NLS_CODEPAGE_1250 is not set
CONFIG_NLS_CODEPAGE_1251=y
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=m
CONFIG_NLS_ISO8859_2=m
CONFIG_NLS_ISO8859_3=m
CONFIG_NLS_ISO8859_4=y
CONFIG_NLS_ISO8859_5=y
CONFIG_NLS_ISO8859_6=y
# CONFIG_NLS_ISO8859_7 is not set
CONFIG_NLS_ISO8859_9=y
# CONFIG_NLS_ISO8859_13 is not set
CONFIG_NLS_ISO8859_14=y
# CONFIG_NLS_ISO8859_15 is not set
CONFIG_NLS_KOI8_R=m
CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=m
CONFIG_DLM=y
# CONFIG_DLM_DEBUG is not set
CONFIG_INSTRUMENTATION=y
# CONFIG_PROFILING is not set
CONFIG_KPROBES=y
CONFIG_MARKERS=y

#
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_PRINTK_TIME=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
CONFIG_HEADERS_CHECK=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_SHIRQ=y
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_SCHED_DEBUG is not set
CONFIG_SCHEDSTATS=y
CONFIG_TIMER_STATS=y
CONFIG_SLUB_DEBUG_ON=y
CONFIG_DEBUG_RT_MUTEXES=y
CONFIG_DEBUG_PI_LIST=y
# CONFIG_RT_MUTEX_TESTER is not set
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_MUTEXES=y
CONFIG_DEBUG_LOCK_ALLOC=y
CONFIG_PROVE_LOCKING=y
CONFIG_LOCKDEP=y
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_LOCKDEP is not set
CONFIG_TRACE_IRQFLAGS=y
CONFIG_DEBUG_SPINLOCK_SLEEP=y
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
CONFIG_STACKTRACE=y
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
CONFIG_FRAME_POINTER=y
CONFIG_FORCED_INLINING=y
# CONFIG_BOOT_PRINTK_DELAY is not set
CONFIG_RCU_TORTURE_TEST=m
CONFIG_LKDTM=y
# CONFIG_FAULT_INJECTION is not set
CONFIG_PROVIDE_OHCI1394_DMA_INIT=y
CONFIG_SAMPLES=y
CONFIG_SAMPLE_MARKERS=m
CONFIG_EARLY_PRINTK=y
CONFIG_DEBUG_STACKOVERFLOW=y
# CONFIG_DEBUG_STACK_USAGE is not set
CONFIG_DEBUG_RODATA=y
CONFIG_IOMMU_DEBUG=y
CONFIG_IOMMU_LEAK=y
CONFIG_IO_DELAY_TYPE_0X80=0
CONFIG_IO_DELAY_TYPE_0XED=1
CONFIG_IO_DELAY_TYPE_UDELAY=2
CONFIG_IO_DELAY_TYPE_NONE=3
# CONFIG_IO_DELAY_0X80 is not set
# CONFIG_IO_DELAY_0XED is not set
CONFIG_IO_DELAY_UDELAY=y
# CONFIG_IO_DELAY_NONE is not set
CONFIG_DEFAULT_IO_DELAY_TYPE=2

#
# Security options
#
CONFIG_KEYS=y
# CONFIG_KEYS_DEBUG_PROC_KEYS is not set
CONFIG_SECURITY=y
# CONFIG_SECURITY_NETWORK is not set
CONFIG_SECURITY_CAPABILITIES=y
CONFIG_SECURITY_FILE_CAPABILITIES=y
# CONFIG_SECURITY_ROOTPLUG is not set
CONFIG_CRYPTO=y
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ABLKCIPHER=y
CONFIG_CRYPTO_AEAD=m
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_XCBC=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA1=y
# CONFIG_CRYPTO_SHA256 is not set
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_WP512=y
CONFIG_CRYPTO_TGR192=m
CONFIG_CRYPTO_GF128MUL=y
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_CBC=y
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_LRW is not set
CONFIG_CRYPTO_XTS=y
CONFIG_CRYPTO_CRYPTD=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_FCRYPT=m
CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_TWOFISH=m
CONFIG_CRYPTO_TWOFISH_COMMON=y
CONFIG_CRYPTO_TWOFISH_X86_64=y
CONFIG_CRYPTO_SERPENT=m
CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_AES_X86_64=y
CONFIG_CRYPTO_CAST5=m
# CONFIG_CRYPTO_CAST6 is not set
CONFIG_CRYPTO_TEA=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_KHAZAD=m
CONFIG_CRYPTO_ANUBIS=y
CONFIG_CRYPTO_SEED=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_CRC32C=m
CONFIG_CRYPTO_CAMELLIA=m
# CONFIG_CRYPTO_TEST is not set
CONFIG_CRYPTO_AUTHENC=m
CONFIG_CRYPTO_HW=y

#
# Library routines
#
CONFIG_BITREVERSE=y
CONFIG_CRC_CCITT=m
CONFIG_CRC16=y
CONFIG_CRC_ITU_T=m
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_TEXTSEARCH=y
CONFIG_TEXTSEARCH_KMP=m
CONFIG_TEXTSEARCH_BM=m
CONFIG_TEXTSEARCH_FSM=m
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y

[-- Attachment #3: crash.log --]
[-- Type: text/plain, Size: 67970 bytes --]

[    0.000000] Linux version 2.6.24-rc5 (mingo@dione) (gcc version 4.2.2) #5 SMP Thu Dec 20 11:48:15 CET 2007
[    0.000000] Command line: root=/dev/sda6 console=ttyS0,115200 earlyprintk=serial,ttyS0,115200 3 profile=0 debug initcall_debug enforcing=0 apic=verbose sysrq_always_enabled ignore_loglevel selinux=0
[    0.000000] BIOS-provided physical RAM map:
[    0.000000]  BIOS-e820: 0000000000000000 - 000000000009f800 (usable)
[    0.000000]  BIOS-e820: 000000000009f800 - 00000000000a0000 (reserved)
[    0.000000]  BIOS-e820: 00000000000f0000 - 0000000000100000 (reserved)
[    0.000000]  BIOS-e820: 0000000000100000 - 000000003fff0000 (usable)
[    0.000000]  BIOS-e820: 000000003fff0000 - 000000003fff3000 (ACPI NVS)
[    0.000000]  BIOS-e820: 000000003fff3000 - 0000000040000000 (ACPI data)
[    0.000000]  BIOS-e820: 00000000e0000000 - 00000000f0000000 (reserved)
[    0.000000]  BIOS-e820: 00000000fec00000 - 0000000100000000 (reserved)
[    0.000000] console [earlyser0] enabled
[    0.000000] end_pfn_map = 1048576
kernel direct mapping tables up to 100000000 @ 8000-d000
[    0.000000] DMI 2.3 present.
[    0.000000] Scanning NUMA topology in Northbridge 24
[    0.000000] No NUMA configuration found
[    0.000000] Faking a node at 0000000000000000-000000003fff0000
[    0.000000] Bootmem setup node 0 0000000000000000-000000003fff0000
[    0.000000] Zone PFN ranges:
[    0.000000]   DMA             0 ->     4096
[    0.000000]   DMA32        4096 ->  1048576
[    0.000000]   Normal    1048576 ->  1048576
[    0.000000] Movable zone start PFN for each node
[    0.000000] early_node_map[2] active PFN ranges
[    0.000000]     0:        0 ->      159
[    0.000000]     0:      256 ->   262128
[    0.000000] Intel MultiProcessor Specification v1.4
[    0.000000] MPTABLE: OEM ID: OEM00000 MPTABLE: Product ID: PROD00000000 MPTABLE: APIC at: 0xFEE00000
[    0.000000] Processor #0 (Bootup-CPU)
[    0.000000] Processor #1
[    0.000000] I/O APIC #2 at 0xFEC00000.
[    0.000000] Setting APIC routing to flat
[    0.000000] Processors: 2
[    0.000000] mapped APIC to ffffffffff5fb000 (        fee00000)
[    0.000000] mapped IOAPIC to ffffffffff5fa000 (00000000fec00000)
[    0.000000] Allocating PCI resources starting at 50000000 (gap: 40000000:a0000000)
[    0.000000] SMP: Allowing 2 CPUs, 0 hotplug CPUs
[    0.000000] PERCPU: Allocating 36776 bytes of per cpu data
[    0.000000] Built 1 zonelists in Node order, mobility grouping on.  Total pages: 252836
[    0.000000] Policy zone: DMA32
[    0.000000] Kernel command line: root=/dev/sda6 console=ttyS0,115200 earlyprintk=serial,ttyS0,115200 3 profile=0 debug initcall_debug enforcing=0 apic=verbose sysrq_always_enabled ignore_loglevel selinux=0
[    0.000000] kernel profiling enabled (shift: 0)
[    0.000000] debug: sysrq always enabled.
[    0.000000] debug: ignoring loglevel setting.
[    0.000000] Initializing CPU#0
[    0.000000] PID hash table entries: 4096 (order: 12, 32768 bytes)
[    0.000000] TSC calibrated against PIT
[    0.000000] Marking TSC unstable due to TSCs unsynchronized
[    0.000000] time.c: Detected 2160.231 MHz processor.
[    0.000000] spurious 8259A interrupt: IRQ7.
[    0.000000] Console: colour VGA+ 80x25
[    0.000000] console handover: boot [earlyser0] -> real [ttyS0]
[    0.000000] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
[    0.000000] ... MAX_LOCKDEP_SUBCLASSES:    8
[    0.000000] ... MAX_LOCK_DEPTH:          30
[    0.000000] ... MAX_LOCKDEP_KEYS:        2048
[    0.000000] ... CLASSHASH_SIZE:           1024
[    0.000000] ... MAX_LOCKDEP_ENTRIES:     8192
[    0.000000] ... MAX_LOCKDEP_CHAINS:      16384
[    0.000000] ... CHAINHASH_SIZE:          8192
[    0.000000]  memory used by lock dependency info: 1648 kB
[    0.000000]  per task-struct memory footprint: 1680 bytes
[    0.000000] Checking aperture...
[    0.000000] CPU 0: aperture @ 8000000 size 32 MB
[    0.000000] Aperture too small (32 MB)
[    0.000000] No AGP bridge found
[    0.000000] Your BIOS doesn't leave a aperture memory hole
[    0.000000] Please enable the IOMMU option in the BIOS setup
[    0.000000] This costs you 64 MB of RAM
[    0.000000] Mapping aperture over 65536 KB of RAM @ 8000000
[    0.000000] Memory: 925164k/1048512k available (5134k kernel code, 122960k reserved, 2875k data, 336k init)
[    0.000000] SLUB: Genslabs=12, HWalign=64, Order=0-1, MinObjects=4, CPUs=2, Nodes=1
[    0.000000] Calibrating delay using timer specific routine.. 4323.09 BogoMIPS (lpj=21615451)
[    0.000000] Security Framework initialized
[    0.000000] Capability LSM initialized
[    0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes)
[    0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes)
[    0.000000] Mount-cache hash table entries: 256
[    0.000000] Initializing cgroup subsys cpuacct
[    0.000000] CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
[    0.000000] CPU: L2 Cache: 512K (64 bytes/line)
[    0.000000] CPU 0/0 -> Node 0
[    0.000000] CPU: Physical Processor ID: 0
[    0.000000] CPU: Processor Core ID: 0
[    0.000000] lockdep: not fixing up alternatives.
[    0.000000] enabled ExtINT on CPU#0
[    0.000000] ExtINT not setup in hardware but reported by MP table
[    0.000000] ENABLING IO-APIC IRQs
[    0.000000] init IO_APIC IRQs
[    0.000000]  IO-APIC (apicid-pin) 2-0 not connected.
[    0.000000] IOAPIC[0]: Set routing entry (2-1 -> 0x31 -> IRQ 1 Mode:0 Active:0)
[    0.000000] IOAPIC[0]: Set routing entry (2-2 -> 0x30 -> IRQ 0 Mode:0 Active:0)
[    0.000000] IOAPIC[0]: Set routing entry (2-3 -> 0x33 -> IRQ 3 Mode:1 Active:1)
[    0.000000] IOAPIC[0]: Set routing entry (2-4 -> 0x34 -> IRQ 4 Mode:0 Active:0)
[    0.000000] IOAPIC[0]: Set routing entry (2-5 -> 0x35 -> IRQ 5 Mode:1 Active:1)
[    0.000000] IOAPIC[0]: Set routing entry (2-6 -> 0x36 -> IRQ 6 Mode:0 Active:0)
[    0.000000] IOAPIC[0]: Set routing entry (2-7 -> 0x37 -> IRQ 7 Mode:0 Active:0)
[    0.000000] IOAPIC[0]: Set routing entry (2-8 -> 0x38 -> IRQ 8 Mode:0 Active:0)
[    0.000000] IOAPIC[0]: Set routing entry (2-9 -> 0x39 -> IRQ 9 Mode:0 Active:0)
[    0.000000] IOAPIC[0]: Set routing entry (2-10 -> 0x3a -> IRQ 10 Mode:0 Active:0)
[    0.000000] IOAPIC[0]: Set routing entry (2-11 -> 0x3b -> IRQ 11 Mode:1 Active:1)
[    0.000000] IOAPIC[0]: Set routing entry (2-12 -> 0x3c -> IRQ 12 Mode:0 Active:0)
[    0.000000] IOAPIC[0]: Set routing entry (2-13 -> 0x3d -> IRQ 13 Mode:0 Active:0)
[    0.000000] IOAPIC[0]: Set routing entry (2-14 -> 0x3e -> IRQ 14 Mode:0 Active:0)
[    0.000000] IOAPIC[0]: Set routing entry (2-15 -> 0x3f -> IRQ 15 Mode:0 Active:0)
[    0.000000]  IO-APIC (apicid-pin) 2-16, 2-17, 2-18, 2-19, 2-20, 2-21, 2-22, 2-23 not connected.
[    0.000000] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=0 pin2=0
[    0.000000] ..MP-BIOS bug: 8254 timer not connected to IO-APIC
[    0.000000] ...trying to set up timer (IRQ0) through the 8259A ... 
[    0.000000] ..... (found apic 0 pin 0) ... works.
[    0.000000] number of MP IRQ sources: 17.
[    0.000000] number of IO-APIC #2 registers: 24.
[    0.000000] testing the IO APIC.......................
[    0.000000] 
[    0.000000] IO APIC #2......
[    0.000000] .... register #00: 00000000
[    0.000000] .......    : physical APIC id: 00
[    0.000000] .... register #01: 00170011
[    0.000000] .......     : max redirection entries: 0017
[    0.000000] .......     : PRQ implemented: 0
[    0.000000] .......     : IO APIC version: 0011
[    0.000000] .... register #02: 00000000
[    0.000000] .......     : arbitration: 00
[    0.000000] .... IRQ redirection table:
[    0.000000]  NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:   
[    0.000000]  00 001 0    0    0   0   0    1    1    30
[    0.000000]  01 001 0    0    0   0   0    1    1    31
[    0.000000]  02 000 1    0    0   0   0    0    0    00
[    0.000000]  03 001 1    1    0   1   0    1    1    33
[    0.000000]  04 001 0    0    0   0   0    1    1    34
[    0.000000]  05 001 1    1    0   1   0    1    1    35
[    0.000000]  06 001 0    0    0   0   0    1    1    36
[    0.000000]  07 001 0    0    0   0   0    1    1    37
[    0.000000]  08 001 0    0    0   0   0    1    1    38
[    0.000000]  09 001 0    0    0   0   0    1    1    39
[    0.000000]  0a 001 0    0    0   0   0    1    1    3A
[    0.000000]  0b 001 1    1    0   1   0    1    1    3B
[    0.000000]  0c 001 0    0    0   0   0    1    1    3C
[    0.000000]  0d 001 0    0    0   0   0    1    1    3D
[    0.000000]  0e 001 0    0    0   0   0    1    1    3E
[    0.000000]  0f 001 0    0    0   0   0    1    1    3F
[    0.000000]  10 000 1    0    0   0   0    0    0    00
[    0.000000]  11 000 1    0    0   0   0    0    0    00
[    0.000000]  12 000 1    0    0   0   0    0    0    00
[    0.000000]  13 000 1    0    0   0   0    0    0    00
[    0.000000]  14 000 1    0    0   0   0    0    0    00
[    0.000000]  15 000 1    0    0   0   0    0    0    00
[    0.000000]  16 000 1    0    0   0   0    0    0    00
[    0.000000]  17 000 1    0    0   0   0    0    0    00
[    0.000000] IRQ to pin mappings:
[    0.000000] IRQ0 -> 0:2
[    0.000000] IRQ1 -> 0:1
[    0.000000] IRQ3 -> 0:3
[    0.000000] IRQ4 -> 0:4
[    0.000000] IRQ5 -> 0:5
[    0.000000] IRQ6 -> 0:6
[    0.000000] IRQ7 -> 0:7
[    0.000000] IRQ8 -> 0:8
[    0.000000] IRQ9 -> 0:9
[    0.000000] IRQ10 -> 0:10
[    0.000000] IRQ11 -> 0:11
[    0.000000] IRQ12 -> 0:12
[    0.000000] IRQ13 -> 0:13
[    0.000000] IRQ14 -> 0:14
[    0.000000] IRQ15 -> 0:15
[    0.000000] .................................... done.
[    0.000000] Using local APIC timer interrupts.
[    0.000000] APIC timer calibration result 13501459
[    0.000000] Detected 13.501 MHz APIC timer.
[    0.000000] lockdep: not fixing up alternatives.
[    0.000000] Booting processor 1/2 APIC 0x1
[    0.000000] Initializing CPU#1
[    0.000000] masked ExtINT on CPU#1
[    0.000000] Calibrating delay using timer specific routine.. 4320.49 BogoMIPS (lpj=21602471)
[    0.000000] CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
[    0.000000] CPU: L2 Cache: 512K (64 bytes/line)
[    0.000000] CPU 1/1 -> Node 0
[    0.000000] CPU: Physical Processor ID: 0
[    0.000000] CPU: Processor Core ID: 1
[    0.000000] AMD Athlon(tm) 64 X2 Dual Core Processor 3800+ stepping 02
[    0.000000] Brought up 2 CPUs
[    0.000000] Calling initcall 0xffffffff80a256f0: init_cpufreq_transition_notifier_list+0x0/0x20()
[    0.000000] initcall 0xffffffff80a256f0: init_cpufreq_transition_notifier_list+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a256f0 ran for 0 msecs: init_cpufreq_transition_notifier_list+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a27920: net_ns_init+0x0/0x160()
[    0.000000] net_namespace: 144 bytes
[    0.000000] initcall 0xffffffff80a27920: net_ns_init+0x0/0x160() returned 0.
[    0.000000] initcall 0xffffffff80a27920 ran for 0 msecs: net_ns_init+0x0/0x160()
[    0.000000] Calling initcall 0xffffffff80a0a820: cpufreq_tsc+0x0/0x20()
[    0.000000] initcall 0xffffffff80a0a820: cpufreq_tsc+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a0a820 ran for 0 msecs: cpufreq_tsc+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff8021acf0: init_smp_flush+0x0/0x70()
[    0.000000] initcall 0xffffffff8021acf0: init_smp_flush+0x0/0x70() returned 0.
[    0.000000] initcall 0xffffffff8021acf0 ran for 0 msecs: init_smp_flush+0x0/0x70()
[    0.000000] Calling initcall 0xffffffff80a129f0: init_compat_elf_binfmt+0x0/0x20()
[    0.000000] initcall 0xffffffff80a129f0: init_compat_elf_binfmt+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a129f0 ran for 0 msecs: init_compat_elf_binfmt+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a13bb0: sysctl_init+0x0/0x30()
[    0.000000] initcall 0xffffffff80a13bb0: sysctl_init+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a13bb0 ran for 0 msecs: sysctl_init+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a14700: init_jiffies_clocksource+0x0/0x20()
[    0.000000] initcall 0xffffffff80a14700: init_jiffies_clocksource+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a14700 ran for 0 msecs: init_jiffies_clocksource+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a14ef0: ksysfs_init+0x0/0x60()
[    0.000000] initcall 0xffffffff80a14ef0: ksysfs_init+0x0/0x60() returned 0.
[    0.000000] initcall 0xffffffff80a14ef0 ran for 0 msecs: ksysfs_init+0x0/0x60()
[    0.000000] Calling initcall 0xffffffff80a18730: filelock_init+0x0/0x30()
[    0.000000] initcall 0xffffffff80a18730: filelock_init+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a18730 ran for 0 msecs: filelock_init+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a192e0: init_script_binfmt+0x0/0x20()
[    0.000000] initcall 0xffffffff80a192e0: init_script_binfmt+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a192e0 ran for 0 msecs: init_script_binfmt+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a19300: init_elf_binfmt+0x0/0x20()
[    0.000000] initcall 0xffffffff80a19300: init_elf_binfmt+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a19300 ran for 0 msecs: init_elf_binfmt+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1adb0: debugfs_init+0x0/0x60()
[    0.000000] initcall 0xffffffff80a1adb0: debugfs_init+0x0/0x60() returned 0.
[    0.000000] initcall 0xffffffff80a1adb0 ran for 0 msecs: debugfs_init+0x0/0x60()
[    0.000000] Calling initcall 0xffffffff80a1b7a0: securityfs_init+0x0/0x60()
[    0.000000] initcall 0xffffffff80a1b7a0: securityfs_init+0x0/0x60() returned 0.
[    0.000000] initcall 0xffffffff80a1b7a0 ran for 0 msecs: securityfs_init+0x0/0x60()
[    0.000000] Calling initcall 0xffffffff80a1c5f0: random32_init+0x0/0x60()
[    0.000000] initcall 0xffffffff80a1c5f0: random32_init+0x0/0x60() returned 0.
[    0.000000] initcall 0xffffffff80a1c5f0 ran for 0 msecs: random32_init+0x0/0x60()
[    0.000000] Calling initcall 0xffffffff80a25710: cpufreq_core_init+0x0/0x90()
[    0.000000] initcall 0xffffffff80a25710: cpufreq_core_init+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a25710 ran for 0 msecs: cpufreq_core_init+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a25810: cpuidle_init+0x0/0x40()
[    0.000000] initcall 0xffffffff80a25810: cpuidle_init+0x0/0x40() returned 0.
[    0.000000] initcall 0xffffffff80a25810 ran for 0 msecs: cpuidle_init+0x0/0x40()
[    0.000000] Calling initcall 0xffffffff80a277e0: sock_init+0x0/0x60()
[    0.000000] initcall 0xffffffff80a277e0: sock_init+0x0/0x60() returned 0.
[    0.000000] initcall 0xffffffff80a277e0 ran for 0 msecs: sock_init+0x0/0x60()
[    0.000000] Calling initcall 0xffffffff80a28260: netpoll_init+0x0/0x50()
[    0.000000] initcall 0xffffffff80a28260: netpoll_init+0x0/0x50() returned 0.
[    0.000000] initcall 0xffffffff80a28260 ran for 0 msecs: netpoll_init+0x0/0x50()
[    0.000000] Calling initcall 0xffffffff80a288e0: netlink_proto_init+0x0/0x190()
[    0.000000] NET: Registered protocol family 16
[    0.000000] initcall 0xffffffff80a288e0: netlink_proto_init+0x0/0x190() returned 0.
[    0.000000] initcall 0xffffffff80a288e0 ran for 9 msecs: netlink_proto_init+0x0/0x190()
[    0.000000] Calling initcall 0xffffffff80a1c4c0: kobject_uevent_init+0x0/0x50()
[    0.000000] initcall 0xffffffff80a1c4c0: kobject_uevent_init+0x0/0x50() returned 0.
[    0.000000] initcall 0xffffffff80a1c4c0 ran for 0 msecs: kobject_uevent_init+0x0/0x50()
[    0.000000] Calling initcall 0xffffffff80a1c960: pcibus_class_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1c960: pcibus_class_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1c960 ran for 0 msecs: pcibus_class_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1d030: pci_driver_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1d030: pci_driver_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1d030 ran for 0 msecs: pci_driver_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1d1b0: backlight_class_init+0x0/0x50()
[    0.000000] initcall 0xffffffff80a1d1b0: backlight_class_init+0x0/0x50() returned 0.
[    0.000000] initcall 0xffffffff80a1d1b0 ran for 0 msecs: backlight_class_init+0x0/0x50()
[    0.000000] Calling initcall 0xffffffff80a1d310: video_output_class_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1d310: video_output_class_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1d310 ran for 0 msecs: video_output_class_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1d440: tty_class_init+0x0/0x30()
[    0.000000] initcall 0xffffffff80a1d440: tty_class_init+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a1d440 ran for 9 msecs: tty_class_init+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a1dff0: vtconsole_class_init+0x0/0xe0()
[    0.000000] initcall 0xffffffff80a1dff0: vtconsole_class_init+0x0/0xe0() returned 0.
[    0.000000] initcall 0xffffffff80a1dff0 ran for 0 msecs: vtconsole_class_init+0x0/0xe0()
[    0.000000] Calling initcall 0xffffffff80a1f380: register_node_type+0x0/0x70()
[    0.000000] initcall 0xffffffff80a1f380: register_node_type+0x0/0x70() returned 0.
[    0.000000] initcall 0xffffffff80a1f380 ran for 0 msecs: register_node_type+0x0/0x70()
[    0.000000] Calling initcall 0xffffffff80a26a40: pci_access_init+0x0/0x40()
[    0.000000] PCI: Using configuration type 1
[    0.000000] initcall 0xffffffff80a26a40: pci_access_init+0x0/0x40() returned 0.
[    0.000000] initcall 0xffffffff80a26a40 ran for 9 msecs: pci_access_init+0x0/0x40()
[    0.000000] Calling initcall 0xffffffff80a104c0: topology_init+0x0/0xa0()
[    0.000000] initcall 0xffffffff80a104c0: topology_init+0x0/0xa0() returned 0.
[    0.000000] initcall 0xffffffff80a104c0 ran for 0 msecs: topology_init+0x0/0xa0()
[    0.000000] Calling initcall 0xffffffff80a14020: param_sysfs_init+0x0/0x230()
[    0.000000] initcall 0xffffffff80a14020: param_sysfs_init+0x0/0x230() returned 0.
[    0.000000] initcall 0xffffffff80a14020 ran for 9 msecs: param_sysfs_init+0x0/0x230()
[    0.000000] Calling initcall 0xffffffff80a175f0: readahead_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a175f0: readahead_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a175f0 ran for 0 msecs: readahead_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a18f00: init_bio+0x0/0x100()
[    0.000000] initcall 0xffffffff80a18f00: init_bio+0x0/0x100() returned 0.
[    0.000000] initcall 0xffffffff80a18f00 ran for 0 msecs: init_bio+0x0/0x100()
[    0.000000] Calling initcall 0xffffffff80a1c2a0: genhd_device_init+0x0/0x70()
[    0.000000] initcall 0xffffffff80a1c2a0: genhd_device_init+0x0/0x70() returned 0.
[    0.000000] initcall 0xffffffff80a1c2a0 ran for 0 msecs: genhd_device_init+0x0/0x70()
[    0.000000] Calling initcall 0xffffffff80a1d9b0: misc_init+0x0/0x90()
[    0.000000] initcall 0xffffffff80a1d9b0: misc_init+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a1d9b0 ran for 0 msecs: misc_init+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a22260: init_scsi+0x0/0xb0()
[    0.000000] SCSI subsystem initialized
[    0.000000] initcall 0xffffffff80a22260: init_scsi+0x0/0xb0() returned 0.
[    0.000000] initcall 0xffffffff80a22260 ran for 0 msecs: init_scsi+0x0/0xb0()
[    0.000000] Calling initcall 0xffffffff80a226e0: ata_init+0x0/0x90()
[    0.000000] libata version 3.00 loaded.
[    0.000000] initcall 0xffffffff80a226e0: ata_init+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a226e0 ran for 9 msecs: ata_init+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a23220: spi_init+0x0/0x90()
[    0.000000] initcall 0xffffffff80a23220: spi_init+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a23220 ran for 0 msecs: spi_init+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a233b0: usb_init+0x0/0xe0()
[    0.000000] usbcore: registered new interface driver usbfs
[    0.000000] usbcore: registered new interface driver hub
[    0.000000] usbcore: registered new device driver usb
[    0.000000] initcall 0xffffffff80a233b0: usb_init+0x0/0xe0() returned 0.
[    0.000000] initcall 0xffffffff80a233b0 ran for 19 msecs: usb_init+0x0/0xe0()
[    0.000000] Calling initcall 0xffffffff80a23da0: serio_init+0x0/0xb0()
[    0.000000] initcall 0xffffffff80a23da0: serio_init+0x0/0xb0() returned 0.
[    0.000000] initcall 0xffffffff80a23da0 ran for 0 msecs: serio_init+0x0/0xb0()
[    0.000000] Calling initcall 0xffffffff80a240e0: input_init+0x0/0x130()
[    0.000000] initcall 0xffffffff80a240e0: input_init+0x0/0x130() returned 0.
[    0.000000] initcall 0xffffffff80a240e0 ran for 0 msecs: input_init+0x0/0x130()
[    0.000000] Calling initcall 0xffffffff80a24660: rtc_init+0x0/0x70()
[    0.000000] initcall 0xffffffff80a24660: rtc_init+0x0/0x70() returned 0.
[    0.000000] initcall 0xffffffff80a24660 ran for 0 msecs: rtc_init+0x0/0x70()
[    0.000000] Calling initcall 0xffffffff80a24930: hwmon_init+0x0/0x40()
[    0.000000] initcall 0xffffffff80a24930: hwmon_init+0x0/0x40() returned 0.
[    0.000000] initcall 0xffffffff80a24930 ran for 0 msecs: hwmon_init+0x0/0x40()
[    0.000000] Calling initcall 0xffffffff80a258b0: leds_init+0x0/0x30()
[    0.000000] initcall 0xffffffff80a258b0: leds_init+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a258b0 ran for 0 msecs: leds_init+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a26230: dma_bus_init+0x0/0x30()
[    0.000000] initcall 0xffffffff80a26230: dma_bus_init+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a26230 ran for 0 msecs: dma_bus_init+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a263b0: ac97_bus_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a263b0: ac97_bus_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a263b0 ran for 0 msecs: ac97_bus_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a26a80: pci_legacy_init+0x0/0x110()
[    0.000000] PCI: Probing PCI hardware
[    0.000000] PCI: Probing PCI hardware (bus 00)
[    0.000000] PCI: Scanning bus 0000:00
[    0.000000] PCI: Found 0000:00:00.0 [10de/005e] 000580 00
[    0.000000] PCI: Found 0000:00:01.0 [10de/0050] 000601 00
[    0.000000] PCI: Calling quirk ffffffff80212640 for 0000:00:01.0
[    0.000000] PCI: Found 0000:00:01.1 [10de/0052] 000c05 00
[    0.000000] PCI: Found 0000:00:02.0 [10de/005a] 000c03 00
[    0.000000] PCI: Found 0000:00:02.1 [10de/005b] 000c03 00
[    0.000000] PCI: Found 0000:00:04.0 [10de/0059] 000401 00
[    0.000000] PCI: Found 0000:00:06.0 [10de/0053] 000101 00
[    0.000000] PCI: Found 0000:00:09.0 [10de/005c] 000604 01
[    0.000000] PCI: Found 0000:00:0a.0 [10de/0057] 000680 00
[    0.000000] PCI: Found 0000:00:0b.0 [10de/005d] 000604 01
[    0.000000] PCI: Found 0000:00:0c.0 [10de/005d] 000604 01
[    0.000000] PCI: Found 0000:00:0d.0 [10de/005d] 000604 01
[    0.000000] PCI: Found 0000:00:0e.0 [10de/005d] 000604 01
[    0.000000] PCI: Found 0000:00:18.0 [1022/1100] 000600 00
[    0.000000] PCI: Found 0000:00:18.1 [1022/1101] 000600 00
[    0.000000] PCI: Found 0000:00:18.2 [1022/1102] 000600 00
[    0.000000] PCI: Found 0000:00:18.3 [1022/1103] 000600 00
[    0.000000] PCI: Fixups for bus 0000:00
[    0.000000] PCI: Scanning behind PCI bridge 0000:00:09.0, config 050500, pass 0
[    0.000000] PCI: Scanning bus 0000:05
[    0.000000] PCI: Found 0000:05:07.0 [10ec/8139] 000200 00
[    0.000000] PCI: Fixups for bus 0000:05
[    0.000000] PCI: Transparent bridge - 0000:00:09.0
[    0.000000] PCI: Bus scan for 0000:05 returning with max=05
[    0.000000] PCI: Scanning behind PCI bridge 0000:00:0b.0, config 040400, pass 0
[    0.000000] PCI: Scanning bus 0000:04
[    0.000000] PCI: Fixups for bus 0000:04
[    0.000000] PCI: Bus scan for 0000:04 returning with max=04
[    0.000000] PCI: Scanning behind PCI bridge 0000:00:0c.0, config 030300, pass 0
[    0.000000] PCI: Scanning bus 0000:03
[    0.000000] PCI: Fixups for bus 0000:03
[    0.000000] PCI: Bus scan for 0000:03 returning with max=03
[    0.000000] PCI: Scanning behind PCI bridge 0000:00:0d.0, config 020200, pass 0
[    0.000000] PCI: Scanning bus 0000:02
[    0.000000] PCI: Fixups for bus 0000:02
[    0.000000] PCI: Bus scan for 0000:02 returning with max=02
[    0.000000] PCI: Scanning behind PCI bridge 0000:00:0e.0, config 010100, pass 0
[    0.000000] PCI: Scanning bus 0000:01
[    0.000000] PCI: Found 0000:01:00.0 [1002/5b60] 000300 00
[    0.000000] PCI: Found 0000:01:00.1 [1002/5b70] 000380 00
[    0.000000] PCI: Fixups for bus 0000:01
[    0.000000] PCI: Bus scan for 0000:01 returning with max=01
[    0.000000] PCI: Scanning behind PCI bridge 0000:00:09.0, config 050500, pass 1
[    0.000000] PCI: Scanning behind PCI bridge 0000:00:0b.0, config 040400, pass 1
[    0.000000] PCI: Scanning behind PCI bridge 0000:00:0c.0, config 030300, pass 1
[    0.000000] PCI: Scanning behind PCI bridge 0000:00:0d.0, config 020200, pass 1
[    0.000000] PCI: Scanning behind PCI bridge 0000:00:0e.0, config 010100, pass 1
[    0.000000] PCI: Bus scan for 0000:00 returning with max=05
[    0.000000] initcall 0xffffffff80a26a80: pci_legacy_init+0x0/0x110() returned 0.
[    0.000000] initcall 0xffffffff80a26a80 ran for 276 msecs: pci_legacy_init+0x0/0x110()
[    0.000000] Calling initcall 0xffffffff80a27100: pcibios_irq_init+0x0/0x550()
[    0.000000] PCI: Using IRQ router default [10de/005e] at 0000:00:00.0
[    0.000000] PCI->APIC IRQ transform: 0000:00:04.0[A] -> IRQ 3
[    0.000000] PCI->APIC IRQ transform: 0000:00:0a.0[A] -> IRQ 11
[    0.000000] PCI->APIC IRQ transform: 0000:05:07.0[A] -> IRQ 11
[    0.000000] PCI->APIC IRQ transform: 0000:01:00.0[A] -> IRQ 5
[    0.000000] initcall 0xffffffff80a27100: pcibios_irq_init+0x0/0x550() returned 0.
[    0.000000] initcall 0xffffffff80a27100 ran for 28 msecs: pcibios_irq_init+0x0/0x550()
[    0.000000] Calling initcall 0xffffffff80a27650: pcibios_init+0x0/0x80()
[    0.000000] initcall 0xffffffff80a27650: pcibios_init+0x0/0x80() returned 0.
[    0.000000] initcall 0xffffffff80a27650 ran for 0 msecs: pcibios_init+0x0/0x80()
[    0.000000] Calling initcall 0xffffffff80a278a0: proto_init+0x0/0x30()
[    0.000000] initcall 0xffffffff80a278a0: proto_init+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a278a0 ran for 0 msecs: proto_init+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a27ca0: net_dev_init+0x0/0x1d0()
[    0.000000] initcall 0xffffffff80a27ca0: net_dev_init+0x0/0x1d0() returned 0.
[    0.000000] initcall 0xffffffff80a27ca0 ran for 0 msecs: net_dev_init+0x0/0x1d0()
[    0.000000] Calling initcall 0xffffffff80a27ee0: neigh_init+0x0/0x80()
[    0.000000] initcall 0xffffffff80a27ee0: neigh_init+0x0/0x80() returned 0.
[    0.000000] initcall 0xffffffff80a27ee0 ran for 0 msecs: neigh_init+0x0/0x80()
[    0.000000] Calling initcall 0xffffffff80a282b0: fib_rules_init+0x0/0x60()
[    0.000000] initcall 0xffffffff80a282b0: fib_rules_init+0x0/0x60() returned 0.
[    0.000000] initcall 0xffffffff80a282b0 ran for 0 msecs: fib_rules_init+0x0/0x60()
[    0.000000] Calling initcall 0xffffffff80a283d0: pktsched_init+0x0/0xd0()
[    0.000000] initcall 0xffffffff80a283d0: pktsched_init+0x0/0xd0() returned 0.
[    0.000000] initcall 0xffffffff80a283d0 ran for 0 msecs: pktsched_init+0x0/0xd0()
[    0.000000] Calling initcall 0xffffffff80a284c0: tc_filter_init+0x0/0x50()
[    0.000000] initcall 0xffffffff80a284c0: tc_filter_init+0x0/0x50() returned 0.
[    0.000000] initcall 0xffffffff80a284c0 ran for 0 msecs: tc_filter_init+0x0/0x50()
[    0.000000] Calling initcall 0xffffffff80a28510: tc_action_init+0x0/0x50()
[    0.000000] initcall 0xffffffff80a28510: tc_action_init+0x0/0x50() returned 0.
[    0.000000] initcall 0xffffffff80a28510 ran for 0 msecs: tc_action_init+0x0/0x50()
[    0.000000] Calling initcall 0xffffffff80a28a70: genl_init+0x0/0xe0()
[    0.000000] initcall 0xffffffff80a28a70: genl_init+0x0/0xe0() returned 0.
[    0.000000] initcall 0xffffffff80a28a70 ran for 38 msecs: genl_init+0x0/0xe0()
[    0.000000] Calling initcall 0xffffffff80a2a2b0: cipso_v4_init+0x0/0x90()
[    0.000000] initcall 0xffffffff80a2a2b0: cipso_v4_init+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a2a2b0 ran for 0 msecs: cipso_v4_init+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a2d300: wireless_nlevent_init+0x0/0x50()
[    0.000000] initcall 0xffffffff80a2d300: wireless_nlevent_init+0x0/0x50() returned 0.
[    0.000000] initcall 0xffffffff80a2d300 ran for 0 msecs: wireless_nlevent_init+0x0/0x50()
[    0.000000] Calling initcall 0xffffffff80a2d350: netlbl_init+0x0/0x7b()
[    0.000000] NetLabel: Initializing
[    0.000000] NetLabel:  domain hash size = 128
[    0.000000] NetLabel:  protocols = UNLABELED CIPSOv4
[    0.000000] NetLabel:  unlabeled traffic allowed by default
[    0.000000] initcall 0xffffffff80a2d350: netlbl_init+0x0/0x7b() returned 0.
[    0.000000] initcall 0xffffffff80a2d350 ran for 19 msecs: netlbl_init+0x0/0x7b()
[    0.000000] Calling initcall 0xffffffff80a0a300: pci_iommu_init+0x0/0x20()
[    0.000000] PCI-DMA: Disabling AGP.
[    0.000000] PCI-DMA: aperture base @ 8000000 size 65536 KB
[    0.000000] PCI-DMA: using GART IOMMU.
[    0.000000] PCI-DMA: Reserving 64MB of IOMMU area in the AGP aperture
[    0.000000] initcall 0xffffffff80a0a300: pci_iommu_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a0a300 ran for 19 msecs: pci_iommu_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a0a7b0: hpet_late_init+0x0/0x50()
[    0.000000] initcall 0xffffffff80a0a7b0: hpet_late_init+0x0/0x50() returned -19.
[    0.000000] initcall 0xffffffff80a0a7b0 ran for 0 msecs: hpet_late_init+0x0/0x50()
[    0.000000] Calling initcall 0xffffffff80a145c0: clocksource_done_booting+0x0/0x20()
[    0.000000] initcall 0xffffffff80a145c0: clocksource_done_booting+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a145c0 ran for 0 msecs: clocksource_done_booting+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a186a0: init_pipe_fs+0x0/0x60()
[    0.000000] initcall 0xffffffff80a186a0: init_pipe_fs+0x0/0x60() returned 0.
[    0.000000] initcall 0xffffffff80a186a0 ran for 0 msecs: init_pipe_fs+0x0/0x60()
[    0.000000] Calling initcall 0xffffffff80a19080: eventpoll_init+0x0/0xa0()
[    0.000000] initcall 0xffffffff80a19080: eventpoll_init+0x0/0xa0() returned 0.
[    0.000000] initcall 0xffffffff80a19080 ran for 0 msecs: eventpoll_init+0x0/0xa0()
[    0.000000] Calling initcall 0xffffffff80a19120: anon_inode_init+0x0/0x130()
[    0.000000] initcall 0xffffffff80a19120: anon_inode_init+0x0/0x130() returned 0.
[    0.000000] initcall 0xffffffff80a19120 ran for 0 msecs: anon_inode_init+0x0/0x130()
[    0.000000] Calling initcall 0xffffffff80a1d330: chr_dev_init+0x0/0xd0()
[    0.000000] initcall 0xffffffff80a1d330: chr_dev_init+0x0/0xd0() returned 0.
[    0.000000] initcall 0xffffffff80a1d330 ran for 0 msecs: chr_dev_init+0x0/0xd0()
[    0.000000] Calling initcall 0xffffffff80a1f2f0: firmware_class_init+0x0/0x90()
[    0.000000] initcall 0xffffffff80a1f2f0: firmware_class_init+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a1f2f0 ran for 0 msecs: firmware_class_init+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a20190: loopback_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a20190: loopback_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a20190 ran for 0 msecs: loopback_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a257a0: cpufreq_gov_performance_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a257a0: cpufreq_gov_performance_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a257a0 ran for 0 msecs: cpufreq_gov_performance_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a26300: ssb_modinit+0x0/0x90()
[    0.000000] initcall 0xffffffff80a26300: ssb_modinit+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a26300 ran for 0 msecs: ssb_modinit+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a263d0: pcibios_assign_resources+0x0/0x90()
[    0.000000] PCI: Bridge: 0000:00:09.0
[    0.000000]   IO window: c000-cfff
[    0.000000]   MEM window: da000000-da0fffff
[    0.000000]   PREFETCH window: disabled.
[    0.000000] PCI: Bridge: 0000:00:0b.0
[    0.000000]   IO window: disabled.
[    0.000000]   MEM window: disabled.
[    0.000000]   PREFETCH window: disabled.
[    0.000000] PCI: Bridge: 0000:00:0c.0
[    0.000000]   IO window: disabled.
[    0.000000]   MEM window: disabled.
[    0.000000]   PREFETCH window: disabled.
[    0.000000] PCI: Bridge: 0000:00:0d.0
[    0.000000]   IO window: disabled.
[    0.000000]   MEM window: disabled.
[    0.000000]   PREFETCH window: disabled.
[    0.000000] PCI: Bridge: 0000:00:0e.0
[    0.000000]   IO window: b000-bfff
[    0.000000]   MEM window: d8000000-d9ffffff
[    0.000000]   PREFETCH window: d0000000-d7ffffff
[    0.000000] PCI: Setting latency timer of device 0000:00:09.0 to 64
[    0.000000] PCI: Setting latency timer of device 0000:00:0b.0 to 64
[    0.000000] PCI: Setting latency timer of device 0000:00:0c.0 to 64
[    0.000000] PCI: Setting latency timer of device 0000:00:0d.0 to 64
[    0.000000] PCI: Setting latency timer of device 0000:00:0e.0 to 64
[    0.000000] initcall 0xffffffff80a263d0: pcibios_assign_resources+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a263d0 ran for 104 msecs: pcibios_assign_resources+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a276d0: fill_mp_bus_to_cpumask+0x0/0x110()
[    0.000000] initcall 0xffffffff80a276d0: fill_mp_bus_to_cpumask+0x0/0x110() returned 0.
[    0.000000] initcall 0xffffffff80a276d0 ran for 0 msecs: fill_mp_bus_to_cpumask+0x0/0x110()
[    0.000000] Calling initcall 0xffffffff80a29a30: inet_init+0x0/0x380()
[    0.000000] NET: Registered protocol family 2
[    0.000000] IP route cache hash table entries: 32768 (order: 6, 262144 bytes)
[    0.000000] TCP established hash table entries: 131072 (order: 9, 2097152 bytes)
[    0.000000] TCP bind hash table entries: 65536 (order: 9, 3670016 bytes)
[    0.000000] TCP: Hash tables configured (established 131072 bind 65536)
[    0.000000] TCP reno registered
[    0.000000] initcall 0xffffffff80a29a30: inet_init+0x0/0x380() returned 0.
[    0.000000] initcall 0xffffffff80a29a30 ran for 162 msecs: inet_init+0x0/0x380()
[    0.000000] Calling initcall 0xffffffff80a07800: populate_rootfs+0x0/0xb0()
[    0.000000] initcall 0xffffffff80a07800: populate_rootfs+0x0/0xb0() returned 0.
[    0.000000] initcall 0xffffffff80a07800 ran for 0 msecs: populate_rootfs+0x0/0xb0()
[    0.000000] Calling initcall 0xffffffff80a0f380: calgary_fixup_tce_spaces+0x0/0x110()
[    0.000000] initcall 0xffffffff80a0f380: calgary_fixup_tce_spaces+0x0/0x110() returned -19.
[    0.000000] initcall 0xffffffff80a0f380 ran for 0 msecs: calgary_fixup_tce_spaces+0x0/0x110()
[    0.000000] Calling initcall 0xffffffff80a08880: i8259A_init_sysfs+0x0/0x30()
[    0.000000] initcall 0xffffffff80a08880: i8259A_init_sysfs+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a08880 ran for 0 msecs: i8259A_init_sysfs+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a08cf0: vsyscall_init+0x0/0x90()
[    0.000000] initcall 0xffffffff80a08cf0: vsyscall_init+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a08cf0 ran for 0 msecs: vsyscall_init+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a09010: sbf_init+0x0/0xe0()
[    0.000000] initcall 0xffffffff80a09010: sbf_init+0x0/0xe0() returned 0.
[    0.000000] initcall 0xffffffff80a09010 ran for 0 msecs: sbf_init+0x0/0xe0()
[    0.000000] Calling initcall 0xffffffff80a0a050: i8237A_init_sysfs+0x0/0x30()
[    0.000000] initcall 0xffffffff80a0a050: i8237A_init_sysfs+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a0a050 ran for 0 msecs: i8237A_init_sysfs+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80218040: cache_sysfs_init+0x0/0x70()
[    0.000000] initcall 0xffffffff80218040: cache_sysfs_init+0x0/0x70() returned 0.
[    0.000000] initcall 0xffffffff80218040 ran for 0 msecs: cache_sysfs_init+0x0/0x70()
[    0.000000] Calling initcall 0xffffffff80a0af20: mce_init_device+0x0/0xa0()
[    0.000000] initcall 0xffffffff80a0af20: mce_init_device+0x0/0xa0() returned 0.
[    0.000000] initcall 0xffffffff80a0af20 ran for 9 msecs: mce_init_device+0x0/0xa0()
[    0.000000] Calling initcall 0xffffffff80a0ae20: periodic_mcheck_init+0x0/0x50()
[    0.000000] initcall 0xffffffff80a0ae20: periodic_mcheck_init+0x0/0x50() returned 0.
[    0.000000] initcall 0xffffffff80a0ae20 ran for 0 msecs: periodic_mcheck_init+0x0/0x50()
[    0.000000] Calling initcall 0xffffffff80a0afc0: thermal_throttle_init_device+0x0/0xc0()
[    0.000000] initcall 0xffffffff80a0afc0: thermal_throttle_init_device+0x0/0xc0() returned 0.
[    0.000000] initcall 0xffffffff80a0afc0 ran for 0 msecs: thermal_throttle_init_device+0x0/0xc0()
[    0.000000] Calling initcall 0xffffffff80a0c820: ioapic_init_sysfs+0x0/0xe0()
[    0.000000] initcall 0xffffffff80a0c820: ioapic_init_sysfs+0x0/0xe0() returned 0.
[    0.000000] initcall 0xffffffff80a0c820 ran for 0 msecs: ioapic_init_sysfs+0x0/0xe0()
[    0.000000] Calling initcall 0xffffffff80a10560: add_pcspkr+0x0/0x60()
[    0.000000] initcall 0xffffffff80a10560: add_pcspkr+0x0/0x60() returned 0.
[    0.000000] initcall 0xffffffff80a10560 ran for 0 msecs: add_pcspkr+0x0/0x60()
[    0.000000] Calling initcall 0xffffffff80a120a0: aes_init+0x0/0x360()
[    0.000000] initcall 0xffffffff80a120a0: aes_init+0x0/0x360() returned 0.
[    0.000000] initcall 0xffffffff80a120a0 ran for 0 msecs: aes_init+0x0/0x360()
[    0.000000] Calling initcall 0xffffffff80a12400: init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a12400: init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a12400 ran for 0 msecs: init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a12440: init_vdso_vars+0x0/0x220()
[    0.000000] initcall 0xffffffff80a12440: init_vdso_vars+0x0/0x220() returned 0.
[    0.000000] initcall 0xffffffff80a12440 ran for 0 msecs: init_vdso_vars+0x0/0x220()
[    0.000000] Calling initcall 0xffffffff80a12680: ia32_binfmt_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a12680: ia32_binfmt_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a12680 ran for 0 msecs: ia32_binfmt_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a126a0: sysenter_setup+0x0/0x350()
[    0.000000] initcall 0xffffffff80a126a0: sysenter_setup+0x0/0x350() returned 0.
[    0.000000] initcall 0xffffffff80a126a0 ran for 0 msecs: sysenter_setup+0x0/0x350()
[    0.000000] Calling initcall 0xffffffff80a13680: create_proc_profile+0x0/0x2f0()
[    0.000000] initcall 0xffffffff80a13680: create_proc_profile+0x0/0x2f0() returned 0.
[    0.000000] initcall 0xffffffff80a13680 ran for 0 msecs: create_proc_profile+0x0/0x2f0()
[    0.000000] Calling initcall 0xffffffff80a13a60: ioresources_init+0x0/0x50()
[    0.000000] initcall 0xffffffff80a13a60: ioresources_init+0x0/0x50() returned 0.
[    0.000000] initcall 0xffffffff80a13a60 ran for 0 msecs: ioresources_init+0x0/0x50()
[    0.000000] Calling initcall 0xffffffff80a13c40: uid_cache_init+0x0/0x80()
[    0.000000] initcall 0xffffffff80a13c40: uid_cache_init+0x0/0x80() returned 0.
[    0.000000] initcall 0xffffffff80a13c40 ran for 0 msecs: uid_cache_init+0x0/0x80()
[    0.000000] Calling initcall 0xffffffff80a14250: init_posix_timers+0x0/0xc0()
[    0.000000] initcall 0xffffffff80a14250: init_posix_timers+0x0/0xc0() returned 0.
[    0.000000] initcall 0xffffffff80a14250 ran for 0 msecs: init_posix_timers+0x0/0xc0()
[    0.000000] Calling initcall 0xffffffff80a14310: init_posix_cpu_timers+0x0/0xe0()
[    0.000000] initcall 0xffffffff80a14310: init_posix_cpu_timers+0x0/0xe0() returned 0.
[    0.000000] initcall 0xffffffff80a14310 ran for 0 msecs: init_posix_cpu_timers+0x0/0xe0()
[    0.000000] Calling initcall 0xffffffff80a14420: latency_init+0x0/0x30()
[    0.000000] initcall 0xffffffff80a14420: latency_init+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a14420 ran for 0 msecs: latency_init+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a14450: nsproxy_cache_init+0x0/0x30()
[    0.000000] initcall 0xffffffff80a14450: nsproxy_cache_init+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a14450 ran for 0 msecs: nsproxy_cache_init+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a14480: timekeeping_init_device+0x0/0x30()
[    0.000000] initcall 0xffffffff80a14480: timekeeping_init_device+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a14480 ran for 0 msecs: timekeeping_init_device+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a145e0: init_clocksource_sysfs+0x0/0x60()
[    0.000000] initcall 0xffffffff80a145e0: init_clocksource_sysfs+0x0/0x60() returned 0.
[    0.000000] initcall 0xffffffff80a145e0 ran for 0 msecs: init_clocksource_sysfs+0x0/0x60()
[    0.000000] Calling initcall 0xffffffff80a14720: init_timer_list_procfs+0x0/0x30()
[    0.000000] initcall 0xffffffff80a14720: init_timer_list_procfs+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a14720 ran for 0 msecs: init_timer_list_procfs+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a147d0: init_tstats_procfs+0x0/0x30()
[    0.000000] initcall 0xffffffff80a147d0: init_tstats_procfs+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a147d0 ran for 0 msecs: init_tstats_procfs+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a14920: lockdep_proc_init+0x0/0x50()
[    0.000000] initcall 0xffffffff80a14920: lockdep_proc_init+0x0/0x50() returned 0.
[    0.000000] initcall 0xffffffff80a14920 ran for 0 msecs: lockdep_proc_init+0x0/0x50()
[    0.000000] Calling initcall 0xffffffff80a14970: init+0x0/0x150()
[    0.000000] initcall 0xffffffff80a14970: init+0x0/0x150() returned 0.
[    0.000000] initcall 0xffffffff80a14970 ran for 0 msecs: init+0x0/0x150()
[    0.000000] Calling initcall 0xffffffff80a14ac0: proc_dma_init+0x0/0x30()
[    0.000000] initcall 0xffffffff80a14ac0: proc_dma_init+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a14ac0 ran for 0 msecs: proc_dma_init+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff802640b0: percpu_modinit+0x0/0x80()
[    0.000000] initcall 0xffffffff802640b0: percpu_modinit+0x0/0x80() returned 0.
[    0.000000] initcall 0xffffffff802640b0 ran for 0 msecs: percpu_modinit+0x0/0x80()
[    0.000000] Calling initcall 0xffffffff80a14af0: kallsyms_init+0x0/0x30()
[    0.000000] initcall 0xffffffff80a14af0: kallsyms_init+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a14af0 ran for 0 msecs: kallsyms_init+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a14e30: init_kprobes+0x0/0xc0()
[    0.000000] initcall 0xffffffff80a14e30: init_kprobes+0x0/0xc0() returned 0.
[    0.000000] initcall 0xffffffff80a14e30 ran for 0 msecs: init_kprobes+0x0/0xc0()
[    0.000000] Calling initcall 0xffffffff80a15040: relay_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a15040: relay_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a15040 ran for 9 msecs: relay_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a15060: utsname_sysctl_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a15060: utsname_sysctl_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a15060 ran for 0 msecs: utsname_sysctl_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a16480: init_per_zone_pages_min+0x0/0x70()
[    0.000000] initcall 0xffffffff80a16480: init_per_zone_pages_min+0x0/0x70() returned 0.
[    0.000000] initcall 0xffffffff80a16480 ran for 0 msecs: init_per_zone_pages_min+0x0/0x70()
[    0.000000] Calling initcall 0xffffffff80a175d0: pdflush_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a175d0: pdflush_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a175d0 ran for 0 msecs: pdflush_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a17640: kswapd_init+0x0/0x80()
[    0.000000] initcall 0xffffffff80a17640: kswapd_init+0x0/0x80() returned 0.
[    0.000000] initcall 0xffffffff80a17640 ran for 0 msecs: kswapd_init+0x0/0x80()
[    0.000000] Calling initcall 0xffffffff80a176c0: setup_vmstat+0x0/0x60()
[    0.000000] initcall 0xffffffff80a176c0: setup_vmstat+0x0/0x60() returned 0.
[    0.000000] initcall 0xffffffff80a176c0 ran for 0 msecs: setup_vmstat+0x0/0x60()
[    0.000000] Calling initcall 0xffffffff80a17770: hugetlb_init+0x0/0xb0()
[    0.000000] Total HugeTLB memory allocated, 0
[    0.000000] initcall 0xffffffff80a17770: hugetlb_init+0x0/0xb0() returned 0.
[    0.000000] initcall 0xffffffff80a17770 ran for 0 msecs: hugetlb_init+0x0/0xb0()
[    0.000000] Calling initcall 0xffffffff80a180b0: init_tmpfs+0x0/0xf0()
[    0.000000] initcall 0xffffffff80a180b0: init_tmpfs+0x0/0xf0() returned 0.
[    0.000000] initcall 0xffffffff80a180b0 ran for 0 msecs: init_tmpfs+0x0/0xf0()
[    0.000000] Calling initcall 0xffffffff80a18340: slab_sysfs_init+0x0/0xf0()
[    0.000000] initcall 0xffffffff80a18340: slab_sysfs_init+0x0/0xf0() returned 0.
[    0.000000] initcall 0xffffffff80a18340 ran for 19 msecs: slab_sysfs_init+0x0/0xf0()
[    0.000000] Calling initcall 0xffffffff80a18700: fasync_init+0x0/0x30()
[    0.000000] initcall 0xffffffff80a18700: fasync_init+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a18700 ran for 0 msecs: fasync_init+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a18e30: aio_setup+0x0/0x70()
[    0.000000] initcall 0xffffffff80a18e30: aio_setup+0x0/0x70() returned 0.
[    0.000000] initcall 0xffffffff80a18e30 ran for 0 msecs: aio_setup+0x0/0x70()
[    0.000000] Calling initcall 0xffffffff80a19250: init_sys32_ioctl+0x0/0x90()
[    0.000000] initcall 0xffffffff80a19250: init_sys32_ioctl+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a19250 ran for 0 msecs: init_sys32_ioctl+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a19320: init_mbcache+0x0/0x20()
[    0.000000] initcall 0xffffffff80a19320: init_mbcache+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a19320 ran for 0 msecs: init_mbcache+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a19340: dquot_init+0x0/0x100()
[    0.000000] VFS: Disk quotas dquot_6.5.1
[    0.000000] Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[    0.000000] initcall 0xffffffff80a19340: dquot_init+0x0/0x100() returned 0.
[    0.000000] initcall 0xffffffff80a19340 ran for 9 msecs: dquot_init+0x0/0x100()
[    0.000000] Calling initcall 0xffffffff80a19440: init_v2_quota_format+0x0/0x20()
[    0.000000] initcall 0xffffffff80a19440: init_v2_quota_format+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a19440 ran for 0 msecs: init_v2_quota_format+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a19460: dnotify_init+0x0/0x30()
[    0.000000] initcall 0xffffffff80a19460: dnotify_init+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a19460 ran for 0 msecs: dnotify_init+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a199f0: configfs_init+0x0/0xf0()
[    0.000000] initcall 0xffffffff80a199f0: configfs_init+0x0/0xf0() returned 0.
[    0.000000] initcall 0xffffffff80a199f0 ran for 0 msecs: configfs_init+0x0/0xf0()
[    0.000000] Calling initcall 0xffffffff80a19ae0: init_devpts_fs+0x0/0x50()
[    0.000000] initcall 0xffffffff80a19ae0: init_devpts_fs+0x0/0x50() returned 0.
[    0.000000] initcall 0xffffffff80a19ae0 ran for 0 msecs: init_devpts_fs+0x0/0x50()
[    0.000000] Calling initcall 0xffffffff80a19b30: init_dlm+0x0/0xa0()
[    0.000000] DLM (built Dec 20 2007 11:47:39) installed
[    0.000000] initcall 0xffffffff80a19b30: init_dlm+0x0/0xa0() returned 0.
[    0.000000] initcall 0xffffffff80a19b30 ran for 9 msecs: init_dlm+0x0/0xa0()
[    0.000000] Calling initcall 0xffffffff80a19bd0: init_ext3_fs+0x0/0x80()
[    0.000000] initcall 0xffffffff80a19bd0: init_ext3_fs+0x0/0x80() returned 0.
[    0.000000] initcall 0xffffffff80a19bd0 ran for 0 msecs: init_ext3_fs+0x0/0x80()
[    0.000000] Calling initcall 0xffffffff80a19d10: journal_init+0x0/0xb0()
[    0.000000] initcall 0xffffffff80a19d10: journal_init+0x0/0xb0() returned 0.
[    0.000000] initcall 0xffffffff80a19d10 ran for 0 msecs: journal_init+0x0/0xb0()
[    0.000000] Calling initcall 0xffffffff80a19dc0: init_ext2_fs+0x0/0x70()
[    0.000000] initcall 0xffffffff80a19dc0: init_ext2_fs+0x0/0x70() returned 0.
[    0.000000] initcall 0xffffffff80a19dc0 ran for 0 msecs: init_ext2_fs+0x0/0x70()
[    0.000000] Calling initcall 0xffffffff80a19e30: init_ramfs_fs+0x0/0x20()
[    0.000000] initcall 0xffffffff80a19e30: init_ramfs_fs+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a19e30 ran for 0 msecs: init_ramfs_fs+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a19ea0: init_hugetlbfs_fs+0x0/0xc0()
[    0.000000] initcall 0xffffffff80a19ea0: init_hugetlbfs_fs+0x0/0xc0() returned 0.
[    0.000000] initcall 0xffffffff80a19ea0 ran for 0 msecs: init_hugetlbfs_fs+0x0/0xc0()
[    0.000000] Calling initcall 0xffffffff80a19f60: init_coda+0x0/0x190()
[    0.000000] initcall 0xffffffff80a19f60: init_coda+0x0/0x190() returned 0.
[    0.000000] initcall 0xffffffff80a19f60 ran for 0 msecs: init_coda+0x0/0x190()
[    0.000000] Calling initcall 0xffffffff80a1a130: init_fat_fs+0x0/0x60()
[    0.000000] initcall 0xffffffff80a1a130: init_fat_fs+0x0/0x60() returned 0.
[    0.000000] initcall 0xffffffff80a1a130 ran for 0 msecs: init_fat_fs+0x0/0x60()
[    0.000000] Calling initcall 0xffffffff80a1a190: init_msdos_fs+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a190: init_msdos_fs+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a190 ran for 0 msecs: init_msdos_fs+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a1b0: init_vfat_fs+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a1b0: init_vfat_fs+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a1b0 ran for 0 msecs: init_vfat_fs+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a1d0: init_iso9660_fs+0x0/0x90()
[    0.000000] initcall 0xffffffff80a1a1d0: init_iso9660_fs+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a1a1d0 ran for 0 msecs: init_iso9660_fs+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a1a290: ecryptfs_init+0x0/0x1e0()
[    0.000000] initcall 0xffffffff80a1a290: ecryptfs_init+0x0/0x1e0() returned 0.
[    0.000000] initcall 0xffffffff80a1a290 ran for 0 msecs: ecryptfs_init+0x0/0x1e0()
[    0.000000] Calling initcall 0xffffffff80a1a530: init_nfs_fs+0x0/0xc0()
[    0.000000] initcall 0xffffffff80a1a530: init_nfs_fs+0x0/0xc0() returned 0.
[    0.000000] initcall 0xffffffff80a1a530 ran for 0 msecs: init_nfs_fs+0x0/0xc0()
[    0.000000] Calling initcall 0xffffffff80a1a7c0: init_nlm+0x0/0x30()
[    0.000000] initcall 0xffffffff80a1a7c0: init_nlm+0x0/0x30() returned 0.
[    0.000000] initcall 0xffffffff80a1a7c0 ran for 0 msecs: init_nlm+0x0/0x30()
[    0.000000] Calling initcall 0xffffffff80a1a7f0: init_nls_cp437+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a7f0: init_nls_cp437+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a7f0 ran for 0 msecs: init_nls_cp437+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a810: init_nls_cp852+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a810: init_nls_cp852+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a810 ran for 0 msecs: init_nls_cp852+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a830: init_nls_cp862+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a830: init_nls_cp862+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a830 ran for 0 msecs: init_nls_cp862+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a850: init_nls_cp864+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a850: init_nls_cp864+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a850 ran for 0 msecs: init_nls_cp864+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a870: init_nls_cp874+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a870: init_nls_cp874+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a870 ran for 0 msecs: init_nls_cp874+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a890: init_nls_cp936+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a890: init_nls_cp936+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a890 ran for 0 msecs: init_nls_cp936+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a8b0: init_nls_cp950+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a8b0: init_nls_cp950+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a8b0 ran for 0 msecs: init_nls_cp950+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a8d0: init_nls_cp1251+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a8d0: init_nls_cp1251+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a8d0 ran for 0 msecs: init_nls_cp1251+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a8f0: init_nls_iso8859_4+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a8f0: init_nls_iso8859_4+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a8f0 ran for 0 msecs: init_nls_iso8859_4+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a910: init_nls_iso8859_5+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a910: init_nls_iso8859_5+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a910 ran for 0 msecs: init_nls_iso8859_5+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a930: init_nls_iso8859_6+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a930: init_nls_iso8859_6+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a930 ran for 0 msecs: init_nls_iso8859_6+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a950: init_nls_iso8859_9+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a950: init_nls_iso8859_9+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a950 ran for 0 msecs: init_nls_iso8859_9+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a970: init_nls_iso8859_14+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1a970: init_nls_iso8859_14+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1a970 ran for 0 msecs: init_nls_iso8859_14+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1a9d0: init_sysv_fs+0x0/0x60()
[    0.000000] initcall 0xffffffff80a1a9d0: init_sysv_fs+0x0/0x60() returned 0.
[    0.000000] initcall 0xffffffff80a1a9d0 ran for 0 msecs: init_sysv_fs+0x0/0x60()
[    0.000000] Calling initcall 0xffffffff80a1aa30: init_smb_fs+0x0/0x90()
[    0.000000] initcall 0xffffffff80a1aa30: init_smb_fs+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a1aa30 ran for 0 msecs: init_smb_fs+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a1aac0: init_ncp_fs+0x0/0x70()
[    0.000000] initcall 0xffffffff80a1aac0: init_ncp_fs+0x0/0x70() returned 0.
[    0.000000] initcall 0xffffffff80a1aac0 ran for 0 msecs: init_ncp_fs+0x0/0x70()
[    0.000000] Calling initcall 0xffffffff80a1ab30: init_hpfs_fs+0x0/0x70()
[    0.000000] initcall 0xffffffff80a1ab30: init_hpfs_fs+0x0/0x70() returned 0.
[    0.000000] initcall 0xffffffff80a1ab30 ran for 9 msecs: init_hpfs_fs+0x0/0x70()
[    0.000000] Calling initcall 0xffffffff80a1aba0: init_ufs_fs+0x0/0x70()
[    0.000000] initcall 0xffffffff80a1aba0: init_ufs_fs+0x0/0x70() returned 0.
[    0.000000] initcall 0xffffffff80a1aba0 ran for 0 msecs: init_ufs_fs+0x0/0x70()
[    0.000000] Calling initcall 0xffffffff80a1ac10: init_romfs_fs+0x0/0x70()
[    0.000000] initcall 0xffffffff80a1ac10: init_romfs_fs+0x0/0x70() returned 0.
[    0.000000] initcall 0xffffffff80a1ac10 ran for 0 msecs: init_romfs_fs+0x0/0x70()
[    0.000000] Calling initcall 0xffffffff80a1ac80: init_qnx4_fs+0x0/0x80()
[    0.000000] QNX4 filesystem 0.2.3 registered.
[    0.000000] initcall 0xffffffff80a1ac80: init_qnx4_fs+0x0/0x80() returned 0.
[    0.000000] initcall 0xffffffff80a1ac80 ran for 0 msecs: init_qnx4_fs+0x0/0x80()
[    0.000000] Calling initcall 0xffffffff80a1ad00: init_autofs4_fs+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1ad00: init_autofs4_fs+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1ad00 ran for 0 msecs: init_autofs4_fs+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1ad20: init_befs_fs+0x0/0x90()
[    0.000000] BeFS version: 0.9.3
[    0.000000] initcall 0xffffffff80a1ad20: init_befs_fs+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a1ad20 ran for 0 msecs: init_befs_fs+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a1ae10: ocfs2_init+0x0/0x2c0()
[    0.000000] OCFS2 1.3.3
[    0.000000] initcall 0xffffffff80a1ae10: ocfs2_init+0x0/0x2c0() returned 0.
[    0.000000] initcall 0xffffffff80a1ae10 ran for 0 msecs: ocfs2_init+0x0/0x2c0()
[    0.000000] Calling initcall 0xffffffff80a1b160: init_o2nm+0x0/0xf0()
[    0.000000] OCFS2 Node Manager 1.3.3
[    0.000000] initcall 0xffffffff80a1b160: init_o2nm+0x0/0xf0() returned 0.
[    0.000000] initcall 0xffffffff80a1b160 ran for 0 msecs: init_o2nm+0x0/0xf0()
[    0.000000] Calling initcall 0xffffffff80a1b250: dlm_init+0x0/0xd0()
[    0.000000] OCFS2 DLM 1.3.3
[    0.000000] initcall 0xffffffff80a1b250: dlm_init+0x0/0xd0() returned 0.
[    0.000000] initcall 0xffffffff80a1b250 ran for 0 msecs: dlm_init+0x0/0xd0()
[    0.000000] Calling initcall 0xffffffff80a1b320: init_dlmfs_fs+0x0/0xf0()
[    0.000000] OCFS2 DLMFS 1.3.3
[    0.000000] OCFS2 User DLM kernel interface loaded
[    0.000000] initcall 0xffffffff80a1b320: init_dlmfs_fs+0x0/0xf0() returned 0.
[    0.000000] initcall 0xffffffff80a1b320 ran for 9 msecs: init_dlmfs_fs+0x0/0xf0()
[    0.000000] Calling initcall 0xffffffff80a1b410: ipc_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1b410: ipc_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1b410 ran for 0 msecs: ipc_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1b580: ipc_sysctl_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1b580: ipc_sysctl_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1b580 ran for 0 msecs: ipc_sysctl_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1b700: key_proc_init+0x0/0x40()
[    0.000000] initcall 0xffffffff80a1b700: key_proc_init+0x0/0x40() returned 0.
[    0.000000] initcall 0xffffffff80a1b700 ran for 0 msecs: key_proc_init+0x0/0x40()
[    0.000000] Calling initcall 0xffffffff80a1b8b0: crypto_algapi_init+0x0/0x10()
[    0.000000] initcall 0xffffffff80a1b8b0: crypto_algapi_init+0x0/0x10() returned 0.
[    0.000000] initcall 0xffffffff80a1b8b0 ran for 0 msecs: crypto_algapi_init+0x0/0x10()
[    0.000000] Calling initcall 0xffffffff80a1b8f0: cryptomgr_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1b8f0: cryptomgr_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1b8f0 ran for 0 msecs: cryptomgr_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1b910: hmac_module_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1b910: hmac_module_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1b910 ran for 0 msecs: hmac_module_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1b930: crypto_xcbc_module_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1b930: crypto_xcbc_module_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1b930 ran for 0 msecs: crypto_xcbc_module_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1b950: init+0x0/0x70()
[    0.000000] initcall 0xffffffff80a1b950: init+0x0/0x70() returned 0.
[    0.000000] initcall 0xffffffff80a1b950 ran for 0 msecs: init+0x0/0x70()
[    0.000000] Calling initcall 0xffffffff80a1b9c0: init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1b9c0: init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1b9c0 ran for 0 msecs: init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1b9e0: init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1b9e0: init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1b9e0 ran for 0 msecs: init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1ba00: init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1ba00: init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1ba00 ran for 0 msecs: init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1ba20: init+0x0/0x50()
[    0.000000] initcall 0xffffffff80a1ba20: init+0x0/0x50() returned 0.
[    0.000000] initcall 0xffffffff80a1ba20 ran for 0 msecs: init+0x0/0x50()
[    0.000000] Calling initcall 0xffffffff80a1ba70: init+0x0/0x90()
[    0.000000] initcall 0xffffffff80a1ba70: init+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a1ba70 ran for 0 msecs: init+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a1bb00: crypto_cbc_module_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1bb00: crypto_cbc_module_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1bb00 ran for 0 msecs: crypto_cbc_module_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1bb20: crypto_module_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1bb20: crypto_module_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1bb20 ran for 0 msecs: crypto_module_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1bb40: cryptd_init+0x0/0xc0()
[    0.000000] initcall 0xffffffff80a1bb40: cryptd_init+0x0/0xc0() returned 0.
[    0.000000] initcall 0xffffffff80a1bb40 ran for 0 msecs: cryptd_init+0x0/0xc0()
[    0.000000] Calling initcall 0xffffffff80a1bc00: init+0x0/0x50()
[    0.000000] initcall 0xffffffff80a1bc00: init+0x0/0x50() returned 0.
[    0.000000] initcall 0xffffffff80a1bc00 ran for 0 msecs: init+0x0/0x50()
[    0.000000] Calling initcall 0xffffffff80a1bc50: init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1bc50: init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1bc50 ran for 0 msecs: init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1bc70: aes_init+0x0/0x360()
[    0.000000] initcall 0xffffffff80a1bc70: aes_init+0x0/0x360() returned 0.
[    0.000000] initcall 0xffffffff80a1bc70 ran for 0 msecs: aes_init+0x0/0x360()
[    0.000000] Calling initcall 0xffffffff80a1bfd0: arc4_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1bfd0: arc4_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1bfd0 ran for 0 msecs: arc4_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1bff0: init+0x0/0x90()
[    0.000000] initcall 0xffffffff80a1bff0: init+0x0/0x90() returned 0.
[    0.000000] initcall 0xffffffff80a1bff0 ran for 0 msecs: init+0x0/0x90()
[    0.000000] Calling initcall 0xffffffff80a1c080: init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1c080: init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1c080 ran for 0 msecs: init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1c0a0: seed_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1c0a0: seed_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1c0a0 ran for 0 msecs: seed_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1c0c0: init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1c0c0: init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1c0c0 ran for 0 msecs: init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1c0e0: michael_mic_init+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1c0e0: michael_mic_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1c0e0 ran for 0 msecs: michael_mic_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1c480: noop_init+0x0/0x20()
[    0.000000] io scheduler noop registered
[    0.000000] initcall 0xffffffff80a1c480: noop_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1c480 ran for 0 msecs: noop_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1c4a0: as_init+0x0/0x20()
[    0.000000] io scheduler anticipatory registered (default)
[    0.000000] initcall 0xffffffff80a1c4a0: as_init+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1c4a0 ran for 9 msecs: as_init+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff80a1c6e0: percpu_counter_startup+0x0/0x20()
[    0.000000] initcall 0xffffffff80a1c6e0: percpu_counter_startup+0x0/0x20() returned 0.
[    0.000000] initcall 0xffffffff80a1c6e0 ran for 0 msecs: percpu_counter_startup+0x0/0x20()
[    0.000000] Calling initcall 0xffffffff8045f520: pci_init+0x0/0x40()
[    0.000000] PCI: Calling quirk ffffffff804625d0 for 0000:00:00.0
[    0.000000] PCI: Calling quirk ffffffff80565b10 for 0000:00:00.0
[    0.000000] PCI: Calling quirk ffffffff805c7570 for 0000:00:00.0
[    0.000000] PCI: Calling quirk ffffffff804625d0 for 0000:00:01.0
[    0.000000] PCI: Calling quirk ffffffff80565b10 for 0000:00:01.0
[    0.000000] PCI: Calling quirk ffffffff805c7570 for 0000:00:01.0
[    0.000000] PCI: Calling quirk ffffffff804625d0 for 0000:00:01.1
[    0.000000] PCI: Calling quirk ffffffff80565b10 for 0000:00:01.1
[    0.000000] PCI: Calling quirk ffffffff805c7570 for 0000:00:01.1
[    0.000000] PCI: Calling quirk ffffffff804625d0 for 0000:00:02.0
[    0.000000] PCI: Calling quirk ffffffff80565b10 for 0000:00:02.0
[    0.000000] ------------[ cut here ]------------
[    0.000000] kernel BUG at arch/x86/mm/pageattr_64.c:176!
[    0.000000] invalid opcode: 0000 [1] SMP 
[    0.000000] CPU 1 
[    0.000000] Modules linked in:
[    0.000000] Pid: 1, comm: swapper Not tainted 2.6.24-rc5 #5
[    0.000000] RIP: 0010:[<ffffffff802229b9>]  [<ffffffff802229b9>] __change_page_attr+0x189/0x2e0
[    0.000000] RSP: 0018:ffff81003f9c3d30  EFLAGS: 00010282
[    0.000000] RAX: 0000000000000400 RBX: 00000000000da103 RCX: ffffe20000000370
[    0.000000] RDX: 000000000000006e RSI: 00003ffffffff000 RDI: ffff81000000a000
[    0.000000] RBP: ffff81003f9c3d90 R08: 80000000da0001e3 R09: 0000000000000001
[    0.000000] R10: 0000000000000001 R11: 00000000ffffffff R12: ffff81000000a680
[    0.000000] R13: 0000000000000001 R14: 8000000000000163 R15: ffff8100da103000
[    0.000000] FS:  0000000000000000(0000) GS:ffff81003f8014b0(0000) knlGS:0000000000000000
[    0.000000] CS:  0010 DS: 0018 ES: 0018 CR0: 000000008005003b
[    0.000000] CR2: 0000000000000000 CR3: 0000000000201000 CR4: 00000000000006e0
[    0.000000] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
[    0.000000] DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
[    0.000000] Process swapper (pid: 1, threadinfo ffff81003f9c2000, task ffff81003f9c0000)
[    0.000000] Stack:  ffff8100da102000 8000000000000163 8000000000000163 0000000000000000
[    0.000000]  ffffffff809320e0 ffff8100da102000 ffff81003f9c3d70 00000000000da103
[    0.000000]  ffff8100da103000 0000000000000001 8000000000000163 0000000000000000
[    0.000000] Call Trace:
[    0.000000]  [<ffffffff80222bb6>] change_page_attr_addr+0xa6/0x150
[    0.000000]  [<ffffffff8022243b>] ioremap_change_attr+0x5b/0x70
[    0.000000]  [<ffffffff8022265f>] iounmap+0xbf/0xe0
[    0.000000]  [<ffffffff80565e23>] quirk_usb_early_handoff+0x313/0x410
[    0.000000]  [<ffffffff8044a109>] kobject_put+0x19/0x20
[    0.000000]  [<ffffffff804a45d5>] put_device+0x15/0x20
[    0.000000]  [<ffffffff804611bd>] pci_fixup_device+0x8d/0xe0
[    0.000000]  [<ffffffff8045f53d>] pci_init+0x1d/0x40
[    0.000000]  [<ffffffff80a04794>] kernel_init+0x164/0x350
[    0.000000]  [<ffffffff8025cd9f>] trace_hardirqs_on+0xbf/0x160
[    0.000000]  [<ffffffff806fc824>] trace_hardirqs_on_thunk+0x35/0x3a
[    0.000000]  [<ffffffff8025cd9f>] trace_hardirqs_on+0xbf/0x160
[    0.000000]  [<ffffffff8020cba8>] child_rip+0xa/0x12
[    0.000000]  [<ffffffff8020c2bf>] restore_args+0x0/0x30
[    0.000000]  [<ffffffff80a04630>] kernel_init+0x0/0x350
[    0.000000]  [<ffffffff8020cb9e>] child_rip+0x0/0x12
[    0.000000] 
[    0.000000] 
[    0.000000] Code: 0f 0b eb fe 0f 0b eb fe 0f 0b eb fe 0f 0b eb fe 48 b8 7f 0f 
[    0.000000] RIP  [<ffffffff802229b9>] __change_page_attr+0x189/0x2e0
[    0.000000]  RSP <ffff81003f9c3d30>
[    0.000000] Kernel panic - not syncing: Attempted to kill init!

Re: [PATCH 2/5] x86: unify pgtable*.h

[Eduardo Habkost]

On Wed, Dec 19, 2007 at 02:35:36PM -0800, Jeremy Fitzhardinge wrote:
> +static inline pte_t pte_mkclean(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
> +static inline pte_t pte_mkold(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
> +static inline pte_t pte_wrprotect(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
> +static inline pte_t pte_mkexec(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_NX)); return pte; }
> +static inline pte_t pte_mkdirty(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
> +static inline pte_t pte_mkyoung(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
> +static inline pte_t pte_mkwrite(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
> +static inline pte_t pte_mkhuge(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_PSE)); return pte; }
> +static inline pte_t pte_clrhuge(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_PSE)); return pte; }


Is set_pte() really supposed to be used here? pte_val() and __pte()
are already hooked by paravirt_ops if needed, and it looks like we
don't want to call paravirt_ops set_pte() here.

I don't know if I understood fully the semantics of set_pte(), but
it seems that the paravirt_ops implementations expect set_pte() to be
called for PTEs that are actually inside existing pagetables (and not
for short-lived stack variables, like on this case).

Was this tested under Xen and/or VMI?

-- 
Eduardo

Re: [PATCH 2/5] x86: unify pgtable*.h

[Jeremy Fitzhardinge]

Eduardo Habkost wrote:
> On Wed, Dec 19, 2007 at 02:35:36PM -0800, Jeremy Fitzhardinge wrote:
>   
>> +static inline pte_t pte_mkclean(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
>> +static inline pte_t pte_mkold(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; }
>> +static inline pte_t pte_wrprotect(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); return pte; }
>> +static inline pte_t pte_mkexec(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_NX)); return pte; }
>> +static inline pte_t pte_mkdirty(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
>> +static inline pte_t pte_mkyoung(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
>> +static inline pte_t pte_mkwrite(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); return pte; }
>> +static inline pte_t pte_mkhuge(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) | _PAGE_PSE)); return pte; }
>> +static inline pte_t pte_clrhuge(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_PSE)); return pte; }
>>     
>
>
> Is set_pte() really supposed to be used here? pte_val() and __pte()
> are already hooked by paravirt_ops if needed, and it looks like we
> don't want to call paravirt_ops set_pte() here.
>   

No, you're right.  That looks pretty stupid.  It will work, but it's
clearly sub-optimal.


> I don't know if I understood fully the semantics of set_pte(), but
> it seems that the paravirt_ops implementations expect set_pte() to be
> called for PTEs that are actually inside existing pagetables (and not
> for short-lived stack variables, like on this case).
>
> Was this tested under Xen and/or VMI?
>   
Yes, Xen.  It's always OK to use set_pte on something that isn't
actually part of a pagetable, since it can be used on pagetables which
are under construction.  But it may end up doing too much work.

    J

Re: [PATCH 0/5] x86: another attempt at x86 pagetable unification

[Jeremy Fitzhardinge]

Ingo Molnar wrote:
> * Jeremy Fitzhardinge <jeremy@goop.org> wrote:
>
>   
>> Here's another round of the pagetable unification patches.  I've done 
>> a few dozen rounds of randconfig builds on both 32- and 64-bit, so I 
>> hope that will prevent compile problems in your test environment.
>>
>> I've also boot-tested 64-bit and 32-bit PAE/non-PAE configs (both 
>> paravirt and non-paravirt).
>>     
>
> i've done a dozen random tests too and it's looking good so far. Nice 
> work!
>
> pgtable_32.h and pgtable_64.h still look a tiny bit messy from the 
> include file dependencies POV. For example pgtable_32.h:
>
>  #include <asm/processor.h>
>  #include <asm/fixmap.h>
>  #include <linux/threads.h>
>  #include <asm/paravirt.h>
>
>  #include <linux/bitops.h>
>  #include <linux/slab.h>
>  #include <linux/list.h>
>  #include <linux/spinlock.h>
>
> that asm/paravirt.h include is already present in pgtable.h, in a 
> somewhat quirky way:
>
> #ifdef CONFIG_PARAVIRT
> #include <asm/paravirt.h>
> #else  /* !CONFIG_PARAVIRT */
>
> also, most of the:
>
>   scripts/checkpatch.pl --file include/asm-x86/pgtable*.h
>
> complaints are real ones and should be fixed.
>
> would you be interested in cleaning up that stuff once and forever? It 
> would be a fine approach if you just tried to quickly push for a "high 
> quality" end result in a series of patches and sent that series to me, 
> without having tested it fully through - i can figure out whatever build 
> breakages and dependencies there still are. So there would be no 
> expectation of getting such a cleanup series right in the first (or 
> second, or third) attempt, this is spaghetti code that has been 
> accumulated up for years. The important thing would be to be careful to 
> not introduce runtime breakages accidentally - build breakages due to 
> some include file dependency we can sort out just fine. Hm?

Yep, I'm happy to do a cleanup pass.  I just wanted to get this out the
door while it seemed to work for me.  But I'll fix the bug first.

    J

Re: [PATCH 0/5] x86: another attempt at x86 pagetable unification

[Jeremy Fitzhardinge]

Ingo Molnar wrote:
> * Ingo Molnar <mingo@elte.hu> wrote:
>
>   
>>> Here's another round of the pagetable unification patches.  I've 
>>> done a few dozen rounds of randconfig builds on both 32- and 64-bit, 
>>> so I hope that will prevent compile problems in your test 
>>> environment.
>>>
>>> I've also boot-tested 64-bit and 32-bit PAE/non-PAE configs (both 
>>> paravirt and non-paravirt).
>>>       
>> i've done a dozen random tests too and it's looking good so far. Nice 
>> work!
>>     
>
> found a couple of bugs.
>
> firstly, 64-bit wasnt so lucky, you broke iounmap()/change_page_attr()
> :-)
>   

Crap.  Worked for me.  I'll look into it.

> The crash is here:
>
> [    0.000000] PCI: Calling quirk ffffffff804625d0 for 0000:00:02.0
> [    0.000000] PCI: Calling quirk ffffffff80565b10 for 0000:00:02.0
> [    0.000000] ------------[ cut here ]------------
> [    0.000000] kernel BUG at arch/x86/mm/pageattr_64.c:176!
> [    0.000000] invalid opcode: 0000 [1] SMP 
> [    0.000000] CPU 1 
> [    0.000000] Modules linked in:
> [    0.000000] Pid: 1, comm: swapper Not tainted 2.6.24-rc5 #5
> [    0.000000] RIP: 0010:[<ffffffff802229b9>]  [<ffffffff802229b9>] __change_page_attr+0x189/0x2e0
> [    0.000000] RSP: 0018:ffff81003f9c3d30  EFLAGS: 00010282
> [    0.000000] RAX: 0000000000000400 RBX: 00000000000da103 RCX: ffffe20000000370
> [    0.000000] RDX: 000000000000006e RSI: 00003ffffffff000 RDI: ffff81000000a000
> [    0.000000] RBP: ffff81003f9c3d90 R08: 80000000da0001e3 R09: 0000000000000001
> [    0.000000] R10: 0000000000000001 R11: 00000000ffffffff R12: ffff81000000a680
> [    0.000000] R13: 0000000000000001 R14: 8000000000000163 R15: ffff8100da103000
> [    0.000000] FS:  0000000000000000(0000) GS:ffff81003f8014b0(0000) knlGS:0000000000000000
> [    0.000000] CS:  0010 DS: 0018 ES: 0018 CR0: 000000008005003b
> [    0.000000] CR2: 0000000000000000 CR3: 0000000000201000 CR4: 00000000000006e0
> [    0.000000] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
> [    0.000000] DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
> [    0.000000] Process swapper (pid: 1, threadinfo ffff81003f9c2000, task ffff81003f9c0000)
> [    0.000000] Stack:  ffff8100da102000 8000000000000163 8000000000000163 0000000000000000
> [    0.000000]  ffffffff809320e0 ffff8100da102000 ffff81003f9c3d70 00000000000da103
> [    0.000000]  ffff8100da103000 0000000000000001 8000000000000163 0000000000000000
> [    0.000000] Call Trace:
> [    0.000000]  [<ffffffff80222bb6>] change_page_attr_addr+0xa6/0x150
> [    0.000000]  [<ffffffff8022243b>] ioremap_change_attr+0x5b/0x70
> [    0.000000]  [<ffffffff8022265f>] iounmap+0xbf/0xe0
> [    0.000000]  [<ffffffff80565e23>] quirk_usb_early_handoff+0x313/0x410
> [    0.000000]  [<ffffffff8044a109>] kobject_put+0x19/0x20
> [    0.000000]  [<ffffffff804a45d5>] put_device+0x15/0x20
> [    0.000000]  [<ffffffff804611bd>] pci_fixup_device+0x8d/0xe0
> [    0.000000]  [<ffffffff8045f53d>] pci_init+0x1d/0x40
> [    0.000000]  [<ffffffff80a04794>] kernel_init+0x164/0x350
> [    0.000000]  [<ffffffff8025cd9f>] trace_hardirqs_on+0xbf/0x160
> [    0.000000]  [<ffffffff806fc824>] trace_hardirqs_on_thunk+0x35/0x3a
> [    0.000000]  [<ffffffff8025cd9f>] trace_hardirqs_on+0xbf/0x160
> [    0.000000]  [<ffffffff8020cba8>] child_rip+0xa/0x12
> [    0.000000]  [<ffffffff8020c2bf>] restore_args+0x0/0x30
> [    0.000000]  [<ffffffff80a04630>] kernel_init+0x0/0x350
> [    0.000000]  [<ffffffff8020cb9e>] child_rip+0x0/0x12
> [    0.000000] 
> [    0.000000] 
> [    0.000000] Code: 0f 0b eb fe 0f 0b eb fe 0f 0b eb fe 0f 0b eb fe 48 b8 7f 0f 
> [    0.000000] RIP  [<ffffffff802229b9>] __change_page_attr+0x189/0x2e0
> [    0.000000]  RSP <ffff81003f9c3d30>
> [    0.000000] Kernel panic - not syncing: Attempted to kill init!
>
> secondly, as i tried to bisect it, it would build and boot at this 
> patch:
>
>   Subject: x86: clean up asm-x86/page*.h
>
> but wouldnt build at this patch:
>
>   Subject: x86: unify pgtable*.h
>
> nor at this patch:
>
>   Subject: x86: fix up formatting in pgtable*.h
>
> it finally built at:
>
>   Subject: x86: use a uniform structure for pte_t
>
> but crashed. So the bug is in one of those 3 patches. Please make them 
> bisect-friendly.
>   

Hm, I tried to.

> full bootlog and config attached. (The crash happens reliably here - if 
> you cannot reproduce it then i can try any fix from you. I've removed 
> the 5 patches of yours for now from x86.git.)
>   

OK.  Will beat on this some more.  Unfortunately I can only test 64-bit
stuff under kvm, and I'm a little bit skeptical of how solid it is,
since i get sporadic random oopses even with base x86.git.  But a nice
simple repeatable BUG_ON should be easy to fix regardless.

    J

Re: [PATCH 0/5] x86: another attempt at x86 pagetable unification

[Ingo Molnar]

* Jeremy Fitzhardinge <jeremy@goop.org> wrote:

> > found a couple of bugs.
> >
> > firstly, 64-bit wasnt so lucky, you broke 
> > iounmap()/change_page_attr()
> > :-)
> 
> Crap.  Worked for me.  I'll look into it.

well, there's an easy solution for unification patches: the resulting 
object files must have _exactly the same_ content as without the 
unification patches. (Modulo strings as WARN_ON()s referring to 
include-file names.)

If they differ then the unification did something wrong. With your 
patchset and the config i sent, the difference is visible in the image 
size already:

   text     data   bss     dec              hex    filename
   7763766  967330 5812328 14543424         ddea40 vmlinux.after
   7763811  967330 5812328 14543469         ddea6d vmlinux.before

also, reducing the size and scope of changes helps as well - because 
that way it can be bisected down to specific changes. Mistakes 
inevitably happen, especially if you do not enforce a rigid 
byte-for-byte correctness along the way. You did 5 rather large patches, 
and it's not testable because your unification steps were too coarse.

In other words: you were asking for trouble and you got it :-)

	Ingo

Re: [PATCH 0/5] x86: another attempt at x86 pagetable unification

[Jeremy Fitzhardinge]

Ingo Molnar wrote:
> * Jeremy Fitzhardinge <jeremy@goop.org> wrote:
>
>   
>>> found a couple of bugs.
>>>
>>> firstly, 64-bit wasnt so lucky, you broke 
>>> iounmap()/change_page_attr()
>>> :-)
>>>       
>> Crap.  Worked for me.  I'll look into it.
>>     
>
> well, there's an easy solution for unification patches: the resulting 
> object files must have _exactly the same_ content as without the 
> unification patches. (Modulo strings as WARN_ON()s referring to 
> include-file names.)
>
> If they differ then the unification did something wrong. With your 
> patchset and the config i sent, the difference is visible in the image 
> size already:
>
>    text     data   bss     dec              hex    filename
>    7763766  967330 5812328 14543424         ddea40 vmlinux.after
>    7763811  967330 5812328 14543469         ddea6d vmlinux.before
>
> also, reducing the size and scope of changes helps as well - because 
> that way it can be bisected down to specific changes. Mistakes 
> inevitably happen, especially if you do not enforce a rigid 
> byte-for-byte correctness along the way. You did 5 rather large patches, 
> and it's not testable because your unification steps were too coarse.
>   

But byte-for-byte identity isn't (necessarily) possible when actually
unifying. If the same function exists in different forms on 32- and
64-bit, then unifying requires I pick one of them (or perhaps a new
superset) to use in the unified form. That function may generate
different code compared to the one that it replaced...

But you're right, I can do the patches in a more piecemeal form. I'll
see if I can rework them.

J

Re: [PATCH 0/5] x86: another attempt at x86 pagetable unification

[Ingo Molnar]

* Jeremy Fitzhardinge <jeremy@goop.org> wrote:

> But byte-for-byte identity isn't (necessarily) possible when actually 
> unifying. If the same function exists in different forms on 32- and 
> 64-bit, then unifying requires I pick one of them (or perhaps a new 
> superset) to use in the unified form. That function may generate 
> different code compared to the one that it replaced...

it's still possible: you can do preparatory patches that bring one 
architecture in sync with the other one, in small, per function steps. 
Then the actual unification is still an identity transformation. (and 
all the preparatory patches are small and bisectable)

it's also a lot less frustrating and a lot more enjoyable that way IMO. 
If it's 50 small patches, then so be it ... 50 patches only take ~2 
seconds more for me to apply to x86.git (which time is immediately saved 
by the vastly improved reviewability and testability of a 50 patches 
set), so dont worry about any overhead on the maintainers side. And 
you'll end up moving up on the v2.6.25 contributors top-list on LWN as 
well ;-) The worst aspect of it is writing up the 50 changelogs (i use 
pre-created templates for that) and figuring out how to script a 
patch-bomb to lkml. In every other aspect it's a win-win scenario for 
everyone involved.

	Ingo

Re: [PATCH 0/5] x86: another attempt at x86 pagetable unification

[Jeremy Fitzhardinge]

Ingo Molnar wrote:
> it's also a lot less frustrating and a lot more enjoyable that way IMO. 
> If it's 50 small patches, then so be it ... 50 patches only take ~2 
> seconds more for me to apply to x86.git (which time is immediately saved 
> by the vastly improved reviewability and testability of a 50 patches 
> set), so dont worry about any overhead on the maintainers side. And 
> you'll end up moving up on the v2.6.25 contributors top-list on LWN as 
> well ;-) The worst aspect of it is writing up the 50 changelogs (i use 
> pre-created templates for that) and figuring out how to script a 
> patch-bomb to lkml. In every other aspect it's a win-win scenario for 
> everyone involved.

Well, testing for bisectability requires compiling each patch as its
applied, which gets painful for something like this where any change
will rebuild the world.  And dealing with patch conflicts caused by
changing early patches in the series is never fun.

But I'm refactoring the series into smaller pieces now.  Knowing what
the outcome should look like, and there the pitfalls are, makes it
fairly easy.

    J

Re: [PATCH 0/5] x86: another attempt at x86 pagetable unification

[Ingo Molnar]

* Jeremy Fitzhardinge <jeremy@goop.org> wrote:

> Well, testing for bisectability requires compiling each patch as its 
> applied, which gets painful for something like this where any change 
> will rebuild the world.  And dealing with patch conflicts caused by 
> changing early patches in the series is never fun.

that's true. The 'rej' tool helps alot though. ( Plus a distcc cluster 
that builds a distro kernel in 45-50 seconds from scratch ;)

> But I'm refactoring the series into smaller pieces now.  Knowing what 
> the outcome should look like, and there the pitfalls are, makes it 
> fairly easy.

ok, great :-)

	Ingo

Re: [PATCH 0/5] x86: another attempt at x86 pagetable unification

[Glauber de Oliveira Costa]

On Dec 20, 2007 10:58 PM, Ingo Molnar <mingo@elte.hu> wrote:
>
> * Jeremy Fitzhardinge <jeremy@goop.org> wrote:
>
> > Well, testing for bisectability requires compiling each patch as its
> > applied, which gets painful for something like this where any change
> > will rebuild the world.  And dealing with patch conflicts caused by
> > changing early patches in the series is never fun.
>
> that's true. The 'rej' tool helps alot though. ( Plus a distcc cluster
> that builds a distro kernel in 45-50 seconds from scratch ;)


So that's your secret!


-- 
Glauber de Oliveira Costa.
"Free as in Freedom"
http://glommer.net

"The less confident you are, the more serious you have to act."