From: Hector Martin <marcan@marcan.st>
To: Marc Zyngier <maz@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh+dt@kernel.org>, Sven Peter <sven@svenpeter.dev>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
Mark Kettenis <mark.kettenis@xs4all.nl>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 7/7] irqchip/apple-aic: Add support for AICv2
Date: Sat, 26 Feb 2022 07:05:26 +0900 [thread overview]
Message-ID: <4fbeeae8-0b56-e665-744f-6a1ca2b24f9e@marcan.st> (raw)
In-Reply-To: <87lexz2cgv.wl-maz@kernel.org>
On 26/02/2022 00.27, Marc Zyngier wrote:
> On Thu, 24 Feb 2022 13:07:41 +0000,
> Hector Martin <marcan@marcan.st> wrote:
>> - /*
>> - * Make sure the kernel's idea of logical CPU order is the same as AIC's
>> - * If we ever end up with a mismatch here, we will have to introduce
>> - * a mapping table similar to what other irqchip drivers do.
>> - */
>> - WARN_ON(aic_ic_read(aic_irqc, AIC_WHOAMI) != smp_processor_id());
>> + if (aic_irqc->info.version == 1) {
>> + /*
>> + * Make sure the kernel's idea of logical CPU order is the same as AIC's
>> + * If we ever end up with a mismatch here, we will have to introduce
>> + * a mapping table similar to what other irqchip drivers do.
>> + */
>> + WARN_ON(aic_ic_read(aic_irqc, AIC_WHOAMI) != smp_processor_id());
>
> Don't you have a similar issue with AICv2? Or is it that AICv2
> doesn't have this register?
No concept of individual CPUs in AICv2 at all, so no WHOAMI register
either :)
--
Hector Martin (marcan@marcan.st)
Public Key: https://mrcn.st/pub
next prev parent reply other threads:[~2022-02-25 22:05 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-24 13:07 [PATCH v2 0/7] irqchip/apple-aic: Add support for AICv2 Hector Martin
2022-02-24 13:07 ` [PATCH v2 1/7] PCI: apple: Change MSI handling to handle 4-cell AIC fwspec form Hector Martin
2022-02-24 13:07 ` [PATCH v2 2/7] dt-bindings: interrupt-controller: apple,aic2: New binding for AICv2 Hector Martin
2022-02-25 20:19 ` Rob Herring
2022-02-25 21:58 ` Hector Martin
2022-03-07 11:35 ` Marc Zyngier
2022-02-24 13:07 ` [PATCH v2 3/7] irqchip/apple-aic: Add Fast IPI support Hector Martin
2022-02-25 14:39 ` Marc Zyngier
2022-02-27 15:33 ` Hector Martin
2022-03-07 11:35 ` Marc Zyngier
2022-02-24 13:07 ` [PATCH v2 4/7] irqchip/apple-aic: Switch to irq_domain_create_tree and sparse hwirqs Hector Martin
2022-02-24 13:07 ` [PATCH v2 5/7] irqchip/apple-aic: Dynamically compute register offsets Hector Martin
2022-02-24 13:07 ` [PATCH v2 6/7] irqchip/apple-aic: Support multiple dies Hector Martin
2022-02-24 13:07 ` [PATCH v2 7/7] irqchip/apple-aic: Add support for AICv2 Hector Martin
2022-02-25 15:27 ` Marc Zyngier
2022-02-25 22:05 ` Hector Martin [this message]
2022-02-24 18:26 ` [PATCH v2 0/7] " Mark Rutland
2022-02-24 19:06 ` Marc Zyngier
2022-02-25 4:27 ` Hector Martin
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