linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Christophe Leroy <christophe.leroy@c-s.fr>
To: Rasmus Villemoes <linux@rasmusvillemoes.dk>,
	Qiang Zhao <qiang.zhao@nxp.com>, Li Yang <leoyang.li@nxp.com>
Cc: linuxppc-dev@lists.ozlabs.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Scott Wood <oss@buserror.net>
Subject: Re: [PATCH v3 26/36] soc: fsl: move cpm.h from powerpc/include/asm to include/soc/fsl
Date: Fri, 1 Nov 2019 17:18:10 +0100	[thread overview]
Message-ID: <5071118d-2008-7725-a6cd-ce14b49dfa20@c-s.fr> (raw)
In-Reply-To: <20191101124210.14510-27-linux@rasmusvillemoes.dk>



Le 01/11/2019 à 13:42, Rasmus Villemoes a écrit :
> Some drivers, e.g. ucc_uart, need definitions from cpm.h. In order to
> allow building those drivers for non-ppc based SOCs, move the header
> to include/soc/fsl. For now, leave a trivial wrapper at the old
> location so drivers can be updated one by one.

I'm not sure that's the correct way to go.

As far as I know, CPM is specific to powerpc (or maybe common to some 
motorola 68000). So only powerpc specific drivers should need it.

If cpm.h includes items that are needed for QE, those items should go in 
another .h

Of course, it doesn't mean we can't move cpm.h in include/soc/fsl, but 
anyway only platforms having CPM1 or CPM2 should include it.

Christophe


> 
> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
> ---
>   arch/powerpc/include/asm/cpm.h | 172 +--------------------------------
>   include/soc/fsl/cpm.h          | 171 ++++++++++++++++++++++++++++++++
>   2 files changed, 172 insertions(+), 171 deletions(-)
>   create mode 100644 include/soc/fsl/cpm.h
> 
> diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
> index 4c24ea8209bb..ce483b0f8a4d 100644
> --- a/arch/powerpc/include/asm/cpm.h
> +++ b/arch/powerpc/include/asm/cpm.h
> @@ -1,171 +1 @@
> -/* SPDX-License-Identifier: GPL-2.0 */
> -#ifndef __CPM_H
> -#define __CPM_H
> -
> -#include <linux/compiler.h>
> -#include <linux/types.h>
> -#include <linux/errno.h>
> -#include <linux/of.h>
> -#include <soc/fsl/qe/qe.h>
> -
> -/*
> - * SPI Parameter RAM common to QE and CPM.
> - */
> -struct spi_pram {
> -	__be16	rbase;	/* Rx Buffer descriptor base address */
> -	__be16	tbase;	/* Tx Buffer descriptor base address */
> -	u8	rfcr;	/* Rx function code */
> -	u8	tfcr;	/* Tx function code */
> -	__be16	mrblr;	/* Max receive buffer length */
> -	__be32	rstate;	/* Internal */
> -	__be32	rdp;	/* Internal */
> -	__be16	rbptr;	/* Internal */
> -	__be16	rbc;	/* Internal */
> -	__be32	rxtmp;	/* Internal */
> -	__be32	tstate;	/* Internal */
> -	__be32	tdp;	/* Internal */
> -	__be16	tbptr;	/* Internal */
> -	__be16	tbc;	/* Internal */
> -	__be32	txtmp;	/* Internal */
> -	__be32	res;	/* Tx temp. */
> -	__be16  rpbase;	/* Relocation pointer (CPM1 only) */
> -	__be16	res1;	/* Reserved */
> -};
> -
> -/*
> - * USB Controller pram common to QE and CPM.
> - */
> -struct usb_ctlr {
> -	u8	usb_usmod;
> -	u8	usb_usadr;
> -	u8	usb_uscom;
> -	u8	res1[1];
> -	__be16	usb_usep[4];
> -	u8	res2[4];
> -	__be16	usb_usber;
> -	u8	res3[2];
> -	__be16	usb_usbmr;
> -	u8	res4[1];
> -	u8	usb_usbs;
> -	/* Fields down below are QE-only */
> -	__be16	usb_ussft;
> -	u8	res5[2];
> -	__be16	usb_usfrn;
> -	u8	res6[0x22];
> -} __attribute__ ((packed));
> -
> -/*
> - * Function code bits, usually generic to devices.
> - */
> -#ifdef CONFIG_CPM1
> -#define CPMFCR_GBL	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
> -#define CPMFCR_TC2	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
> -#define CPMFCR_DTB	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
> -#define CPMFCR_BDB	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
> -#else
> -#define CPMFCR_GBL	((u_char)0x20)	/* Set memory snooping */
> -#define CPMFCR_TC2	((u_char)0x04)	/* Transfer code 2 value */
> -#define CPMFCR_DTB	((u_char)0x02)	/* Use local bus for data when set */
> -#define CPMFCR_BDB	((u_char)0x01)	/* Use local bus for BD when set */
> -#endif
> -#define CPMFCR_EB	((u_char)0x10)	/* Set big endian byte order */
> -
> -/* Opcodes common to CPM1 and CPM2
> -*/
> -#define CPM_CR_INIT_TRX		((ushort)0x0000)
> -#define CPM_CR_INIT_RX		((ushort)0x0001)
> -#define CPM_CR_INIT_TX		((ushort)0x0002)
> -#define CPM_CR_HUNT_MODE	((ushort)0x0003)
> -#define CPM_CR_STOP_TX		((ushort)0x0004)
> -#define CPM_CR_GRA_STOP_TX	((ushort)0x0005)
> -#define CPM_CR_RESTART_TX	((ushort)0x0006)
> -#define CPM_CR_CLOSE_RX_BD	((ushort)0x0007)
> -#define CPM_CR_SET_GADDR	((ushort)0x0008)
> -#define CPM_CR_SET_TIMER	((ushort)0x0008)
> -#define CPM_CR_STOP_IDMA	((ushort)0x000b)
> -
> -/* Buffer descriptors used by many of the CPM protocols. */
> -typedef struct cpm_buf_desc {
> -	ushort	cbd_sc;		/* Status and Control */
> -	ushort	cbd_datlen;	/* Data length in buffer */
> -	uint	cbd_bufaddr;	/* Buffer address in host memory */
> -} cbd_t;
> -
> -/* Buffer descriptor control/status used by serial
> - */
> -
> -#define BD_SC_EMPTY	(0x8000)	/* Receive is empty */
> -#define BD_SC_READY	(0x8000)	/* Transmit is ready */
> -#define BD_SC_WRAP	(0x2000)	/* Last buffer descriptor */
> -#define BD_SC_INTRPT	(0x1000)	/* Interrupt on change */
> -#define BD_SC_LAST	(0x0800)	/* Last buffer in frame */
> -#define BD_SC_TC	(0x0400)	/* Transmit CRC */
> -#define BD_SC_CM	(0x0200)	/* Continuous mode */
> -#define BD_SC_ID	(0x0100)	/* Rec'd too many idles */
> -#define BD_SC_P		(0x0100)	/* xmt preamble */
> -#define BD_SC_BR	(0x0020)	/* Break received */
> -#define BD_SC_FR	(0x0010)	/* Framing error */
> -#define BD_SC_PR	(0x0008)	/* Parity error */
> -#define BD_SC_NAK	(0x0004)	/* NAK - did not respond */
> -#define BD_SC_OV	(0x0002)	/* Overrun */
> -#define BD_SC_UN	(0x0002)	/* Underrun */
> -#define BD_SC_CD	(0x0001)	/* */
> -#define BD_SC_CL	(0x0001)	/* Collision */
> -
> -/* Buffer descriptor control/status used by Ethernet receive.
> - * Common to SCC and FCC.
> - */
> -#define BD_ENET_RX_EMPTY	(0x8000)
> -#define BD_ENET_RX_WRAP		(0x2000)
> -#define BD_ENET_RX_INTR		(0x1000)
> -#define BD_ENET_RX_LAST		(0x0800)
> -#define BD_ENET_RX_FIRST	(0x0400)
> -#define BD_ENET_RX_MISS		(0x0100)
> -#define BD_ENET_RX_BC		(0x0080)	/* FCC Only */
> -#define BD_ENET_RX_MC		(0x0040)	/* FCC Only */
> -#define BD_ENET_RX_LG		(0x0020)
> -#define BD_ENET_RX_NO		(0x0010)
> -#define BD_ENET_RX_SH		(0x0008)
> -#define BD_ENET_RX_CR		(0x0004)
> -#define BD_ENET_RX_OV		(0x0002)
> -#define BD_ENET_RX_CL		(0x0001)
> -#define BD_ENET_RX_STATS	(0x01ff)	/* All status bits */
> -
> -/* Buffer descriptor control/status used by Ethernet transmit.
> - * Common to SCC and FCC.
> - */
> -#define BD_ENET_TX_READY	(0x8000)
> -#define BD_ENET_TX_PAD		(0x4000)
> -#define BD_ENET_TX_WRAP		(0x2000)
> -#define BD_ENET_TX_INTR		(0x1000)
> -#define BD_ENET_TX_LAST		(0x0800)
> -#define BD_ENET_TX_TC		(0x0400)
> -#define BD_ENET_TX_DEF		(0x0200)
> -#define BD_ENET_TX_HB		(0x0100)
> -#define BD_ENET_TX_LC		(0x0080)
> -#define BD_ENET_TX_RL		(0x0040)
> -#define BD_ENET_TX_RCMASK	(0x003c)
> -#define BD_ENET_TX_UN		(0x0002)
> -#define BD_ENET_TX_CSL		(0x0001)
> -#define BD_ENET_TX_STATS	(0x03ff)	/* All status bits */
> -
> -/* Buffer descriptor control/status used by Transparent mode SCC.
> - */
> -#define BD_SCC_TX_LAST		(0x0800)
> -
> -/* Buffer descriptor control/status used by I2C.
> - */
> -#define BD_I2C_START		(0x0400)
> -
> -#ifdef CONFIG_CPM
> -int cpm_command(u32 command, u8 opcode);
> -#else
> -static inline int cpm_command(u32 command, u8 opcode)
> -{
> -	return -ENOSYS;
> -}
> -#endif /* CONFIG_CPM */
> -
> -int cpm2_gpiochip_add32(struct device *dev);
> -
> -#endif
> +#include <soc/fsl/cpm.h>
> diff --git a/include/soc/fsl/cpm.h b/include/soc/fsl/cpm.h
> new file mode 100644
> index 000000000000..4c24ea8209bb
> --- /dev/null
> +++ b/include/soc/fsl/cpm.h
> @@ -0,0 +1,171 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef __CPM_H
> +#define __CPM_H
> +
> +#include <linux/compiler.h>
> +#include <linux/types.h>
> +#include <linux/errno.h>
> +#include <linux/of.h>
> +#include <soc/fsl/qe/qe.h>
> +
> +/*
> + * SPI Parameter RAM common to QE and CPM.
> + */
> +struct spi_pram {
> +	__be16	rbase;	/* Rx Buffer descriptor base address */
> +	__be16	tbase;	/* Tx Buffer descriptor base address */
> +	u8	rfcr;	/* Rx function code */
> +	u8	tfcr;	/* Tx function code */
> +	__be16	mrblr;	/* Max receive buffer length */
> +	__be32	rstate;	/* Internal */
> +	__be32	rdp;	/* Internal */
> +	__be16	rbptr;	/* Internal */
> +	__be16	rbc;	/* Internal */
> +	__be32	rxtmp;	/* Internal */
> +	__be32	tstate;	/* Internal */
> +	__be32	tdp;	/* Internal */
> +	__be16	tbptr;	/* Internal */
> +	__be16	tbc;	/* Internal */
> +	__be32	txtmp;	/* Internal */
> +	__be32	res;	/* Tx temp. */
> +	__be16  rpbase;	/* Relocation pointer (CPM1 only) */
> +	__be16	res1;	/* Reserved */
> +};
> +
> +/*
> + * USB Controller pram common to QE and CPM.
> + */
> +struct usb_ctlr {
> +	u8	usb_usmod;
> +	u8	usb_usadr;
> +	u8	usb_uscom;
> +	u8	res1[1];
> +	__be16	usb_usep[4];
> +	u8	res2[4];
> +	__be16	usb_usber;
> +	u8	res3[2];
> +	__be16	usb_usbmr;
> +	u8	res4[1];
> +	u8	usb_usbs;
> +	/* Fields down below are QE-only */
> +	__be16	usb_ussft;
> +	u8	res5[2];
> +	__be16	usb_usfrn;
> +	u8	res6[0x22];
> +} __attribute__ ((packed));
> +
> +/*
> + * Function code bits, usually generic to devices.
> + */
> +#ifdef CONFIG_CPM1
> +#define CPMFCR_GBL	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
> +#define CPMFCR_TC2	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
> +#define CPMFCR_DTB	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
> +#define CPMFCR_BDB	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
> +#else
> +#define CPMFCR_GBL	((u_char)0x20)	/* Set memory snooping */
> +#define CPMFCR_TC2	((u_char)0x04)	/* Transfer code 2 value */
> +#define CPMFCR_DTB	((u_char)0x02)	/* Use local bus for data when set */
> +#define CPMFCR_BDB	((u_char)0x01)	/* Use local bus for BD when set */
> +#endif
> +#define CPMFCR_EB	((u_char)0x10)	/* Set big endian byte order */
> +
> +/* Opcodes common to CPM1 and CPM2
> +*/
> +#define CPM_CR_INIT_TRX		((ushort)0x0000)
> +#define CPM_CR_INIT_RX		((ushort)0x0001)
> +#define CPM_CR_INIT_TX		((ushort)0x0002)
> +#define CPM_CR_HUNT_MODE	((ushort)0x0003)
> +#define CPM_CR_STOP_TX		((ushort)0x0004)
> +#define CPM_CR_GRA_STOP_TX	((ushort)0x0005)
> +#define CPM_CR_RESTART_TX	((ushort)0x0006)
> +#define CPM_CR_CLOSE_RX_BD	((ushort)0x0007)
> +#define CPM_CR_SET_GADDR	((ushort)0x0008)
> +#define CPM_CR_SET_TIMER	((ushort)0x0008)
> +#define CPM_CR_STOP_IDMA	((ushort)0x000b)
> +
> +/* Buffer descriptors used by many of the CPM protocols. */
> +typedef struct cpm_buf_desc {
> +	ushort	cbd_sc;		/* Status and Control */
> +	ushort	cbd_datlen;	/* Data length in buffer */
> +	uint	cbd_bufaddr;	/* Buffer address in host memory */
> +} cbd_t;
> +
> +/* Buffer descriptor control/status used by serial
> + */
> +
> +#define BD_SC_EMPTY	(0x8000)	/* Receive is empty */
> +#define BD_SC_READY	(0x8000)	/* Transmit is ready */
> +#define BD_SC_WRAP	(0x2000)	/* Last buffer descriptor */
> +#define BD_SC_INTRPT	(0x1000)	/* Interrupt on change */
> +#define BD_SC_LAST	(0x0800)	/* Last buffer in frame */
> +#define BD_SC_TC	(0x0400)	/* Transmit CRC */
> +#define BD_SC_CM	(0x0200)	/* Continuous mode */
> +#define BD_SC_ID	(0x0100)	/* Rec'd too many idles */
> +#define BD_SC_P		(0x0100)	/* xmt preamble */
> +#define BD_SC_BR	(0x0020)	/* Break received */
> +#define BD_SC_FR	(0x0010)	/* Framing error */
> +#define BD_SC_PR	(0x0008)	/* Parity error */
> +#define BD_SC_NAK	(0x0004)	/* NAK - did not respond */
> +#define BD_SC_OV	(0x0002)	/* Overrun */
> +#define BD_SC_UN	(0x0002)	/* Underrun */
> +#define BD_SC_CD	(0x0001)	/* */
> +#define BD_SC_CL	(0x0001)	/* Collision */
> +
> +/* Buffer descriptor control/status used by Ethernet receive.
> + * Common to SCC and FCC.
> + */
> +#define BD_ENET_RX_EMPTY	(0x8000)
> +#define BD_ENET_RX_WRAP		(0x2000)
> +#define BD_ENET_RX_INTR		(0x1000)
> +#define BD_ENET_RX_LAST		(0x0800)
> +#define BD_ENET_RX_FIRST	(0x0400)
> +#define BD_ENET_RX_MISS		(0x0100)
> +#define BD_ENET_RX_BC		(0x0080)	/* FCC Only */
> +#define BD_ENET_RX_MC		(0x0040)	/* FCC Only */
> +#define BD_ENET_RX_LG		(0x0020)
> +#define BD_ENET_RX_NO		(0x0010)
> +#define BD_ENET_RX_SH		(0x0008)
> +#define BD_ENET_RX_CR		(0x0004)
> +#define BD_ENET_RX_OV		(0x0002)
> +#define BD_ENET_RX_CL		(0x0001)
> +#define BD_ENET_RX_STATS	(0x01ff)	/* All status bits */
> +
> +/* Buffer descriptor control/status used by Ethernet transmit.
> + * Common to SCC and FCC.
> + */
> +#define BD_ENET_TX_READY	(0x8000)
> +#define BD_ENET_TX_PAD		(0x4000)
> +#define BD_ENET_TX_WRAP		(0x2000)
> +#define BD_ENET_TX_INTR		(0x1000)
> +#define BD_ENET_TX_LAST		(0x0800)
> +#define BD_ENET_TX_TC		(0x0400)
> +#define BD_ENET_TX_DEF		(0x0200)
> +#define BD_ENET_TX_HB		(0x0100)
> +#define BD_ENET_TX_LC		(0x0080)
> +#define BD_ENET_TX_RL		(0x0040)
> +#define BD_ENET_TX_RCMASK	(0x003c)
> +#define BD_ENET_TX_UN		(0x0002)
> +#define BD_ENET_TX_CSL		(0x0001)
> +#define BD_ENET_TX_STATS	(0x03ff)	/* All status bits */
> +
> +/* Buffer descriptor control/status used by Transparent mode SCC.
> + */
> +#define BD_SCC_TX_LAST		(0x0800)
> +
> +/* Buffer descriptor control/status used by I2C.
> + */
> +#define BD_I2C_START		(0x0400)
> +
> +#ifdef CONFIG_CPM
> +int cpm_command(u32 command, u8 opcode);
> +#else
> +static inline int cpm_command(u32 command, u8 opcode)
> +{
> +	return -ENOSYS;
> +}
> +#endif /* CONFIG_CPM */
> +
> +int cpm2_gpiochip_add32(struct device *dev);
> +
> +#endif
> 

  reply	other threads:[~2019-11-01 16:18 UTC|newest]

Thread overview: 120+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-18 12:52 [PATCH 0/7] towards QE support on ARM Rasmus Villemoes
2019-10-18 12:52 ` [PATCH 1/7] soc: fsl: qe: remove space-before-tab Rasmus Villemoes
2019-10-18 12:57   ` Christophe Leroy
2019-10-18 12:52 ` [PATCH 2/7] soc: fsl: qe: drop volatile qualifier of struct qe_ic::regs Rasmus Villemoes
2019-10-18 13:01   ` Christophe Leroy
2019-10-18 12:52 ` [PATCH 3/7] soc: fsl: qe: avoid ppc-specific io accessors Rasmus Villemoes
2019-10-22 15:01   ` Christophe Leroy
2019-10-23  7:08     ` Rasmus Villemoes
2019-10-18 12:52 ` [PATCH 4/7] soc: fsl: qe: replace spin_event_timeout by readx_poll_timeout_atomic Rasmus Villemoes
2019-10-18 16:08   ` Christoph Hellwig
2019-10-24  8:32     ` Rasmus Villemoes
2019-10-30  0:36       ` Michael Ellerman
2019-10-18 12:52 ` [PATCH 5/7] serial: make SERIAL_QE depend on PPC32 Rasmus Villemoes
2019-10-18 12:52 ` [PATCH 6/7] serial: ucc_uart.c: explicitly include asm/cpm.h Rasmus Villemoes
2019-10-18 12:52 ` [PATCH 7/7] soc/fsl/qe/qe.h: remove include of asm/cpm.h Rasmus Villemoes
2019-10-18 20:16 ` [PATCH 0/7] towards QE support on ARM Leo Li
2019-10-18 20:52   ` Rasmus Villemoes
2019-10-18 21:52     ` Li Yang
2019-10-21  8:44       ` Rasmus Villemoes
2019-10-21 22:11         ` Li Yang
2019-10-22  2:24           ` Qiang Zhao
2019-10-22 10:17             ` Rasmus Villemoes
2019-10-23  2:52               ` Qiang Zhao
2019-10-24 20:02                 ` Li Yang
2019-10-22 10:12           ` Rasmus Villemoes
2019-10-22 15:06 ` Christophe Leroy
2019-10-25 12:40 ` [PATCH v2 00/23] QUICC Engine " Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 01/23] soc: fsl: qe: remove space-before-tab Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 02/23] soc: fsl: qe: drop volatile qualifier of struct qe_ic::regs Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 03/23] soc: fsl: qe: avoid ppc-specific io accessors Rasmus Villemoes
2019-10-29  7:43     ` Christophe Leroy
2019-10-29  8:43       ` ppc: inlining iowrite32be and friends (was: Re: [PATCH v2 03/23] soc: fsl: qe: avoid ppc-specific io accessors) Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 04/23] soc: fsl: qe: replace spin_event_timeout by readx_poll_timeout_atomic Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 05/23] soc: fsl: qe: qe.c: guard use of pvr_version_is() with CONFIG_PPC32 Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 06/23] soc: fsl: qe: avoid tail comments in qe_ic.h Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 07/23] soc: fsl: qe: merge qe_ic.h into qe_ic.c Rasmus Villemoes
2019-10-30 10:24     ` Christophe Leroy
2019-10-25 12:40   ` [PATCH v2 08/23] soc: fsl: qe: drop unneeded #includes Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 09/23] soc: fsl: qe: move qe_ic_cascade_* functions to qe_ic.c Rasmus Villemoes
2019-10-30 10:45     ` Christophe Leroy
2019-10-25 12:40   ` [PATCH v2 10/23] soc: fsl: qe: use qe_ic_cascade_{low,high}_mpic also on 83xx Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 11/23] soc: fsl: qe: rename qe_ic_cascade_low_mpic -> qe_ic_cascade_low Rasmus Villemoes
2019-10-30 10:47     ` Christophe Leroy
2019-10-25 12:40   ` [PATCH v2 12/23] soc: fsl: qe: drop assign-only high_active in qe_ic_init Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 13/23] soc: fsl: qe: remove pointless sysfs registration in qe_ic.c Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 14/23] soc: fsl: qe: move calls of qe_ic_init out of arch/powerpc/ Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 15/23] powerpc/83xx: remove mpc83xx_ipic_and_qe_init_IRQ Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 16/23] powerpc/85xx: remove mostly pointless mpc85xx_qe_init() Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 17/23] soc: fsl: qe: make qe_ic_cascade_* static Rasmus Villemoes
2019-10-30 10:50     ` Christophe Leroy
2019-10-30 12:52       ` Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 18/23] soc: fsl: qe: remove unused qe_ic_set_* functions Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 19/23] net: ethernet: freescale: make UCC_GETH explicitly depend on PPC32 Rasmus Villemoes
2019-10-30 10:55     ` Christophe Leroy
2019-10-25 12:40   ` [PATCH v2 20/23] serial: make SERIAL_QE " Rasmus Villemoes
2019-10-29 22:44     ` Leo Li
2019-10-29 22:50       ` Rasmus Villemoes
2019-10-30 10:56     ` Christophe Leroy
2019-10-25 12:40   ` [PATCH v2 21/23] serial: ucc_uart.c: explicitly include asm/cpm.h Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 22/23] soc/fsl/qe/qe.h: remove include of asm/cpm.h Rasmus Villemoes
2019-10-25 12:40   ` [PATCH v2 23/23] soc: fsl: qe: remove PPC32 dependency from CONFIG_QUICC_ENGINE Rasmus Villemoes
2019-10-28 14:17     ` kbuild test robot
2019-10-28 14:49     ` kbuild test robot
2019-10-29  0:50     ` kbuild test robot
2019-11-01 12:41 ` [PATCH v3 00/36] QUICC Engine support on ARM Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 01/36] soc: fsl: qe: remove space-before-tab Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 02/36] soc: fsl: qe: drop volatile qualifier of struct qe_ic::regs Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 03/36] soc: fsl: qe: rename qe_(clr/set/clrset)bit* helpers Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 04/36] soc: fsl: qe: introduce qe_io{read,write}* wrappers Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 05/36] soc: fsl: qe: avoid ppc-specific io accessors Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 06/36] soc: fsl: qe: replace spin_event_timeout by readx_poll_timeout_atomic Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 07/36] soc: fsl: qe: qe.c: guard use of pvr_version_is() with CONFIG_PPC32 Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 08/36] soc: fsl: qe: drop unneeded #includes Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 09/36] soc: fsl: qe: drop assign-only high_active in qe_ic_init Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 10/36] soc: fsl: qe: remove pointless sysfs registration in qe_ic.c Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 11/36] soc: fsl: qe: use qe_ic_cascade_{low,high}_mpic also on 83xx Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 12/36] soc: fsl: qe: move calls of qe_ic_init out of arch/powerpc/ Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 13/36] powerpc/83xx: remove mpc83xx_ipic_and_qe_init_IRQ Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 14/36] powerpc/85xx: remove mostly pointless mpc85xx_qe_init() Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 15/36] soc: fsl: qe: move qe_ic_cascade_* functions to qe_ic.c Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 16/36] soc: fsl: qe: rename qe_ic_cascade_low_mpic -> qe_ic_cascade_low Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 17/36] soc: fsl: qe: remove unused qe_ic_set_* functions Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 18/36] soc: fsl: qe: don't use NO_IRQ in qe_ic.c Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 19/36] soc: fsl: qe: make qe_ic_get_{low,high}_irq static Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 20/36] soc: fsl: qe: simplify qe_ic_init() Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 21/36] soc: fsl: qe: merge qe_ic.h headers into qe_ic.c Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 22/36] soc: fsl: qe: qe.c: use of_property_read_* helpers Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 23/36] soc: fsl: qe: qe_io.c: don't open-code of_parse_phandle() Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 24/36] soc: fsl: qe: qe_io.c: access device tree property using be32_to_cpu Rasmus Villemoes
2019-11-01 12:41   ` [PATCH v3 25/36] soc: fsl: qe: qe_io.c: use of_property_read_u32() in par_io_init() Rasmus Villemoes
2019-11-01 12:42   ` [PATCH v3 26/36] soc: fsl: move cpm.h from powerpc/include/asm to include/soc/fsl Rasmus Villemoes
2019-11-01 16:18     ` Christophe Leroy [this message]
2019-11-01 16:59       ` Scott Wood
2019-11-01 12:42   ` [PATCH v3 27/36] soc/fsl/qe/qe.h: update include path for cpm.h Rasmus Villemoes
2019-11-01 12:42   ` [PATCH v3 28/36] serial: ucc_uart: explicitly include soc/fsl/cpm.h Rasmus Villemoes
2019-11-01 16:19     ` Christophe Leroy
2019-11-04  7:38       ` Rasmus Villemoes
2019-11-01 12:42   ` [PATCH v3 29/36] serial: ucc_uart: replace ppc-specific IO accessors Rasmus Villemoes
2019-11-01 12:42   ` [PATCH v3 30/36] serial: ucc_uart: factor out soft_uart initialization Rasmus Villemoes
2019-11-01 12:42   ` [PATCH v3 31/36] serial: ucc_uart: stub out soft_uart_init for !CONFIG_PPC32 Rasmus Villemoes
2019-11-01 16:27     ` Christophe Leroy
2019-11-04  8:03       ` Rasmus Villemoes
2019-11-01 12:42   ` [PATCH v3 32/36] serial: ucc_uart: use of_property_read_u32() in ucc_uart_probe() Rasmus Villemoes
2019-11-01 12:42   ` [PATCH v3 33/36] serial: ucc_uart: access __be32 field using be32_to_cpu Rasmus Villemoes
2019-11-01 12:42   ` [PATCH v3 34/36] net: ethernet: freescale: make UCC_GETH explicitly depend on PPC32 Rasmus Villemoes
2019-11-01 12:42   ` [PATCH v3 35/36] net/wan: make FSL_UCC_HDLC " Rasmus Villemoes
2019-11-01 16:29     ` Christophe Leroy
2019-11-01 22:31       ` Leo Li
2019-11-04  8:38         ` Rasmus Villemoes
2019-11-04 20:56           ` Li Yang
2019-11-05 22:46             ` Rasmus Villemoes
2019-11-05 23:46               ` Li Yang
2019-11-05  6:16           ` Qiang Zhao
2019-11-06  7:56             ` Rasmus Villemoes
2019-11-01 12:42   ` [PATCH v3 36/36] soc: fsl: qe: remove PPC32 dependency from CONFIG_QUICC_ENGINE Rasmus Villemoes
2019-11-02 17:39     ` kbuild test robot
2019-11-14 23:26     ` kbuild test robot
2019-11-14 23:26     ` [RFC PATCH] soc: fsl: qe: qe_uart_set_mctrl() can be static kbuild test robot
2019-11-15 13:31     ` [PATCH v3 36/36] soc: fsl: qe: remove PPC32 dependency from CONFIG_QUICC_ENGINE kbuild test robot
2019-11-15 13:42       ` Rasmus Villemoes

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=5071118d-2008-7725-a6cd-ce14b49dfa20@c-s.fr \
    --to=christophe.leroy@c-s.fr \
    --cc=leoyang.li@nxp.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux@rasmusvillemoes.dk \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=oss@buserror.net \
    --cc=qiang.zhao@nxp.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).