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From: Prashant Gaikwad <pgaikwad@nvidia.com>
To: Laxman Dewangan <ldewangan@nvidia.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>,
	"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/4] ARM: tegra30: Add support for Uart clock source divider as 15.1
Date: Tue, 18 Dec 2012 12:37:43 +0530	[thread overview]
Message-ID: <50D0163F.3030806@nvidia.com> (raw)
In-Reply-To: <50D00C1D.9090100@nvidia.com>

On Tuesday 18 December 2012 11:54 AM, Laxman Dewangan wrote:
> On Tuesday 18 December 2012 11:44 AM, Prashant Gaikwad wrote:
>> On Tuesday 18 December 2012 03:13 AM, Stephen Warren wrote:
>>> On 12/17/2012 05:08 AM, Laxman Dewangan wrote:
>>>> Tegra20 uart clock source have the 15.1 clock divider in place of
>>> That says Tegra20, but ...
>>>
>>>> 7.1. Add support for 15.1 clock divider and change the uart clock divider
>>>> flag to DIV_U151.
>>>>     arch/arm/mach-tegra/clock.h               |    3 +-
>>>>     arch/arm/mach-tegra/tegra30_clocks.c      |   70 ++++++++++++++++++++++------
>>>>     arch/arm/mach-tegra/tegra30_clocks_data.c |   10 ++--
>>> ... the patch only modifies Tegra30. Do both Tegra20 and Tegra30 have
>>> this feature; should both clock drivers be updated?
>>>
>>> BTW, Prashant is reworking the Tegra clock support to be modular, rather
>>> than having a single monolithic "Tegra clock" type, and also moving the
>>> code to drivers/clk. This patch will conflict signifcantly with that.
>>> Please work with him to integrate this patch into his rework series,
>>> either before or after his changes, and have him include the patch when
>>> he posts his series. You'll also need to think about whether/how your
>>> and his series depend on each-other.
>>>
>>> ... but: Is this a pure bug-fix? If so, I guess this patch should be
>>> applied before Prashant's patches, and this patch also Cc: stable?
>> My clock driver rework includes this fix. Divider supports both DIVU71
>> and DIVU151.
>> UART divider is set to DIVU151.
> Prashant,
> I like to go this patch as first patch towards bug fixes rather than
> after moving the clock. The reason is that we will pull this change in
> our downstream and will be available in our K3.7 code.

Laxman,

We are not going to use ccf in our downstream kernel port to K3.7. How 
does that help pushing in upstream?

>
>


  reply	other threads:[~2012-12-18  7:07 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-12-17 12:08 [PATCH 0/4] ARM: tegra: add support for highspeed serial driver Laxman Dewangan
2012-12-17 12:08 ` [PATCH 1/4] ARM: tegra30: Add support for Uart clock source divider as 15.1 Laxman Dewangan
2012-12-17 21:43   ` Stephen Warren
2012-12-18  6:14     ` Prashant Gaikwad
2012-12-18  6:24       ` Laxman Dewangan
2012-12-18  7:07         ` Prashant Gaikwad [this message]
2012-12-18 13:05           ` Laxman Dewangan
2012-12-17 12:08 ` [PATCH 2/4] ARM: tegra: add connection name for uart clock table Laxman Dewangan
2012-12-17 21:44   ` Stephen Warren
2012-12-18  7:05     ` Laxman Dewangan
2012-12-18 16:55       ` Stephen Warren
2012-12-17 12:08 ` [PATCH 3/4] ARM: tegra: Add OF_DEV_AUXDATA for uart driver in board dt Laxman Dewangan
2012-12-17 21:47   ` Stephen Warren
2012-12-18  6:18     ` Prashant Gaikwad
2012-12-18  7:00       ` Laxman Dewangan
2012-12-17 12:08 ` [PATCH 4/4] ARM: tegra: dts: add dma requestor and port numbers for serial controller Laxman Dewangan

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