Re: [PATCH] x86: Add check for P5 to microcode_intel_early

From: "H. Peter Anvin" <hpa@zytor.com>
To: "Bryan O'Donoghue" <bryan.odonoghue.lkml@nexus-software.ie>
Cc: Borislav Petkov <bp@alien8.de>,
	linux-kernel@vger.kernel.org, x86@kernel.org,
	fenghua.yu@intel.com
Subject: Re: [PATCH] x86: Add check for P5 to microcode_intel_early
Date: Fri, 19 Apr 2013 15:02:50 -0700	[thread overview]
Message-ID: <5171BF0A.8010402@zytor.com> (raw)
In-Reply-To: <5171BAD6.4040003@nexus-software.ie>

On 04/19/2013 02:44 PM, Bryan O'Donoghue wrote:
> On 19/04/13 22:25, Borislav Petkov wrote:
>> On Fri, Apr 19, 2013 at 10:55:15PM +0200, Borislav Petkov wrote:
>>> Just filter out P5 and earlier. The code already does that for CPUs
>>> which don't have CPUID.
>>
>> Actually, an alternative - more practical albeit not very accurate
> 
> More practical ? Hmm - the MSRs don't exist for < P5

Yes, and that is definitional.

I like doing this check before boring down in the code too far, however,
I want to make it so that it is structurally clear that this is for
Intel; other CPU vendors might theoretically have other criteria.

Architecturally, I would prefer to do this check early in
load_ucode_intel_{bsp,ap}() but I would be okay with putting it in
load_ucode_bsp()/local_ucode_ap() as well as long as the test is
conditional on the Intel vendor check.

More importantly, though: I really would like to get a fix *today*.

	-hpa