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From: Brijesh Singh <brijesh.singh@amd.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	x86@kernel.org
Cc: brijesh.singh@amd.com, bp@alien8.de,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@redhat.com>,
	"H. Peter Anvin" <hpa@zytor.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	"Joerg Roedel" <joro@8bytes.org>, "Borislav Petkov" <bp@suse.de>,
	"Tom Lendacky" <thomas.lendacky@amd.com>,
	"Herbert Xu" <herbert@gondor.apana.org.au>,
	"David S . Miller" <davem@davemloft.net>,
	"Gary Hook" <gary.hook@amd.com>,
	linux-crypto@vger.kernel.org
Subject: Re: [Part2 PATCH v9 00/38] x86: Secure Encrypted Virtualization (AMD)
Date: Thu, 21 Dec 2017 09:51:14 -0600	[thread overview]
Message-ID: <51fe0851-14d7-cb37-613c-0eaf8a7d2a65@amd.com> (raw)
In-Reply-To: <f29a9a2a-b8b1-b8d8-1c1e-9ec5fcb2d0ca@redhat.com>



On 12/21/17 7:06 AM, Paolo Bonzini wrote:
....

Hi Paolo,
 

> Hi Brijesh,
>
> I have a couple comments:
>
> 1) how is MSR_AMD64_SEV's value passed to the guest, and where is it in
> the manual?

It is a non interceptable read-only MSR set by the HW when SEV feature
is enabled in VMRUN instruction.
>
> 2) ECX should be 0 in the guest's 0x8000_001f leaf, because we don't
> support nested SEV guests.  Likewise, EAX bit 2 should be 0 since you
> don't emulate the page flush MSR.

IIRC, I do clear both EAX Page_Flush and nested virtualization case from
Qemu SEV feature is enabled.
> Both can be fixed on top (and I can do the second myself of course), so
> there should be no need for a v10.  

Thanks

  reply	other threads:[~2017-12-21 15:51 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-05  1:04 [Part2 PATCH v9 00/38] x86: Secure Encrypted Virtualization (AMD) Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 01/38] Documentation/virtual/kvm: Add AMD Secure Encrypted Virtualization (SEV) Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 02/38] x86/CPU/AMD: Add the Secure Encrypted Virtualization CPU feature Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 03/38] kvm: svm: prepare for new bit definition in nested_ctl Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 04/38] kvm: svm: Add SEV feature definitions to KVM Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 05/38] KVM: SVM: Prepare to reserve asid for SEV guest Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 06/38] KVM: X86: Extend CPUID range to include new leaf Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 07/38] KVM: Introduce KVM_MEMORY_ENCRYPT_OP ioctl Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 08/38] KVM: Introduce KVM_MEMORY_ENCRYPT_{UN,}REG_REGION ioctl Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 09/38] crypto: ccp: Build the AMD secure processor driver only with AMD CPU support Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 10/38] crypto: ccp: Define SEV userspace ioctl and command id Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 11/38] crypto: ccp: Define SEV key management " Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 12/38] crypto: ccp: Add Platform Security Processor (PSP) device support Brijesh Singh
2017-12-06 21:10   ` Philippe Ombredanne
2017-12-07 20:21     ` Brijesh Singh
2017-12-07 21:20       ` Philippe Ombredanne
2017-12-05  1:04 ` [Part2 PATCH v9 13/38] crypto: ccp: Add Secure Encrypted Virtualization (SEV) command support Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 14/38] crypto: ccp: Implement SEV_FACTORY_RESET ioctl command Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 15/38] crypto: ccp: Implement SEV_PLATFORM_STATUS " Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 16/38] crypto: ccp: Implement SEV_PEK_GEN " Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 17/38] crypto: ccp: Implement SEV_PDH_GEN " Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 18/38] crypto: ccp: Implement SEV_PEK_CSR " Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 19/38] crypto: ccp: Implement SEV_PEK_CERT_IMPORT " Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 20/38] crypto: ccp: Implement SEV_PDH_CERT_EXPORT " Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 21/38] KVM: X86: Add CONFIG_KVM_AMD_SEV Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 22/38] KVM: SVM: Reserve ASID range for SEV guest Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 23/38] KVM: SVM: Add sev module_param Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 24/38] KVM: Define SEV key management command id Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 25/38] KVM: SVM: Add KVM_SEV_INIT command Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 26/38] KVM: SVM: VMRUN should use associated ASID when SEV is enabled Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 27/38] KVM: SVM: Add support for KVM_SEV_LAUNCH_START command Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 28/38] KVM: SVM: Add support for KVM_SEV_LAUNCH_UPDATE_DATA command Brijesh Singh
2017-12-05  1:04 ` [Part2 PATCH v9 29/38] KVM: SVM: Add support for KVM_SEV_LAUNCH_MEASURE command Brijesh Singh
2017-12-21 13:06 ` [Part2 PATCH v9 00/38] x86: Secure Encrypted Virtualization (AMD) Paolo Bonzini
2017-12-21 15:51   ` Brijesh Singh [this message]
2017-12-21 16:09     ` Brijesh Singh
2018-01-11 12:20 ` Paolo Bonzini

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