From: David Laight <David.Laight@ACULAB.COM>
To: 'Linus Torvalds' <torvalds@linux-foundation.org>,
Noah Goldstein <goldstein.w.n@gmail.com>
Cc: kernel test robot <lkp@intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"oe-kbuild-all@lists.linux.dev" <oe-kbuild-all@lists.linux.dev>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"edumazet@google.com" <edumazet@google.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"bp@alien8.de" <bp@alien8.de>,
"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
"hpa@zytor.com" <hpa@zytor.com>
Subject: RE: x86/csum: Remove unnecessary odd handling
Date: Fri, 5 Jan 2024 10:41:24 +0000 [thread overview]
Message-ID: <5354eeec562345f6a1de84f0b2081b75@AcuMS.aculab.com> (raw)
In-Reply-To: <CAHk-=wiNUucmvTKGmveWzXXe99SpOwU65nFtH-A2_aUpPsAPJQ@mail.gmail.com>
From: Linus Torvalds
> Sent: 05 January 2024 00:33
>
> On Thu, 4 Jan 2024 at 15:36, Linus Torvalds
> <torvalds@linux-foundation.org> wrote:
> >
> > Anyway, since I looked at the thing originally, and feel like I know
> > the x86 side and understand the strange IP csum too, I just applied it
> > directly.
>
> I ended up just applying my 40-byte cleanup thing too that I've been
> keeping in my own tree since posting it (as the "Silly csum
> improvement. Maybe" patch).
Interesting, I'm pretty sure trying to get two blocks of
'adc' scheduled in parallel like that doesn't work.
I got an adc every clock from this 'beast':
+ /*
+ * Align the byte count to a multiple of 16 then
+ * add 64 bit words to alternating registers.
+ * Finally reduce to 64 bits.
+ */
+ asm( " bt $4, %[len]\n"
+ " jnc 10f\n"
+ " add (%[buff], %[len]), %[sum_0]\n"
+ " adc 8(%[buff], %[len]), %[sum_1]\n"
+ " lea 16(%[len]), %[len]\n"
+ "10: jecxz 20f\n"
+ " adc (%[buff], %[len]), %[sum_0]\n"
+ " adc 8(%[buff], %[len]), %[sum_1]\n"
+ " lea 32(%[len]), %[len_tmp]\n"
+ " adc 16(%[buff], %[len]), %[sum_0]\n"
+ " adc 24(%[buff], %[len]), %[sum_1]\n"
+ " mov %[len_tmp], %[len]\n"
+ " jmp 10b\n"
+ "20: adc %[sum_0], %[sum]\n"
+ " adc %[sum_1], %[sum]\n"
+ " adc $0, %[sum]\n"
+ : [sum] "+&r" (sum), [sum_0] "+&r" (sum_0), [sum_1] "+&r" (sum_1),
+ [len] "+&c" (len), [len_tmp] "=&r" (len_tmp)
+ : [buff] "r" (buff)
+ : "memory" );
Followed by code to sort out and trailing 15 bytes.
Intel cpu (from P-II until Broadwell 5th-gen) take two clocks for 'adc'
(probably because it needs 3 inputs).
So 'adc' chains ran a lot slower than you might think.
(Clearly no one ever actually benchmarked the old code!)
The first fix made the carry output available early - so adding
to alternate registers helps. IIRC this is in Ivy/Sandy bridge.
Maybe no one cares about Ivy/Sandy bridge and Haswell any more.
AMD cpu don't have this problem.
I'm pretty sure I measured that loop with a misaligned buffer.
Measurably slower, but less than one clock per cache line.
I guess that the cache-line crossing reads get split, but you
gain most back because the cpu can do two reads/clock.
Maybe I'll sort out another patch...
I did get 15/16 bytes/clock with a similar loop that used adox/adcx
but that needed unrolling again and only works on a few cpu.
IIRC amd have some cpu that support adox - but execute it slowly!
Annoyingly you can't use 'loop' even on cpu that support adox
because it is stupidly slow on intel cpu (ok on amd).
That version is a lot of pain since it needs run-time patching.
David
-
Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)
next prev parent reply other threads:[~2024-01-05 10:41 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20230628020657.957880-1-goldstein.w.n@gmail.com>
2023-06-28 9:12 ` x86/csum: Remove unnecessary odd handling Borislav Petkov
2023-06-28 15:32 ` Noah Goldstein
2023-06-28 17:44 ` Linus Torvalds
2023-06-28 18:34 ` Noah Goldstein
2023-06-28 20:02 ` Linus Torvalds
2023-06-29 14:04 ` David Laight
2023-06-29 14:27 ` David Laight
2023-09-01 22:21 ` Noah Goldstein
2023-09-06 13:49 ` David Laight
2023-09-06 14:38 ` David Laight
2023-09-20 19:20 ` Noah Goldstein
2023-09-20 19:23 ` Noah Goldstein
2023-09-23 3:24 ` kernel test robot
2023-09-23 14:05 ` Noah Goldstein
2023-09-23 21:13 ` David Laight
2023-09-24 14:35 ` Noah Goldstein
2023-12-23 22:18 ` Noah Goldstein
2024-01-04 23:28 ` Noah Goldstein
2024-01-04 23:34 ` Dave Hansen
2024-01-04 23:36 ` Linus Torvalds
2024-01-05 0:33 ` Linus Torvalds
2024-01-05 10:41 ` David Laight [this message]
2024-01-05 16:12 ` David Laight
2024-01-05 18:05 ` Linus Torvalds
2024-01-05 23:52 ` David Laight
2024-01-06 0:18 ` Linus Torvalds
2024-01-06 10:26 ` Eric Dumazet
2024-01-06 19:32 ` Linus Torvalds
2024-01-07 12:11 ` David Laight
2024-01-06 22:08 ` David Laight
2024-01-07 1:09 ` H. Peter Anvin
2024-01-07 11:44 ` David Laight
2023-09-24 14:35 ` Noah Goldstein
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