* [PATCH v2] soc: qcom: llcc: Fix slice configuration values for SC8280XP
@ 2023-01-27 14:47 Abel Vesa
2023-01-27 14:49 ` Konrad Dybcio
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Abel Vesa @ 2023-01-27 14:47 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Sai Prakash Ranjan,
Johan Hovold
Cc: linux-arm-msm, Linux Kernel Mailing List
These new values are now based on the latest LLCC SC table.
Fixes: ec69dfbdc426 ("soc: qcom: llcc: Add sc8180x and sc8280xp configurations")
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
The v1 is here:
https://lore.kernel.org/all/20230126171636.2319496-1-abel.vesa@linaro.org/
Changes since v1:
* dropped the LLCC_GPU and LLCC_WRCACHE max_cap changes
* took the new values from documentatio this time rather than
downstream kernel
drivers/soc/qcom/llcc-qcom.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
index 23ce2f78c4ed..26efe12012a0 100644
--- a/drivers/soc/qcom/llcc-qcom.c
+++ b/drivers/soc/qcom/llcc-qcom.c
@@ -191,9 +191,9 @@ static const struct llcc_slice_config sc8280xp_data[] = {
{ LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
{ LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0, 0 },
{ LLCC_WRCACHE, 31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
- { LLCC_CVPFW, 32, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
- { LLCC_CPUSS1, 33, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
- { LLCC_CPUHWT, 36, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
+ { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
+ { LLCC_CPUSS1, 3, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
+ { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
};
static const struct llcc_slice_config sdm845_data[] = {
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2] soc: qcom: llcc: Fix slice configuration values for SC8280XP
2023-01-27 14:47 [PATCH v2] soc: qcom: llcc: Fix slice configuration values for SC8280XP Abel Vesa
@ 2023-01-27 14:49 ` Konrad Dybcio
2023-01-27 16:14 ` Sai Prakash Ranjan
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Konrad Dybcio @ 2023-01-27 14:49 UTC (permalink / raw)
To: Abel Vesa, Andy Gross, Bjorn Andersson, Sai Prakash Ranjan, Johan Hovold
Cc: linux-arm-msm, Linux Kernel Mailing List
On 27.01.2023 15:47, Abel Vesa wrote:
> These new values are now based on the latest LLCC SC table.
>
> Fixes: ec69dfbdc426 ("soc: qcom: llcc: Add sc8180x and sc8280xp configurations")
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
I can't verify this, but it looks sound so:
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
>
> The v1 is here:
> https://lore.kernel.org/all/20230126171636.2319496-1-abel.vesa@linaro.org/
>
> Changes since v1:
> * dropped the LLCC_GPU and LLCC_WRCACHE max_cap changes
> * took the new values from documentatio this time rather than
> downstream kernel
>
> drivers/soc/qcom/llcc-qcom.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
> index 23ce2f78c4ed..26efe12012a0 100644
> --- a/drivers/soc/qcom/llcc-qcom.c
> +++ b/drivers/soc/qcom/llcc-qcom.c
> @@ -191,9 +191,9 @@ static const struct llcc_slice_config sc8280xp_data[] = {
> { LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0, 0 },
> { LLCC_WRCACHE, 31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> - { LLCC_CVPFW, 32, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> - { LLCC_CPUSS1, 33, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> - { LLCC_CPUHWT, 36, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> + { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> + { LLCC_CPUSS1, 3, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> + { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> };
>
> static const struct llcc_slice_config sdm845_data[] = {
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] soc: qcom: llcc: Fix slice configuration values for SC8280XP
2023-01-27 14:47 [PATCH v2] soc: qcom: llcc: Fix slice configuration values for SC8280XP Abel Vesa
2023-01-27 14:49 ` Konrad Dybcio
@ 2023-01-27 16:14 ` Sai Prakash Ranjan
2023-01-31 8:24 ` Juerg Haefliger
2023-02-02 8:58 ` Johan Hovold
3 siblings, 0 replies; 5+ messages in thread
From: Sai Prakash Ranjan @ 2023-01-27 16:14 UTC (permalink / raw)
To: Abel Vesa, Andy Gross, Bjorn Andersson, Konrad Dybcio, Johan Hovold
Cc: linux-arm-msm, Linux Kernel Mailing List
On 1/27/2023 8:17 PM, Abel Vesa wrote:
> These new values are now based on the latest LLCC SC table.
>
> Fixes: ec69dfbdc426 ("soc: qcom: llcc: Add sc8180x and sc8280xp configurations")
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
>
> The v1 is here:
> https://lore.kernel.org/all/20230126171636.2319496-1-abel.vesa@linaro.org/
>
> Changes since v1:
> * dropped the LLCC_GPU and LLCC_WRCACHE max_cap changes
> * took the new values from documentatio this time rather than
> downstream kernel
>
> drivers/soc/qcom/llcc-qcom.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
> index 23ce2f78c4ed..26efe12012a0 100644
> --- a/drivers/soc/qcom/llcc-qcom.c
> +++ b/drivers/soc/qcom/llcc-qcom.c
> @@ -191,9 +191,9 @@ static const struct llcc_slice_config sc8280xp_data[] = {
> { LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0, 0 },
> { LLCC_WRCACHE, 31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> - { LLCC_CVPFW, 32, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> - { LLCC_CPUSS1, 33, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> - { LLCC_CPUHWT, 36, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> + { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> + { LLCC_CPUSS1, 3, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> + { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> };
>
> static const struct llcc_slice_config sdm845_data[] = {
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] soc: qcom: llcc: Fix slice configuration values for SC8280XP
2023-01-27 14:47 [PATCH v2] soc: qcom: llcc: Fix slice configuration values for SC8280XP Abel Vesa
2023-01-27 14:49 ` Konrad Dybcio
2023-01-27 16:14 ` Sai Prakash Ranjan
@ 2023-01-31 8:24 ` Juerg Haefliger
2023-02-02 8:58 ` Johan Hovold
3 siblings, 0 replies; 5+ messages in thread
From: Juerg Haefliger @ 2023-01-31 8:24 UTC (permalink / raw)
To: Abel Vesa
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Sai Prakash Ranjan,
Johan Hovold, linux-arm-msm, Linux Kernel Mailing List
[-- Attachment #1: Type: text/plain, Size: 3548 bytes --]
On Fri, 27 Jan 2023 16:47:24 +0200
Abel Vesa <abel.vesa@linaro.org> wrote:
> These new values are now based on the latest LLCC SC table.
>
> Fixes: ec69dfbdc426 ("soc: qcom: llcc: Add sc8180x and sc8280xp configurations")
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
>
> The v1 is here:
> https://lore.kernel.org/all/20230126171636.2319496-1-abel.vesa@linaro.org/
>
> Changes since v1:
> * dropped the LLCC_GPU and LLCC_WRCACHE max_cap changes
> * took the new values from documentatio this time rather than
> downstream kernel
>
> drivers/soc/qcom/llcc-qcom.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
> index 23ce2f78c4ed..26efe12012a0 100644
> --- a/drivers/soc/qcom/llcc-qcom.c
> +++ b/drivers/soc/qcom/llcc-qcom.c
> @@ -191,9 +191,9 @@ static const struct llcc_slice_config sc8280xp_data[] = {
> { LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0, 0 },
> { LLCC_WRCACHE, 31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> - { LLCC_CVPFW, 32, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> - { LLCC_CPUSS1, 33, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> - { LLCC_CPUHWT, 36, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> + { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> + { LLCC_CPUSS1, 3, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> + { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> };
Without this patch UBSAN reports multiple of the following on a Lenovo x13s:
[ 0.083079] ================================================================================
[ 0.083085] UBSAN: shift-out-of-bounds in /build/linux-laptop-0y97Sr/linux-laptop-6.2.0/drivers/soc/qcom/llcc-qcom.c:772:45
[ 0.083091] shift exponent 32 is too large for 32-bit type 'int'
[ 0.083096] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 6.2.0-1001-laptop #1-Ubuntu
[ 0.083100] Hardware name: LENOVO 4810QL0100/4810QL0100, BIOS N3HET75C (1.47 ) 11/01/2022
[ 0.083104] Call trace:
[ 0.083107] dump_backtrace+0x110/0x16c
[ 0.083115] show_stack+0x24/0x50
[ 0.083119] dump_stack_lvl+0x68/0x9c
[ 0.083124] dump_stack+0x1c/0x48
[ 0.083126] ubsan_epilogue+0x14/0x60
[ 0.083132] __ubsan_handle_shift_out_of_bounds+0xf0/0x1e0
[ 0.083139] _qcom_llcc_cfg_program+0x9c8/0xad4
[ 0.083145] qcom_llcc_probe+0x284/0x33c
[ 0.083149] platform_probe+0x74/0x110
[ 0.083155] really_probe+0xd8/0x430
[ 0.083158] __driver_probe_device+0x94/0x1e4
[ 0.083161] driver_probe_device+0x48/0x17c
[ 0.083164] __driver_attach+0x150/0x2cc
[ 0.083168] bus_for_each_dev+0x80/0x100
[ 0.083173] driver_attach+0x30/0x54
[ 0.083176] bus_add_driver+0x1d0/0x2a0
[ 0.083179] driver_register+0x84/0x184
[ 0.083183] __platform_driver_register+0x34/0x60
[ 0.083187] qcom_llcc_driver_init+0x2c/0x48
[ 0.083193] do_one_initcall+0x64/0x320
[ 0.083196] do_initcalls+0x188/0x1f8
[ 0.083201] kernel_init_freeable+0x170/0x1c0
[ 0.083205] kernel_init+0x3c/0x180
[ 0.083209] ret_from_fork+0x10/0x20
[ 0.083213] ================================================================================
They're all gone with this patch. From that perspective:
Tested-by: Juerg Haefliger <juerg.haefliger@canonical.com>
...Juerg
> static const struct llcc_slice_config sdm845_data[] = {
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] soc: qcom: llcc: Fix slice configuration values for SC8280XP
2023-01-27 14:47 [PATCH v2] soc: qcom: llcc: Fix slice configuration values for SC8280XP Abel Vesa
` (2 preceding siblings ...)
2023-01-31 8:24 ` Juerg Haefliger
@ 2023-02-02 8:58 ` Johan Hovold
3 siblings, 0 replies; 5+ messages in thread
From: Johan Hovold @ 2023-02-02 8:58 UTC (permalink / raw)
To: Abel Vesa
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Sai Prakash Ranjan,
linux-arm-msm, Linux Kernel Mailing List
On Fri, Jan 27, 2023 at 04:47:24PM +0200, Abel Vesa wrote:
> These new values are now based on the latest LLCC SC table.
Please expand expand the commit message with details on why this is
needed (e.g. for benefit of people less familiar with this driver that
need to determine whether this should be backported, etc).
You are also only fixing the three slice ids so please mention that
specifically.
> Fixes: ec69dfbdc426 ("soc: qcom: llcc: Add sc8180x and sc8280xp configurations")
After having looked at the code, it seems you're missing a CC stable
tag here.
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
>
> The v1 is here:
> https://lore.kernel.org/all/20230126171636.2319496-1-abel.vesa@linaro.org/
>
> Changes since v1:
> * dropped the LLCC_GPU and LLCC_WRCACHE max_cap changes
> * took the new values from documentatio this time rather than
> downstream kernel
>
> drivers/soc/qcom/llcc-qcom.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
> index 23ce2f78c4ed..26efe12012a0 100644
> --- a/drivers/soc/qcom/llcc-qcom.c
> +++ b/drivers/soc/qcom/llcc-qcom.c
> @@ -191,9 +191,9 @@ static const struct llcc_slice_config sc8280xp_data[] = {
> { LLCC_CVP, 28, 512, 3, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0x1, 1, 0, 0, 1, 0, 0 },
> { LLCC_WRCACHE, 31, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> - { LLCC_CVPFW, 32, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> - { LLCC_CPUSS1, 33, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> - { LLCC_CPUHWT, 36, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> + { LLCC_CVPFW, 17, 512, 1, 0, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> + { LLCC_CPUSS1, 3, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0 },
> + { LLCC_CPUHWT, 5, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 0, 1, 0 },
> };
>
> static const struct llcc_slice_config sdm845_data[] = {
Johan
^ permalink raw reply [flat|nested] 5+ messages in thread
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2023-01-27 14:47 [PATCH v2] soc: qcom: llcc: Fix slice configuration values for SC8280XP Abel Vesa
2023-01-27 14:49 ` Konrad Dybcio
2023-01-27 16:14 ` Sai Prakash Ranjan
2023-01-31 8:24 ` Juerg Haefliger
2023-02-02 8:58 ` Johan Hovold
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