Re: [PATCH 1/3] MIPS: R6: Use lightweight SYNC instruction in smp_* memory barriers

[David Daney <ddaney.cavm@gmail.com>]

On 06/02/2015 09:15 AM, Maciej W. Rozycki wrote:
> On Tue, 2 Jun 2015, James Hogan wrote:
>
>>> diff --git a/arch/mips/include/asm/barrier.h b/arch/mips/include/asm/barrier.h
>>> index 2b8bbbcb9be0..d2a63abfc7c6 100644
>>> --- a/arch/mips/include/asm/barrier.h
>>> +++ b/arch/mips/include/asm/barrier.h
>>> @@ -96,9 +96,15 @@
>>>   #  define smp_rmb()	barrier()
>>>   #  define smp_wmb()	__syncw()
>>>   # else
>>> +#  ifdef CONFIG_MIPS_LIGHTWEIGHT_SYNC
>>> +#  define smp_mb()      __asm__ __volatile__("sync 0x10" : : :"memory")
>>> +#  define smp_rmb()     __asm__ __volatile__("sync 0x13" : : :"memory")
>>> +#  define smp_wmb()     __asm__ __volatile__("sync 0x4" : : :"memory")
>>
>> binutils appears to support the sync_mb, sync_rmb, sync_wmb aliases
>> since version 2.21. Can we safely use them?
>
>   I suggest that we don't -- we still officially support binutils 2.12 and
> have other places where we even use `.word' to insert instructions current
> versions of binutils properly handle.  It may be worth noting in a comment
> though that these encodings correspond to these operations that you named.
>

Surely the other MIPSr6 instructions are not supported in binutils 2.12 
either.  So if it is for r6, why not require modern tools, and put 
something user readable in here?

David Daney