Re: [PATCH 1/3] MIPS: R6: Use lightweight SYNC instruction in smp_* memory barriers

From: "Maciej W. Rozycki" <macro@linux-mips.org>
To: James Hogan <james.hogan@imgtec.com>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>,
	linux-mips@linux-mips.org, benh@kernel.crashing.org,
	will.deacon@arm.com, linux-kernel@vger.kernel.org,
	Ralf Baechle <ralf@linux-mips.org>,
	markos.chandras@imgtec.com, Steven.Hill@imgtec.com,
	alexander.h.duyck@redhat.com,
	"David S. Miller" <davem@davemloft.net>
Subject: Re: [PATCH 1/3] MIPS: R6: Use lightweight SYNC instruction in smp_* memory barriers
Date: Tue, 2 Jun 2015 17:15:37 +0100 (BST)	[thread overview]
Message-ID: <alpine.LFD.2.11.1506021709420.6751@eddie.linux-mips.org> (raw)
In-Reply-To: <556D8A03.9080201@imgtec.com>

On Tue, 2 Jun 2015, James Hogan wrote:

> > diff --git a/arch/mips/include/asm/barrier.h b/arch/mips/include/asm/barrier.h
> > index 2b8bbbcb9be0..d2a63abfc7c6 100644
> > --- a/arch/mips/include/asm/barrier.h
> > +++ b/arch/mips/include/asm/barrier.h
> > @@ -96,9 +96,15 @@
> >  #  define smp_rmb()	barrier()
> >  #  define smp_wmb()	__syncw()
> >  # else
> > +#  ifdef CONFIG_MIPS_LIGHTWEIGHT_SYNC
> > +#  define smp_mb()      __asm__ __volatile__("sync 0x10" : : :"memory")
> > +#  define smp_rmb()     __asm__ __volatile__("sync 0x13" : : :"memory")
> > +#  define smp_wmb()     __asm__ __volatile__("sync 0x4" : : :"memory")
> 
> binutils appears to support the sync_mb, sync_rmb, sync_wmb aliases
> since version 2.21. Can we safely use them?

 I suggest that we don't -- we still officially support binutils 2.12 and 
have other places where we even use `.word' to insert instructions current 
versions of binutils properly handle.  It may be worth noting in a comment 
though that these encodings correspond to these operations that you named.

  Maciej