From: Marc Zyngier <marc.zyngier@arm.com>
To: Robert Richter <robert.richter@caviumnetworks.com>
Cc: Robert Richter <rric@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Tirumalesh Chalamarla <tchalamarla@cavium.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Will Deacon <will.deacon@arm.com>
Subject: Re: [PATCH v2 3/5] irqchip, gicv3: Workaround for Cavium ThunderX erratum 23154
Date: Thu, 13 Aug 2015 17:54:41 +0100 [thread overview]
Message-ID: <55CCCBD1.2090304@arm.com> (raw)
In-Reply-To: <20150813161741.GO1820@rric.localhost>
On 13/08/15 17:17, Robert Richter wrote:
> Marc,
>
> thanks for your quick review.
>
> On 13.08.15 16:11:15, Marc Zyngier wrote:
>> On 13/08/15 15:47, Robert Richter wrote:
>>> From: Robert Richter <rrichter@cavium.com>
>
>>> static const struct gic_capabilities gicv3_errata[] = {
>>> {
>>> + .desc = "GIC: Cavium erratum 23154",
>>> + .iidr = 0xa100034c, /* ThunderX pass 1.x */
>>> + .iidr_mask = 0xffff0fff,
>>> + .init = gicv3_enable_cavium_thunderx,
>>> + },
>>
>> I'm even more puzzled. You're working around a CPU bug based on the ITS
>> ID registers? Or have you swapped the detection methods for the two errata?
>
> :/ Right, I mixed this up... Must have starred on this for too long.
> Will fix that.
>
> Wrt midr: Originally this was written to support iidr. I wanted to
> keep the version check in the driver of the hw, an implementation
> outside of drivers/irqchip looked not appropriate here as it would
> rely then on arch arm64 only. This is the main reason. Apart from
> that, I think an implmentation based on struct arm64_cpu_capabilities,
> etc. would require much rework compared to my current easy
> implementation, e.g:
>
> * binding flags to callbacks and actually run them,
>
> * handing over private driver data (base addr for iidr detection) to
> a capabilty's match function.
>
> Overall this looked bloated. Now, that the MIDR also needs to be
> checked, it looked better to me to keep the gic hw detection at a
> single location in the driver. This also allows us to check a
> combination of midr and iidr values.
>
> I hope this sounds reasonable?
+Will.
The point I was trying to make is that a CPU interface bug is a CPU bug,
and that it feels quite weird weird to have the detection in the GIC.
Will, what do you think?
Also, I don't really buy the combined MIDR/GITS_IIDR detection. These
are two *very* distinct pieces of HW that are not even directly
connected (the redistributors are in between).
I wouldn't mind having something like:
struct gic_capabilities {
const char *desc;
void (*init)(void *data);
u32 iidr;
u32 iidr_mask;
int feature;
};
where "feature" is a one of things declared in cpufeature.h, and that
would condition the capability (I love the name!) if that really
happens. I don't think we're there yet.
As for the complexity of implementation, testing a flag in the probe
function and tingling a static key is not really a big deal.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2015-08-13 16:54 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-13 14:47 [PATCH v2 0/5] irqchip, gicv3: Updates and Cavium ThunderX errata workarounds Robert Richter
2015-08-13 14:47 ` [PATCH v2 1/5] arm64: gicv3: its: Add range check for number of allocated pages Robert Richter
2015-08-13 14:47 ` [PATCH v2 2/5] irqchip, gicv3: Add HW revision detection and configuration Robert Richter
2015-08-13 15:06 ` Marc Zyngier
2015-08-13 14:47 ` [PATCH v2 3/5] irqchip, gicv3: Workaround for Cavium ThunderX erratum 23154 Robert Richter
2015-08-13 15:11 ` Marc Zyngier
2015-08-13 16:17 ` Robert Richter
2015-08-13 16:54 ` Marc Zyngier [this message]
2015-08-13 17:11 ` Robert Richter
2015-08-14 8:28 ` Marc Zyngier
2015-08-14 11:47 ` Robert Richter
2015-08-13 14:47 ` [PATCH v2 4/5] irqchip, gicv3-its: Read typer register outside the loop Robert Richter
2015-08-13 14:47 ` [PATCH v2 5/5] irqchip, gicv3-its: Workaround for Cavium ThunderX errata 22375, 24313 Robert Richter
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