From: Ray Jui <rjui@broadcom.com>
To: Jisheng Zhang <jszhang@marvell.com>, <bhelgaas@google.com>,
<thierry.reding@gmail.com>, <swarren@wwwdotorg.org>,
<gnurou@gmail.com>, <tinamdar@apm.com>, <sbranden@broadcom.com>,
<linux@arm.linux.org.uk>
Cc: <linux-tegra@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<bcm-kernel-feedback-list@broadcom.com>
Subject: Re: [RFC PATCH 1/3] PCI: iproc: generate proper configuration access cycles
Date: Mon, 26 Oct 2015 10:18:14 -0700 [thread overview]
Message-ID: <562E6056.3040203@broadcom.com> (raw)
In-Reply-To: <1445857334-6936-2-git-send-email-jszhang@marvell.com>
Hi Jisheng,
On 10/26/2015 4:02 AM, Jisheng Zhang wrote:
> Inspired by Russell King's patch[1], I found current iproc also has the
> same issue of "reading 32-bits from the command register, modifying the
> command register, and then writing it back has the effect of clearing
> any status bits that were indicating at that time" as pointed out by
> Russell. This patch fix this issue by using the pci_generic_config_write.
>
> [1]http://www.spinics.net/lists/linux-pci/msg44869.html
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> ---
> drivers/pci/host/pcie-iproc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pci/host/pcie-iproc.c b/drivers/pci/host/pcie-iproc.c
> index fe2efb1..0c423f2 100644
> --- a/drivers/pci/host/pcie-iproc.c
> +++ b/drivers/pci/host/pcie-iproc.c
> @@ -111,7 +111,7 @@ static void __iomem *iproc_pcie_map_cfg_bus(struct pci_bus *bus,
> static struct pci_ops iproc_pcie_ops = {
> .map_bus = iproc_pcie_map_cfg_bus,
> .read = pci_generic_config_read32,
> - .write = pci_generic_config_write32,
> + .write = pci_generic_config_write,
> };
>
> static void iproc_pcie_reset(struct iproc_pcie *pcie)
>
I have already confirmed with the ASIC team that the current iProc PCIe
controller requires 32-bit aligned access into the configuration space
due to the way how it was integrated into various iProc SoCs including
NSP, Cygnus, and NS2.
This change will prevent the driver from working properly.
I've informed our ASIC team about this issue and all future iProc based
SoCs should be able to support 8-bit, 16-bit access and therefore
pci_generic_config_write/read can be used for those SoCs.
Thanks,
Ray
next prev parent reply other threads:[~2015-10-26 17:18 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-26 11:02 [RFC PATCH 0/3] PCI: generate proper configuration access cycles Jisheng Zhang
2015-10-26 11:02 ` [RFC PATCH 1/3] PCI: iproc: " Jisheng Zhang
2015-10-26 17:18 ` Ray Jui [this message]
2015-10-27 2:18 ` Jisheng Zhang
2015-10-30 23:21 ` Arnd Bergmann
2015-10-26 11:02 ` [RFC PATCH 2/3] PCI: tegra: " Jisheng Zhang
2015-10-26 11:02 ` [RFC PATCH 3/3] PCI: xgene: " Jisheng Zhang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=562E6056.3040203@broadcom.com \
--to=rjui@broadcom.com \
--cc=bcm-kernel-feedback-list@broadcom.com \
--cc=bhelgaas@google.com \
--cc=gnurou@gmail.com \
--cc=jszhang@marvell.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=linux@arm.linux.org.uk \
--cc=sbranden@broadcom.com \
--cc=swarren@wwwdotorg.org \
--cc=thierry.reding@gmail.com \
--cc=tinamdar@apm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).