From: "majun (F)" <majun258@huawei.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: <Catalin.Marinas@arm.com>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <Will.Deacon@arm.com>,
<marc.zyngier@arm.com>, <jason@lakedaemon.net>,
<tglx@linutronix.de>, <lizefan@huawei.com>, <huxinwei@huawei.com>,
<dingtianhong@huawei.com>, <zhaojunhua@hisilicon.com>,
<liguozhu@hisilicon.com>, <xuwei5@hisilicon.com>,
<wei.chenwei@hisilicon.com>, <guohanjun@huawei.com>,
<wuyun.wu@huawei.com>, <guodong.xu@linaro.org>,
<haojian.zhuang@linaro.org>, <zhangfei.gao@linaro.org>,
<usman.ahmad@linaro.org>, <klimov.linux@gmail.com>,
<gabriele.paoloni@huawei.com>
Subject: Re: [PATCH v10 1/4] dt-binding:Documents of the mbigen bindings
Date: Fri, 18 Dec 2015 09:58:20 +0800 [thread overview]
Message-ID: <5673683C.2080304@huawei.com> (raw)
In-Reply-To: <20151217135247.GD13389@leverpostej>
Hi Mark:
在 2015/12/17 21:52, Mark Rutland 写道:
> On Thu, Dec 17, 2015 at 07:56:34PM +0800, MaJun wrote:
>> From: Ma Jun <majun258@huawei.com>
[...]
>> +- compatible: Should be "hisilicon,mbigen-v2"
>> +
>> +- reg: Specifies the base physical address and size of the Mbigen
>> + registers.
>> +
>> +- interrupt controller: Identifies the node as an interrupt controller
>> +
>> +- msi-parent: Specifies the MSI controller this mbigen use.
>> + For more detail information,please refer to the generic msi-parent binding in
>> + Documentation/devicetree/bindings/interrupt-controller/msi.txt.
>> +
>> +- num-msis:Specifies the total number of interrupt this device has.
>
> Is this the number of pins implemented? Or the number of pins that are
> in use?
>
> The latter feels like something we can derive.
num-msis means the total number of pins implemented.
>
>> +- #interrupt-cells : Specifies the number of cells needed to encode an
>> + interrupt source. The value must be 2.
>> +
>> + The 1st cell is hardware pin number of the interrupt.This number is local to
>> + each mbigen chip and in the range from 0 to the maximum interrupts number
>> + of the mbigen.
>
> Just to check: 0 - 63 represent the "reserved" pins, yes?
Yes, you are right.
>
> Other than those questions, this looks good to me.
Do i need to post a new patch to update these two questions?
Thanks!
MaJun
>
> Thanks,
> Mark.
>
>> +
>> + The 2nd cell is the interrupt trigger type.
>> + The value of this cell should be:
>> + 1: rising edge triggered
>> + or
>> + 4: high level triggered
>> +
>> +Examples:
>> +
>> + mbigen_device_gmac:intc {
>> + compatible = "hisilicon,mbigen-v2";
>> + reg = <0x0 0xc0080000 0x0 0x10000>;
>> + interrupt-controller;
>> + msi-parent = <&its_dsa 0x40b1c>;
>> + num-msis = <9>;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> +Devices connect to mbigen required properties:
>> +----------------------------------------------------
>> +-interrupt-parent: Specifies the mbigen device node which device connected.
>> +
>> +-interrupts:Specifies the interrupt source.
>> + For the specific information of each cell in this property,please refer to
>> + the "interrupt-cells" description mentioned above.
>> +
>> +Examples:
>> + gmac0: ethernet@c2080000 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0 0xc2080000 0 0x20000>,
>> + <0 0xc0000000 0 0x1000>;
>> + interrupt-parent = <&mbigen_device_gmac>;
>> + interrupts = <656 1>,
>> + <657 1>;
>> + };
>> +
>> --
>> 1.7.1
>>
>>
>
> .
>
next prev parent reply other threads:[~2015-12-18 1:58 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-17 11:56 [PATCH v10 0/4] irqchip:support mbigen interrupt controller MaJun
2015-12-17 11:56 ` [PATCH v10 1/4] dt-binding:Documents of the mbigen bindings MaJun
2015-12-17 13:52 ` Mark Rutland
2015-12-18 1:58 ` majun (F) [this message]
2015-12-18 10:58 ` Mark Rutland
2015-12-18 11:26 ` Marc Zyngier
2015-12-18 11:35 ` Marc Zyngier
2015-12-18 11:54 ` Mark Rutland
2015-12-17 11:56 ` [PATCH v10 2/4] irqchip: add platform device driver for mbigen device MaJun
2015-12-17 11:56 ` [PATCH v10 3/4] irqchip:create irq domain for each " MaJun
2015-12-17 16:02 ` Marc Zyngier
2015-12-18 11:02 ` Mark Rutland
2015-12-18 11:27 ` Marc Zyngier
2015-12-17 11:56 ` [PATCH v10 4/4] irqchip:implement the mbigen irq chip operation functions MaJun
2015-12-17 16:03 ` Marc Zyngier
2015-12-17 16:06 ` [PATCH v10 0/4] irqchip:support mbigen interrupt controller Marc Zyngier
2015-12-18 11:58 ` Marc Zyngier
2015-12-18 12:27 ` Hanjun Guo
2015-12-18 14:03 ` majun
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