From: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: <tony.luck@intel.com>, <hpa@zytor.com>, <mingo@redhat.com>,
<tglx@linutronix.de>, <dougthompson@xmission.com>,
<mchehab@osg.samsung.com>, <x86@kernel.org>,
<linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<ashok.raj@intel.com>, <gong.chen@linux.intel.com>,
<len.brown@intel.com>, <peterz@infradead.org>,
<ak@linux.intel.com>, <alexander.shishkin@linux.intel.com>
Subject: Re: [PATCH 2/4] x86/mce/AMD: Fix logic to obtain block address
Date: Tue, 23 Feb 2016 16:56:38 -0600 [thread overview]
Message-ID: <56CCE3A6.3020406@amd.com> (raw)
In-Reply-To: <20160223123907.GD3673@pd.tnic>
On 2/23/16 6:39 AM, Borislav Petkov wrote:
> On Tue, Feb 16, 2016 at 03:45:09PM -0600, Aravind Gopalakrishnan wrote:
>>
>> /* 'SMCA': AMD64 Scalable MCA */
>> +#define MSR_AMD64_SMCA_MC0_MISC0 0xc0002003
>> #define MSR_AMD64_SMCA_MC0_CONFIG 0xc0002004
>> #define MSR_AMD64_SMCA_MC0_IPID 0xc0002005
>> +#define MSR_AMD64_SMCA_MC0_MISC1 0xc000200a
>> +#define MSR_AMD64_SMCA_MCx_MISC(x) (MSR_AMD64_SMCA_MC0_MISC0 + 0x10*(x))
>> #define MSR_AMD64_SMCA_MCx_CONFIG(x) (MSR_AMD64_SMCA_MC0_CONFIG + 0x10*(x))
>> #define MSR_AMD64_SMCA_MCx_IPID(x) (MSR_AMD64_SMCA_MC0_IPID + 0x10*(x))
>> +#define MSR_AMD64_SMCA_MCx_MISCy(x, y) ((MSR_AMD64_SMCA_MC0_MISC1 + y) + (0x10*(x)))
> Are those MSRs going to be used in multiple files? If not, they should
> all go to mce.h.
I think MSR_AMD64_SMCA_MC0_MISC0 would be required in mce.c as well.
So might be better to retain it here.
MSR_AMD64_SMCA_MC0_MISC1 might be required only in mce_amd.c, So, I'll
move it to mce.h
>
>>
>>
>> +static u32 get_block_address(u32 current_addr,
>> + u32 low,
>> + u32 high,
>> + unsigned int bank,
>> + unsigned int block)
> Use arg formatting like the rest of functions in the file please.
Will fix.
>> + u32 smca_low, smca_high;
> s/smca_//
Will fix.
>
>> +
>> + if (rdmsr_safe(MSR_AMD64_SMCA_MCx_CONFIG(bank),
>> + &smca_low, &smca_high) ||
>> + !(smca_low & MCI_CONFIG_MCAX))
>> + goto nextaddr_out;
>> +
>> + if (!rdmsr_safe(MSR_AMD64_SMCA_MCx_MISC(bank),
>> + &smca_low, &smca_high) &&
>> + (smca_low & MASK_BLKPTR_LO))
>> + addr = MSR_AMD64_SMCA_MCx_MISCy(bank,
>> + block - 1);
> unnecessary line break.
>
Will fix it like so-
addr = MSR_AMD64_SMCA_MCx_MISCy(bank, block - 1);
(It comes up to 81 chars, but will ignore checkpatch in this case..)
Thanks,
-Aravind.
next prev parent reply other threads:[~2016-02-23 22:56 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-16 21:45 [PATCH 0/4] Updates to EDAC and AMD MCE driver Aravind Gopalakrishnan
2016-02-16 21:45 ` [PATCH 1/4] EDAC, MCE, AMD: Enable error decoding of Scalable MCA errors Aravind Gopalakrishnan
2016-02-23 12:37 ` Borislav Petkov
2016-02-23 22:50 ` Aravind Gopalakrishnan
2016-02-24 11:28 ` Borislav Petkov
2016-02-24 17:57 ` Aravind Gopalakrishnan
2016-02-16 21:45 ` [PATCH 2/4] x86/mce/AMD: Fix logic to obtain block address Aravind Gopalakrishnan
2016-02-18 15:38 ` Aravind Gopalakrishnan
2016-02-23 12:39 ` Borislav Petkov
2016-02-23 22:56 ` Aravind Gopalakrishnan [this message]
2016-02-24 11:33 ` Borislav Petkov
2016-02-24 18:02 ` Aravind Gopalakrishnan
2016-02-24 20:15 ` Boris Petkov
2016-02-16 21:45 ` [PATCH 3/4] x86/mce: Clarify comments regarding deferred error Aravind Gopalakrishnan
2016-02-23 12:11 ` Borislav Petkov
2016-02-23 23:02 ` Aravind Gopalakrishnan
2016-02-24 11:37 ` Borislav Petkov
2016-02-24 18:06 ` Aravind Gopalakrishnan
2016-02-24 20:13 ` Boris Petkov
2016-02-16 21:45 ` [PATCH 4/4] x86/mce/AMD: Add comments for easier understanding Aravind Gopalakrishnan
2016-02-23 12:35 ` Borislav Petkov
2016-02-24 18:26 ` Aravind Gopalakrishnan
2016-02-26 17:44 ` Borislav Petkov
2016-02-26 19:08 ` Aravind Gopalakrishnan
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