From: Krzysztof Kozlowski <k.kozlowski@samsung.com>
To: Matthew Leach <matthew@mattleach.net>,
Ben Dooks <ben.dooks@codethink.co.uk>
Cc: linux-samsung-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <marc.zyngier@arm.com>,
Kukjin Kim <kgene@kernel.org>
Subject: Re: [RFC PATCH 04/15] irqchip: exynos_combiner: fixup reg access on be
Date: Fri, 10 Jun 2016 13:44:40 +0200 [thread overview]
Message-ID: <575AA828.3070805@samsung.com> (raw)
In-Reply-To: <20160608183110.13851-5-matthew@mattleach.net>
On 06/08/2016 08:30 PM, Matthew Leach wrote:
> Use the byte-order aware big endian accessors, allowing for kernels
> running under big-endian.
>
> Signed-off-by: Matthew Leach <matthew@mattleach.net>
> ---
> CC: Thomas Gleixner <tglx@linutronix.de>
> CC: Jason Cooper <jason@lakedaemon.net>
> CC: Marc Zyngier <marc.zyngier@arm.com>
> CC: Kukjin Kim <kgene@kernel.org>
> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> CC: linux-kernel@vger.kernel.org
> CC: linux-arm-kernel@lists.infradead.org
> CC: linux-samsung-soc@vger.kernel.org
> ---
> drivers/irqchip/exynos-combiner.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/irqchip/exynos-combiner.c b/drivers/irqchip/exynos-combiner.c
> index ead15be..b78a169 100644
> --- a/drivers/irqchip/exynos-combiner.c
> +++ b/drivers/irqchip/exynos-combiner.c
> @@ -55,14 +55,14 @@ static void combiner_mask_irq(struct irq_data *data)
> {
> u32 mask = 1 << (data->hwirq % 32);
>
> - __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
> + writel_relaxed(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR);
> }
>
> static void combiner_unmask_irq(struct irq_data *data)
> {
> u32 mask = 1 << (data->hwirq % 32);
>
> - __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET);
> + writel_relaxed(mask, combiner_base(data) + COMBINER_ENABLE_SET);
> }
>
> static void combiner_handle_cascade_irq(struct irq_desc *desc)
> @@ -75,7 +75,7 @@ static void combiner_handle_cascade_irq(struct irq_desc *desc)
> chained_irq_enter(chip, desc);
>
> spin_lock(&irq_controller_lock);
> - status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
> + status = readl_relaxed(chip_data->base + COMBINER_INT_STATUS);
> spin_unlock(&irq_controller_lock);
> status &= chip_data->irq_mask;
>
> @@ -135,7 +135,7 @@ static void __init combiner_init_one(struct combiner_chip_data *combiner_data,
> combiner_data->parent_irq = irq;
>
> /* Disable all interrupts */
> - __raw_writel(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR);
> + writel_relaxed(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR);
> }
>
> static int combiner_irq_domain_xlate(struct irq_domain *d,
> @@ -218,7 +218,7 @@ static int combiner_suspend(void)
>
> for (i = 0; i < max_nr; i++)
> combiner_data[i].pm_save =
> - __raw_readl(combiner_data[i].base + COMBINER_ENABLE_SET);
> + readl_relaxed(combiner_data[i].base + COMBINER_ENABLE_SET);
>
> return 0;
> }
> @@ -235,9 +235,9 @@ static void combiner_resume(void)
> int i;
>
> for (i = 0; i < max_nr; i++) {
> - __raw_writel(combiner_data[i].irq_mask,
> + writel_relaxed(combiner_data[i].irq_mask,
> combiner_data[i].base + COMBINER_ENABLE_CLEAR);
> - __raw_writel(combiner_data[i].pm_save,
> + writel_relaxed(combiner_data[i].pm_save,
> combiner_data[i].base + COMBINER_ENABLE_SET);
Indentation of arguments is broken. I think it was aligned before.
Beside that:
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Best regards,
Krzysztof
next prev parent reply other threads:[~2016-06-10 11:44 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-08 18:30 [RFC PATCH 00/15] Exynos big-endian fixes Matthew Leach
2016-06-08 18:30 ` [RFC PATCH 01/15] clock: exynos: fixup endian in pll clk Matthew Leach
2016-06-10 9:51 ` Sylwester Nawrocki
2016-06-08 18:30 ` [RFC PATCH 02/15] clocksource: samsung_pwm_timer: fix endian accessors Matthew Leach
2016-06-10 11:43 ` Krzysztof Kozlowski
2016-06-16 13:23 ` Daniel Lezcano
2016-06-08 18:30 ` [RFC PATCH 03/15] clk: samsung: exynos4: fixup reg access on be Matthew Leach
2016-06-10 9:51 ` Sylwester Nawrocki
2016-06-08 18:30 ` [RFC PATCH 04/15] irqchip: exynos_combiner: " Matthew Leach
2016-06-10 11:44 ` Krzysztof Kozlowski [this message]
2016-06-08 18:31 ` [RFC PATCH 05/15] tty: serial: samsung: fixup accessors for endian Matthew Leach
2016-06-09 8:12 ` Ben Dooks
2016-06-10 10:13 ` Ben Dooks
2016-06-10 11:47 ` Krzysztof Kozlowski
2016-06-08 18:31 ` [RFC PATCH 06/15] tty: serial: samsung: add byte-order aware bit functions Matthew Leach
2016-06-10 12:17 ` Krzysztof Kozlowski
2016-06-08 18:31 ` [RFC PATCH 07/15] ARM: exynos: fixup debug macros for big-endian Matthew Leach
2016-06-10 11:12 ` Ben Dooks
2016-06-10 11:16 ` Krzysztof Kozlowski
2016-06-10 12:44 ` Ben Dooks
2016-06-10 13:02 ` Ben Dooks
2016-06-10 13:04 ` Krzysztof Kozlowski
2016-06-08 18:31 ` [RFC PATCH 08/15] ARM: samsung: fixup endian issues in cpu detection Matthew Leach
2016-06-08 18:31 ` [RFC PATCH 09/15] ARM: EXYNOS: fixups for big-endian operation Matthew Leach
2016-06-08 18:31 ` [RFC PATCH 10/15] ARM: EXYNOS: fixup endian in pm/pmu Matthew Leach
2016-06-08 18:31 ` [RFC PATCH 11/15] ARM: EXYNOS: Enable ARCH_SUPPORTS_BIG_ENDIAN explicitly Matthew Leach
2016-06-08 18:31 ` [RFC PATCH 12/15] irqchip/s3c24xx: fixup IO accessors for big endian Matthew Leach
2016-06-17 8:56 ` Krzysztof Kozlowski
2016-06-08 18:31 ` [RFC PATCH 13/15] memory: samsung: endian fixes for IO Matthew Leach
2016-06-17 8:59 ` Krzysztof Kozlowski
2016-06-08 18:31 ` [RFC PATCH 14/15] hwrng: exynos - fixup IO accesors Matthew Leach
2016-06-08 18:31 ` [RFC PATCH 15/15] iommu/exynos: update to use iommu big-endian Matthew Leach
2016-06-09 6:51 ` Marek Szyprowski
2016-06-09 8:14 ` Ben Dooks
2016-06-21 9:59 ` Joerg Roedel
2016-06-09 8:09 ` [RFC PATCH 00/15] Exynos big-endian fixes Ben Dooks
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