From: Thor Thayer <tthayer@opensource.altera.com>
To: Rob Herring <robh@kernel.org>
Cc: <bp@alien8.de>, <dougthompson@xmission.com>,
<m.chehab@samsung.com>, <pawel.moll@arm.com>,
<mark.rutland@arm.com>, <ijc+devicetree@hellion.org.uk>,
<galak@codeaurora.org>, <linux@arm.linux.org.uk>,
<dinguyen@opensource.altera.com>, <grant.likely@linaro.org>,
<devicetree@vger.kernel.org>, <linux-doc@vger.kernel.org>,
<linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <tthayer.linux@gmail.com>
Subject: Re: [PATCHv4 4/7] Documentation: dt: socfpga: Add Arria10 Ethernet binding
Date: Tue, 21 Jun 2016 09:46:40 -0500 [thread overview]
Message-ID: <57695350.3050404@opensource.altera.com> (raw)
In-Reply-To: <20160621133340.GA9073@rob-hp-laptop>
Hi Rob,
On 06/21/2016 08:33 AM, Rob Herring wrote:
> On Mon, Jun 20, 2016 at 09:50:49AM -0500, tthayer@opensource.altera.com wrote:
>> From: Thor Thayer <tthayer@opensource.altera.com>
>>
>> Add the device tree bindings needed to support the Altera Ethernet
>> FIFO buffers on the Arria10 chip.
>>
>> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
>> ---
>> v2 No Change
>> v3 Change to common compatible string based on maintainer comments
>> Add local IRQ values.
>> v4 Add compatible string for parent node.
>> ---
>> .../bindings/arm/altera/socfpga-eccmgr.txt | 24 ++++++++++++++++++++
>> 1 file changed, 24 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>> index 15eb0df..7c714ba 100644
>> --- a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>> @@ -82,6 +82,14 @@ Required Properties:
>> - interrupts : Should be single bit error interrupt, then double bit error
>> interrupt, in this order.
>>
>> +Ethernet FIFO ECC
>> +Required Properties:
>> +- compatible : Should be "altr,socfpga-eth-mac-ecc"
>> +- reg : Address and size for ECC block registers.
>> +- parent : phandle to parent (altr,socfpga-stmmac) Ethernet node.
>
> Sorry if I wasn't clear before, but I was suggesting changing 'parent'
> to 'altr,ethernet-mac':
>
> altr,ethernet-mac = <&gmac0>;
>
> Rob
>
Ahh, I see what you're saying.
I used parent as the tag because I have a generic function for
validating that the parent status is "okay" using the "parent" string in
my validate_parent_available() function (see below).
I will be submitting other peripheral FIFOs with EDAC protection in
future patches (USB, DMA, etc).
static int validate_parent_available(struct device_node *np)
{
struct device_node *parent;
int ret = 0;
/* Ensure parent device is enabled if parent node exists */
parent = of_parse_phandle(np, "parent", 0);
if (parent && !of_device_is_available(parent))
ret = -ENODEV;
of_node_put(parent);
return ret;
}
I can change this to using a passed in data string but the code won't be
as straightforward.
Thanks for reviewing,
Thor
next prev parent reply other threads:[~2016-06-21 14:43 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-20 14:50 [PATCHv4 0/7] Add Ethernet EDAC & peripheral init functions tthayer
2016-06-20 14:50 ` [PATCHv4 1/7] EDAC, altera: Add panic flag check to A10 IRQ tthayer
2016-06-20 14:50 ` [PATCHv4 2/7] EDAC, altera: Make all private data structures static const tthayer
2016-06-20 14:50 ` [PATCHv4 3/7] EDAC, altera: Share Arria10 check_deps & IRQ functions tthayer
2016-06-20 14:50 ` [PATCHv4 4/7] Documentation: dt: socfpga: Add Arria10 Ethernet binding tthayer
2016-06-21 13:33 ` Rob Herring
2016-06-21 14:46 ` Thor Thayer [this message]
2016-06-21 15:48 ` Rob Herring
2016-06-21 15:57 ` Thor Thayer
2016-06-20 14:50 ` [PATCHv4 5/7] EDAC, altera: Add Arria10 ECC memory init functions tthayer
2016-06-20 14:50 ` [PATCHv4 6/7] EDAC, altera: Add Arria10 Ethernet EDAC support tthayer
2016-06-20 14:50 ` [PATCHv4 7/7] ARM: dts: Add Arria10 Ethernet EDAC devicetree entry tthayer
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