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From: "Natarajan, Janakarajan" <Janakarajan.Natarajan@amd.com>
To: Ingo Molnar <mingo@kernel.org>
Cc: <linux-kernel@vger.kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	"Suravee Suthikulpanit" <suravee.suthikulpanit@amd.com>
Subject: Re: [PATCH] Support for perf on AMD family17h processors
Date: Thu, 17 Nov 2016 09:50:25 -0600	[thread overview]
Message-ID: <5c1909c9-6132-68b8-8e7e-c2d32f215c09@amd.com> (raw)
In-Reply-To: <20161117064625.GA3760@gmail.com>


On 11/17/2016 12:46 AM, Ingo Molnar wrote:
> * Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> wrote:
>
>> This patch enables perf core PMU support for AMD family17h processors. In
>> family17h, there is no PMC-event constraint. All events, irrespective of the
>> type, can be measured using any of the performance counters.
> BTW., that's a very nice hardware design that simplifies counter constraints and
> scheduling!
>
> Does Fam17h have 6 generic counters per core, like Fam15h?
Yes. Fam17h has 6 generic core counters.
>
> Thanks,
>
> 	Ingo

      reply	other threads:[~2016-11-17 17:25 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-16 17:01 [PATCH] Support for perf on AMD family17h processors Janakarajan Natarajan
2016-11-16 17:30 ` Peter Zijlstra
2016-11-16 20:41   ` Natarajan, Janakarajan
2016-11-16 18:47 ` Borislav Petkov
2016-11-16 20:49   ` Natarajan, Janakarajan
2016-11-17  6:46 ` Ingo Molnar
2016-11-17 15:50   ` Natarajan, Janakarajan [this message]

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