[PATCH 0/7] arm64: dts: sc7180: Make dtbs_check mostly happy

[PATCH 0/7] arm64: dts: sc7180: Make dtbs_check mostly happy

[Douglas Anderson]

This gets rid of all of the dtbs_check that showed up atop the current
qcom maintainer tree for sc7180-idp, except the errors in the
'thermal-sensor' nodes.  I believe those are known / being dealt with
separately [1] [2].

I don't expect this series to have any functional changes, it just
makes the device tree cleaner.  I was able to boot after applying
these patches atop a working tree.

I have tried to sort the changes here, first including the "obviously
correct" changes and later changes I am less certain about.  There are
no known dependencies between the changes.

[1] https://lore.kernel.org/r/CAD=FV=UXC3UT78vGBr9rRuRxz=8iwH4tOkFx6NC-pSs+Z5+7Xw@mail.gmail.com
[2] https://lore.kernel.org/r/CAD=FV=UtHebABCpJo1QUc6C2v2iZq2rFL+pTMx=EHBL+7d=jTQ@mail.gmail.com


Douglas Anderson (7):
  arm64: dts: qcom: sc7180: Add SoC name to compatible
  arm64: dts: qcom: sc7180: Rename gic-its node to msi-controller
  arm64: dts: qcom: sc7180: Add "#clock-cells" property to usb_1_ssphy
  arm64: dts: qcom: pm6150: Remove macro from unit name of adc-chan
  arm64: dts: qcom: sc7180: Avoid "memory" for cmd-db reserved-memory
    node
  arm64: dts: qcom: sc7180: Avoid "phy" for USB QMP PHY wrapper
  arm64: dts: qcom: sc7180: Use 'ranges' in arm,armv7-timer-mem node

 arch/arm64/boot/dts/qcom/pm6150.dtsi    |  2 +-
 arch/arm64/boot/dts/qcom/sc7180-idp.dts |  2 +-
 arch/arm64/boot/dts/qcom/sc7180.dtsi    | 45 +++++++++++++------------
 3 files changed, 25 insertions(+), 24 deletions(-)

-- 
2.24.1.735.g03f4e72817-goog

[PATCH 1/7] arm64: dts: qcom: sc7180: Add SoC name to compatible

[Douglas Anderson]

Running `make dtbs_check` yells because qcom.yaml says that we should
have:

- items:
    - enum:
        - qcom,sc7180-idp
    - const: qcom,sc7180

...but we're missing "qcom,sc7180".  Add it.

Fixes: 90db71e48070 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---

 arch/arm64/boot/dts/qcom/sc7180-idp.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
index f582c9dcc9aa..388f50ad4fde 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts
+++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
@@ -14,7 +14,7 @@
 
 / {
 	model = "Qualcomm Technologies, Inc. SC7180 IDP";
-	compatible = "qcom,sc7180-idp";
+	compatible = "qcom,sc7180-idp", "qcom,sc7180";
 
 	aliases {
 		hsuart0 = &uart3;
-- 
2.24.1.735.g03f4e72817-goog

Re: [PATCH 1/7] arm64: dts: qcom: sc7180: Add SoC name to compatible

[Stephen Boyd]

Quoting Douglas Anderson (2019-12-12 11:35:37)
> Running `make dtbs_check` yells because qcom.yaml says that we should
> have:
> 
> - items:
>     - enum:
>         - qcom,sc7180-idp
>     - const: qcom,sc7180
> 
> ...but we're missing "qcom,sc7180".  Add it.
> 
> Fixes: 90db71e48070 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---

Reviewed-by: Stephen Boyd <swboyd@chromium.org>

[PATCH 2/7] arm64: dts: qcom: sc7180: Rename gic-its node to msi-controller

[Douglas Anderson]

Running `make dtbs_check` yells:

  arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: interrupt-controller@17a00000: gic-its@17a40000: False schema

From "arm,gic-v3.yaml" we can grok that this is explained by the
comment "msi-controller is preferred".  Switch to the preferred name
so that dtbs_check stops yelling.

Fixes: 90db71e48070 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---

 arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 01bbb58ae516..1b2bb0b9c9e8 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -1189,7 +1189,7 @@ intc: interrupt-controller@17a00000 {
 			      <0 0x17a60000 0 0x100000>;    /* GICR * 8 */
 			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 
-			gic-its@17a40000 {
+			msi-controller@17a40000 {
 				compatible = "arm,gic-v3-its";
 				msi-controller;
 				#msi-cells = <1>;
-- 
2.24.1.735.g03f4e72817-goog

Re: [PATCH 2/7] arm64: dts: qcom: sc7180: Rename gic-its node to msi-controller

[Stephen Boyd]

Quoting Douglas Anderson (2019-12-12 11:35:38)
> Running `make dtbs_check` yells:
> 
>   arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: interrupt-controller@17a00000: gic-its@17a40000: False schema
> 
> From "arm,gic-v3.yaml" we can grok that this is explained by the
> comment "msi-controller is preferred".  Switch to the preferred name
> so that dtbs_check stops yelling.
> 
> Fixes: 90db71e48070 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---

This problem is also in sdm845 and probably others.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>

Re: [PATCH 2/7] arm64: dts: qcom: sc7180: Rename gic-its node to msi-controller

[Doug Anderson]

Hi,

On Thu, Dec 12, 2019 at 1:56 PM Stephen Boyd <swboyd@chromium.org> wrote:
>
> Quoting Douglas Anderson (2019-12-12 11:35:38)
> > Running `make dtbs_check` yells:
> >
> >   arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: interrupt-controller@17a00000: gic-its@17a40000: False schema
> >
> > From "arm,gic-v3.yaml" we can grok that this is explained by the
> > comment "msi-controller is preferred".  Switch to the preferred name
> > so that dtbs_check stops yelling.
> >
> > Fixes: 90db71e48070 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
> > Signed-off-by: Douglas Anderson <dianders@chromium.org>
> > ---
>
> This problem is also in sdm845 and probably others.

Patch to fix sdm845 is at:

https://lore.kernel.org/r/20191216222021.1.I684f124a05a1c3f0b113c8d06d5f9da5d69b801e@changeid

That was the only instance I could find from a grep of arm64/qcom.

-Doug

[PATCH 3/7] arm64: dts: qcom: sc7180: Add "#clock-cells" property to usb_1_ssphy

[Douglas Anderson]

Running "dtbs_check" yells:
  '#clock-cells' is a dependency of 'clock-output-names'

...and sure enough the bindings say we should have "#clock-cells".
Add it.

Fixes: 0b766e7fe5a2 ("arm64: dts: qcom: sc7180: Add USB related nodes")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---

 arch/arm64/boot/dts/qcom/sc7180.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 1b2bb0b9c9e8..d114feade8e7 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -1020,6 +1020,7 @@ usb_1_ssphy: lanes@88e9200 {
 				      <0 0x088e9600 0 0x128>,
 				      <0 0x088e9800 0 0x200>,
 				      <0 0x088e9a00 0 0x18>;
+				#clock-cells = <0>;
 				#phy-cells = <0>;
 				clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
 				clock-names = "pipe0";
-- 
2.24.1.735.g03f4e72817-goog

Re: [PATCH 3/7] arm64: dts: qcom: sc7180: Add "#clock-cells" property to usb_1_ssphy

[Stephen Boyd]

Quoting Douglas Anderson (2019-12-12 11:35:39)
> Running "dtbs_check" yells:
>   '#clock-cells' is a dependency of 'clock-output-names'
> 
> ...and sure enough the bindings say we should have "#clock-cells".
> Add it.
> 
> Fixes: 0b766e7fe5a2 ("arm64: dts: qcom: sc7180: Add USB related nodes")
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---

Good catch!

Reviewed-by: Stephen Boyd <swboyd@chromium.org>

[PATCH 4/7] arm64: dts: qcom: pm6150: Remove macro from unit name of adc-chan

[Douglas Anderson]

This is just like commit e77cc85ee390 ("arm64: dts: qcom: sdm845:
remove macro from unit name").  It fixes the error in 'make
dtbs_check':

arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: adc@3100: 'adc-chan@0x06' does not match any of the regexes: ...

Fixes: a727ec1232d9 ("arm64: dts: qcom: pm6150: Add PM6150/PM6150L PMIC peripherals")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---

 arch/arm64/boot/dts/qcom/pm6150.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/pm6150.dtsi b/arch/arm64/boot/dts/qcom/pm6150.dtsi
index 1fcbc7a1e062..23534639f455 100644
--- a/arch/arm64/boot/dts/qcom/pm6150.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm6150.dtsi
@@ -46,7 +46,7 @@ pm6150_adc: adc@3100 {
 			#size-cells = <0>;
 			#io-channel-cells = <1>;
 
-			adc-chan@ADC5_DIE_TEMP {
+			adc-chan@6 {
 				reg = <ADC5_DIE_TEMP>;
 				label = "die_temp";
 			};
-- 
2.24.1.735.g03f4e72817-goog

Re: [PATCH 4/7] arm64: dts: qcom: pm6150: Remove macro from unit name of adc-chan

[Stephen Boyd]

Quoting Douglas Anderson (2019-12-12 11:35:40)
> This is just like commit e77cc85ee390 ("arm64: dts: qcom: sdm845:
> remove macro from unit name").  It fixes the error in 'make
> dtbs_check':
> 
> arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: adc@3100: 'adc-chan@0x06' does not match any of the regexes: ...
> 
> Fixes: a727ec1232d9 ("arm64: dts: qcom: pm6150: Add PM6150/PM6150L PMIC peripherals")
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---

Reviewed-by: Stephen Boyd <swboyd@chromium.org>

[PATCH 5/7] arm64: dts: qcom: sc7180: Avoid "memory" for cmd-db reserved-memory node

[Douglas Anderson]

By using "memory" we trigger we trigger the "schemas/memory.yaml"
rules when we run "dtbs_check" which then complains that we don't have
a "device_type" of "memory".

Looking at the "reserved-memory.txt" bindings, subnodes shouldn't just
be the word "memory".  Presumably using just "cmd-db" should be OK for
a node name.

Fixes: e0abc5eb526e ("arm64: dts: qcom: sc7180: Add cmd_db reserved area")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---

 arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index d114feade8e7..9766867abc88 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -61,7 +61,7 @@ reserved_memory: reserved-memory {
 		#size-cells = <2>;
 		ranges;
 
-		aop_cmd_db_mem: memory@80820000 {
+		aop_cmd_db_mem: cmd-db@80820000 {
 			reg = <0x0 0x80820000 0x0 0x20000>;
 			compatible = "qcom,cmd-db";
 			no-map;
-- 
2.24.1.735.g03f4e72817-goog

Re: [PATCH 5/7] arm64: dts: qcom: sc7180: Avoid "memory" for cmd-db reserved-memory node

[Stephen Boyd]

Quoting Douglas Anderson (2019-12-12 11:35:41)
> By using "memory" we trigger we trigger the "schemas/memory.yaml"
> rules when we run "dtbs_check" which then complains that we don't have
> a "device_type" of "memory".
> 
> Looking at the "reserved-memory.txt" bindings, subnodes shouldn't just
> be the word "memory".  Presumably using just "cmd-db" should be OK for
> a node name.
> 
> Fixes: e0abc5eb526e ("arm64: dts: qcom: sc7180: Add cmd_db reserved area")
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---

Reviewed-by: Stephen Boyd <swboyd@chromium.org>

Re: [PATCH 5/7] arm64: dts: qcom: sc7180: Avoid "memory" for cmd-db reserved-memory node

[Bjorn Andersson]

On Thu 12 Dec 11:35 PST 2019, Douglas Anderson wrote:

> By using "memory" we trigger we trigger the "schemas/memory.yaml"
> rules when we run "dtbs_check" which then complains that we don't have
> a "device_type" of "memory".
> 

I like "memory" here, so we have a whole bunch of these to fix up in
various dts files...

@Rob, should we move away to descriptive node names or to some other
generic name for entries in reseved-memory?

Regards,
Bjorn

> Looking at the "reserved-memory.txt" bindings, subnodes shouldn't just
> be the word "memory".  Presumably using just "cmd-db" should be OK for
> a node name.
> 
> Fixes: e0abc5eb526e ("arm64: dts: qcom: sc7180: Add cmd_db reserved area")
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---
> 
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index d114feade8e7..9766867abc88 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -61,7 +61,7 @@ reserved_memory: reserved-memory {
>  		#size-cells = <2>;
>  		ranges;
>  
> -		aop_cmd_db_mem: memory@80820000 {
> +		aop_cmd_db_mem: cmd-db@80820000 {
>  			reg = <0x0 0x80820000 0x0 0x20000>;
>  			compatible = "qcom,cmd-db";
>  			no-map;
> -- 
> 2.24.1.735.g03f4e72817-goog
> 

[PATCH 6/7] arm64: dts: qcom: sc7180: Avoid "phy" for USB QMP PHY wrapper

[Douglas Anderson]

The bindings for the QMP PHY are truly strange.  I believe (?) that
they may have originated because with PCIe each lane is treated as a
different PHY and the same PHY driver is used for a whole bunch of
things (incluidng PCIe).

In any case, now that we have "make dtbs_check", we find that having
the outer node named "phy" triggers the
"schemas/phy/phy-provider.yaml" schema, yelling about:

  phy@88e9000: '#phy-cells' is a required property

Let's call the outer node the "phy-wrapper" and the inner node the
"phy" to make dtbs_check happy.

Fixes: 0b766e7fe5a2 ("arm64: dts: qcom: sc7180: Add USB related nodes")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---

 arch/arm64/boot/dts/qcom/sc7180.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 9766867abc88..c671f0719d42 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -992,7 +992,7 @@ usb_1_hsphy: phy@88e3000 {
 			nvmem-cells = <&qusb2p_hstx_trim>;
 		};
 
-		usb_1_qmpphy: phy@88e9000 {
+		usb_1_qmpphy: phy-wrapper@88e9000 {
 			compatible = "qcom,sc7180-qmp-usb3-phy";
 			reg = <0 0x088e9000 0 0x18c>,
 			      <0 0x088e8000 0 0x38>;
@@ -1013,7 +1013,7 @@ usb_1_qmpphy: phy@88e9000 {
 				 <&gcc GCC_USB3_PHY_PRIM_BCR>;
 			reset-names = "phy", "common";
 
-			usb_1_ssphy: lanes@88e9200 {
+			usb_1_ssphy: phy@88e9200 {
 				reg = <0 0x088e9200 0 0x128>,
 				      <0 0x088e9400 0 0x200>,
 				      <0 0x088e9c00 0 0x218>,
-- 
2.24.1.735.g03f4e72817-goog

Re: [PATCH 6/7] arm64: dts: qcom: sc7180: Avoid "phy" for USB QMP PHY wrapper

[Stephen Boyd]

Quoting Douglas Anderson (2019-12-12 11:35:42)
> The bindings for the QMP PHY are truly strange.  I believe (?) that
> they may have originated because with PCIe each lane is treated as a
> different PHY and the same PHY driver is used for a whole bunch of
> things (incluidng PCIe).
> 
> In any case, now that we have "make dtbs_check", we find that having
> the outer node named "phy" triggers the
> "schemas/phy/phy-provider.yaml" schema, yelling about:
> 
>   phy@88e9000: '#phy-cells' is a required property
> 
> Let's call the outer node the "phy-wrapper" and the inner node the
> "phy" to make dtbs_check happy.
> 
> Fixes: 0b766e7fe5a2 ("arm64: dts: qcom: sc7180: Add USB related nodes")
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---

Reviewed-by: Stephen Boyd <swboyd@chromium.org>

Would be good to add phy-wrapper to possible node names in the DT spec
too.

[PATCH 7/7] arm64: dts: qcom: sc7180: Use 'ranges' in arm,armv7-timer-mem node

[Douglas Anderson]

Running `make dtbs_check` yells:

  arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: timer@17c20000: #size-cells:0:0: 1 was expected

It appears that someone was trying to assert the fact that sub-nodes
describing frames would never have a size that's more than 32-bits
big.  That's certainly true in the case of sc7180.

I guess this is a hint that it's time to do the thing that nobody
seems to do but that "writing-bindings.txt" says we should all do.
Specifically it says: "DO use non-empty 'ranges' to limit the size of
child buses/devices".  That means we should probably limit the

I believe that this patch is the way to do it and there should be no
bad side effects here.  I believe that since we're far enough down
(not trying to describe an actual device, just some sub-pieces) that
this won't cause us to run into the problems that caused us to
increase the soc-level #address-cells and #size-cells to 2 in sdm845
in commit bede7d2dc8f3 ("arm64: dts: qcom: sdm845: Increase address
and size cells for soc").

I can at least confirm that "arch_mem_timer" seems to keep getting
interrupts in "/proc/interrupts" after this change.

Fixes: 90db71e48070 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---

 arch/arm64/boot/dts/qcom/sc7180.dtsi | 36 ++++++++++++++--------------
 1 file changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index c671f0719d42..336cf65bdcc2 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -1206,59 +1206,59 @@ watchdog@17c10000 {
 		};
 
 		timer@17c20000{
-			#address-cells = <2>;
-			#size-cells = <2>;
-			ranges;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0 0x17c21000 0x10000>;
 			compatible = "arm,armv7-timer-mem";
 			reg = <0 0x17c20000 0 0x1000>;
 
-			frame@17c21000 {
+			frame@0 {
 				frame-number = <0>;
 				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
 					     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0 0x17c21000 0 0x1000>,
-				      <0 0x17c22000 0 0x1000>;
+				reg = <0x0000 0x1000>,
+				      <0x1000 0x1000>;
 			};
 
-			frame@17c23000 {
+			frame@2000 {
 				frame-number = <1>;
 				interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0 0x17c23000 0 0x1000>;
+				reg = <0x2000 0x1000>;
 				status = "disabled";
 			};
 
-			frame@17c25000 {
+			frame@4000 {
 				frame-number = <2>;
 				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0 0x17c25000 0 0x1000>;
+				reg = <0x4000 0x1000>;
 				status = "disabled";
 			};
 
-			frame@17c27000 {
+			frame@6000 {
 				frame-number = <3>;
 				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0 0x17c27000 0 0x1000>;
+				reg = <0x6000 0x1000>;
 				status = "disabled";
 			};
 
-			frame@17c29000 {
+			frame@8000 {
 				frame-number = <4>;
 				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0 0x17c29000 0 0x1000>;
+				reg = <0x8000 0x1000>;
 				status = "disabled";
 			};
 
-			frame@17c2b000 {
+			frame@a000 {
 				frame-number = <5>;
 				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0 0x17c2b000 0 0x1000>;
+				reg = <0xa000 0x1000>;
 				status = "disabled";
 			};
 
-			frame@17c2d000 {
+			frame@c000 {
 				frame-number = <6>;
 				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
-				reg = <0 0x17c2d000 0 0x1000>;
+				reg = <0xc000 0x1000>;
 				status = "disabled";
 			};
 		};
-- 
2.24.1.735.g03f4e72817-goog

Re: [PATCH 7/7] arm64: dts: qcom: sc7180: Use 'ranges' in arm,armv7-timer-mem node

[Stephen Boyd]

Quoting Douglas Anderson (2019-12-12 11:35:43)
> Running `make dtbs_check` yells:
> 
>   arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: timer@17c20000: #size-cells:0:0: 1 was expected
> 
> It appears that someone was trying to assert the fact that sub-nodes
> describing frames would never have a size that's more than 32-bits
> big.  That's certainly true in the case of sc7180.
> 
> I guess this is a hint that it's time to do the thing that nobody
> seems to do but that "writing-bindings.txt" says we should all do.
> Specifically it says: "DO use non-empty 'ranges' to limit the size of
> child buses/devices".  That means we should probably limit the

It got cut off here. I'm waiting to find out what it is!!

> 
> I believe that this patch is the way to do it and there should be no
> bad side effects here.  I believe that since we're far enough down
> (not trying to describe an actual device, just some sub-pieces) that
> this won't cause us to run into the problems that caused us to
> increase the soc-level #address-cells and #size-cells to 2 in sdm845
> in commit bede7d2dc8f3 ("arm64: dts: qcom: sdm845: Increase address
> and size cells for soc").
> 
> I can at least confirm that "arch_mem_timer" seems to keep getting
> interrupts in "/proc/interrupts" after this change.
> 
> Fixes: 90db71e48070 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---

This pattern exists in most of the qcom dts files. Can you fix all the
arm,armv7-timer-mem nodes. Maybe the binding has the same problem too in
the example.

> 
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 36 ++++++++++++++--------------
>  1 file changed, 18 insertions(+), 18 deletions(-)
> 

Re: [PATCH 7/7] arm64: dts: qcom: sc7180: Use 'ranges' in arm,armv7-timer-mem node

[Doug Anderson]

Hi,

On Thu, Dec 12, 2019 at 1:55 PM Stephen Boyd <swboyd@chromium.org> wrote:
>
> Quoting Douglas Anderson (2019-12-12 11:35:43)
> > Running `make dtbs_check` yells:
> >
> >   arch/arm64/boot/dts/qcom/sc7180-idp.dt.yaml: timer@17c20000: #size-cells:0:0: 1 was expected
> >
> > It appears that someone was trying to assert the fact that sub-nodes
> > describing frames would never have a size that's more than 32-bits
> > big.  That's certainly true in the case of sc7180.
> >
> > I guess this is a hint that it's time to do the thing that nobody
> > seems to do but that "writing-bindings.txt" says we should all do.
> > Specifically it says: "DO use non-empty 'ranges' to limit the size of
> > child buses/devices".  That means we should probably limit the
>
> It got cut off here. I'm waiting to find out what it is!!

I was going to say that I should use ranges to limit the address cells
in addition to the size cells, but then I think I must have got
distracted and forgot to finish my


> > I believe that this patch is the way to do it and there should be no
> > bad side effects here.  I believe that since we're far enough down
> > (not trying to describe an actual device, just some sub-pieces) that
> > this won't cause us to run into the problems that caused us to
> > increase the soc-level #address-cells and #size-cells to 2 in sdm845
> > in commit bede7d2dc8f3 ("arm64: dts: qcom: sdm845: Increase address
> > and size cells for soc").
> >
> > I can at least confirm that "arch_mem_timer" seems to keep getting
> > interrupts in "/proc/interrupts" after this change.
> >
> > Fixes: 90db71e48070 ("arm64: dts: sc7180: Add minimal dts/dtsi files for SC7180 soc")
> > Signed-off-by: Douglas Anderson <dianders@chromium.org>
> > ---
>
> This pattern exists in most of the qcom dts files. Can you fix all the
> arm,armv7-timer-mem nodes. Maybe the binding has the same problem too in
> the example.

Yeah.  I'm a little scared to go and do this for every qcom device
tree file since I have no good way to test them, but I suppose I can
give it a shot.  I was kinda thinking that, in general, it would make
sense for folks to tackle one SoC at a time and make that SoC clean
and test it.

In any case, your idea about updating the example seemed wise to me,
so I sent out:

https://lore.kernel.org/r/20191216220512.1.I7dbd712cfe0bdf7b53d9ef9791072b7e9c6d3c33@changeid

I'll put this patch on hold until Rob gives his thoughts on that one
so we can really make sure we're supposed to be using ranges in this
way.

-Doug

Re: [PATCH 0/7] arm64: dts: sc7180: Make dtbs_check mostly happy

[Bjorn Andersson]

On Thu 12 Dec 11:35 PST 2019, Douglas Anderson wrote:

> This gets rid of all of the dtbs_check that showed up atop the current
> qcom maintainer tree for sc7180-idp, except the errors in the
> 'thermal-sensor' nodes.  I believe those are known / being dealt with
> separately [1] [2].
> 
> I don't expect this series to have any functional changes, it just
> makes the device tree cleaner.  I was able to boot after applying
> these patches atop a working tree.
> 
> I have tried to sort the changes here, first including the "obviously
> correct" changes and later changes I am less certain about.  There are
> no known dependencies between the changes.
> 
> [1] https://lore.kernel.org/r/CAD=FV=UXC3UT78vGBr9rRuRxz=8iwH4tOkFx6NC-pSs+Z5+7Xw@mail.gmail.com
> [2] https://lore.kernel.org/r/CAD=FV=UtHebABCpJo1QUc6C2v2iZq2rFL+pTMx=EHBL+7d=jTQ@mail.gmail.com
> 

I applied patch 1-4 and 6. Would like to hear from Rob on patch 5 and
waiting for you to finish up the commit message in patch 7.

Thanks,
Bjorn

> 
> Douglas Anderson (7):
>   arm64: dts: qcom: sc7180: Add SoC name to compatible
>   arm64: dts: qcom: sc7180: Rename gic-its node to msi-controller
>   arm64: dts: qcom: sc7180: Add "#clock-cells" property to usb_1_ssphy
>   arm64: dts: qcom: pm6150: Remove macro from unit name of adc-chan
>   arm64: dts: qcom: sc7180: Avoid "memory" for cmd-db reserved-memory
>     node
>   arm64: dts: qcom: sc7180: Avoid "phy" for USB QMP PHY wrapper
>   arm64: dts: qcom: sc7180: Use 'ranges' in arm,armv7-timer-mem node
> 
>  arch/arm64/boot/dts/qcom/pm6150.dtsi    |  2 +-
>  arch/arm64/boot/dts/qcom/sc7180-idp.dts |  2 +-
>  arch/arm64/boot/dts/qcom/sc7180.dtsi    | 45 +++++++++++++------------
>  3 files changed, 25 insertions(+), 24 deletions(-)
> 
> -- 
> 2.24.1.735.g03f4e72817-goog
> 

Re: [PATCH 0/7] arm64: dts: sc7180: Make dtbs_check mostly happy

[Rajendra Nayak]

On 12/13/2019 1:05 AM, Douglas Anderson wrote:
> This gets rid of all of the dtbs_check that showed up atop the current
> qcom maintainer tree for sc7180-idp, except the errors in the
> 'thermal-sensor' nodes.  I believe those are known / being dealt with
> separately [1] [2].
> 
> I don't expect this series to have any functional changes, it just
> makes the device tree cleaner.  I was able to boot after applying
> these patches atop a working tree.
> 
> I have tried to sort the changes here, first including the "obviously
> correct" changes and later changes I am less certain about.  There are
> no known dependencies between the changes.

Thanks Doug for these cleanups, for the series

Reviewed-by: Rajendra Nayak <rnayak@codeaurora.org>

> 
> [1] https://lore.kernel.org/r/CAD=FV=UXC3UT78vGBr9rRuRxz=8iwH4tOkFx6NC-pSs+Z5+7Xw@mail.gmail.com
> [2] https://lore.kernel.org/r/CAD=FV=UtHebABCpJo1QUc6C2v2iZq2rFL+pTMx=EHBL+7d=jTQ@mail.gmail.com
> 
> 
> Douglas Anderson (7):
>    arm64: dts: qcom: sc7180: Add SoC name to compatible
>    arm64: dts: qcom: sc7180: Rename gic-its node to msi-controller
>    arm64: dts: qcom: sc7180: Add "#clock-cells" property to usb_1_ssphy
>    arm64: dts: qcom: pm6150: Remove macro from unit name of adc-chan
>    arm64: dts: qcom: sc7180: Avoid "memory" for cmd-db reserved-memory
>      node
>    arm64: dts: qcom: sc7180: Avoid "phy" for USB QMP PHY wrapper
>    arm64: dts: qcom: sc7180: Use 'ranges' in arm,armv7-timer-mem node
> 
>   arch/arm64/boot/dts/qcom/pm6150.dtsi    |  2 +-
>   arch/arm64/boot/dts/qcom/sc7180-idp.dts |  2 +-
>   arch/arm64/boot/dts/qcom/sc7180.dtsi    | 45 +++++++++++++------------
>   3 files changed, 25 insertions(+), 24 deletions(-)
> 

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