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From: "Ramuthevar, Vadivel MuruganX"  <vadivel.muruganx.ramuthevar@linux.intel.com>
To: Rob Herring <robh@kernel.org>
Cc: broonie@kernel.org, vigneshr@ti.com, tudor.ambarus@microchip.com,
	linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
	devicetree@vger.kernel.org, miquel.raynal@bootlin.com,
	simon.k.r.goldschmidt@gmail.com, dinguyen@kernel.org,
	richard@nod.at, cheol.yong.kim@intel.com, qi-ming.wu@intel.com
Subject: Re: [PATCH v6 5/6] dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml
Date: Mon, 9 Nov 2020 09:40:25 +0800	[thread overview]
Message-ID: <617f70de-634a-253d-1b52-06f45ceca96a@linux.intel.com> (raw)
In-Reply-To: <20201104220241.GA4192737@bogus>

Hi Rob,

On 5/11/2020 6:02 am, Rob Herring wrote:
> On Mon, Nov 02, 2020 at 01:59:41PM +0800, Ramuthevar, Vadivel MuruganX wrote:
>> Hi Rob,
>>
>> Thank you for the review comments...
>>
>> On 30/10/2020 11:18 pm, Rob Herring wrote:
>>> On Fri, Oct 30, 2020 at 01:31:52PM +0800, Ramuthevar,Vadivel MuruganX wrote:
>>>> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>>>>
>>>> Convert the cadence-quadspi.txt documentation to cadence-quadspi.yaml
>>>> remove the cadence-quadspi.txt from Documentation/devicetree/bindings/spi/
>>>>
>>>> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
>>>> ---
>>>>    .../devicetree/bindings/spi/cadence-quadspi.txt    |  67 ---------
>>>>    .../devicetree/bindings/spi/cadence-quadspi.yaml   | 149 +++++++++++++++++++++
>>>>    2 files changed, 149 insertions(+), 67 deletions(-)
>>>>    delete mode 100644 Documentation/devicetree/bindings/spi/cadence-quadspi.txt
>>>>    create mode 100644 Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.txt b/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
>>>> deleted file mode 100644
>>>> index 945be7d5b236..000000000000
>>>> --- a/Documentation/devicetree/bindings/spi/cadence-quadspi.txt
>>>> +++ /dev/null
>>>> @@ -1,67 +0,0 @@
>>>> -* Cadence Quad SPI controller
>>>> -
>>>> -Required properties:
>>>> -- compatible : should be one of the following:
>>>> -	Generic default - "cdns,qspi-nor".
>>>> -	For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
>>>> -	For TI AM654 SoC  - "ti,am654-ospi", "cdns,qspi-nor".
>>>> -- reg : Contains two entries, each of which is a tuple consisting of a
>>>> -	physical address and length. The first entry is the address and
>>>> -	length of the controller register set. The second entry is the
>>>> -	address and length of the QSPI Controller data area.
>>>> -- interrupts : Unit interrupt specifier for the controller interrupt.
>>>> -- clocks : phandle to the Quad SPI clock.
>>>> -- cdns,fifo-depth : Size of the data FIFO in words.
>>>> -- cdns,fifo-width : Bus width of the data FIFO in bytes.
>>>> -- cdns,trigger-address : 32-bit indirect AHB trigger address.
>>>> -
>>>> -Optional properties:
>>>> -- cdns,is-decoded-cs : Flag to indicate whether decoder is used or not.
>>>> -- cdns,rclk-en : Flag to indicate that QSPI return clock is used to latch
>>>> -  the read data rather than the QSPI clock. Make sure that QSPI return
>>>> -  clock is populated on the board before using this property.
>>>> -
>>>> -Optional subnodes:
>>>> -Subnodes of the Cadence Quad SPI controller are spi slave nodes with additional
>>>> -custom properties:
>>>> -- cdns,read-delay : Delay for read capture logic, in clock cycles
>>>> -- cdns,tshsl-ns : Delay in nanoseconds for the length that the master
>>>> -                  mode chip select outputs are de-asserted between
>>>> -		  transactions.
>>>> -- cdns,tsd2d-ns : Delay in nanoseconds between one chip select being
>>>> -                  de-activated and the activation of another.
>>>> -- cdns,tchsh-ns : Delay in nanoseconds between last bit of current
>>>> -                  transaction and deasserting the device chip select
>>>> -		  (qspi_n_ss_out).
>>>> -- cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low
>>>> -                  and first bit transfer.
>>>> -- resets	: Must contain an entry for each entry in reset-names.
>>>> -		  See ../reset/reset.txt for details.
>>>> -- reset-names	: Must include either "qspi" and/or "qspi-ocp".
>>>> -
>>>> -Example:
>>>> -
>>>> -	qspi: spi@ff705000 {
>>>> -		compatible = "cdns,qspi-nor";
>>>> -		#address-cells = <1>;
>>>> -		#size-cells = <0>;
>>>> -		reg = <0xff705000 0x1000>,
>>>> -		      <0xffa00000 0x1000>;
>>>> -		interrupts = <0 151 4>;
>>>> -		clocks = <&qspi_clk>;
>>>> -		cdns,is-decoded-cs;
>>>> -		cdns,fifo-depth = <128>;
>>>> -		cdns,fifo-width = <4>;
>>>> -		cdns,trigger-address = <0x00000000>;
>>>> -		resets = <&rst QSPI_RESET>, <&rst QSPI_OCP_RESET>;
>>>> -		reset-names = "qspi", "qspi-ocp";
>>>> -
>>>> -		flash0: n25q00@0 {
>>>> -			...
>>>> -			cdns,read-delay = <4>;
>>>> -			cdns,tshsl-ns = <50>;
>>>> -			cdns,tsd2d-ns = <50>;
>>>> -			cdns,tchsh-ns = <4>;
>>>> -			cdns,tslch-ns = <4>;
>>>> -		};
>>>> -	};
>>>> diff --git a/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
>>>> new file mode 100644
>>>> index 000000000000..ec22b040d804
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/spi/cadence-quadspi.yaml
>>>> @@ -0,0 +1,149 @@
>>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>>>> +%YAML 1.2
>>>> +---
>>>> +$id: http://devicetree.org/schemas/spi/cadence-quadspi.yaml#
>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>> +
>>>> +title: Cadence Quad SPI controller
>>>> +
>>>> +maintainers:
>>>> +  - Vadivel Murugan <vadivel.muruganx.ramuthevar@intel.com>
>>>> +
>>>> +allOf:
>>>> +  - $ref: "spi-controller.yaml#"
>>>> +
>>>> +properties:
>>>> +  compatible:
>>>> +    oneOf:
>>>> +      - items:
>>>
>>> You don't need 'oneOf' if there is only one entry...
>>>
>>> So you've dropped 'cdns,qspi-nor' alone being valid. Granted, the txt
>>> file was fuzzy as to whether or not that was valid. So you have to look
>>> at all the dts files and see. I prefer we don't allow that and require a
>>> more specific compatible, but if there's a bunch then we should allow
>>> for it. The commit message should summarize what you decide.
>> we need bunch of compatibles as below, TI, Altera and Intel uses different
>> compatible's so we added 'oneOf'.
> 
> Then you add oneOf when you need it. You don't for what you wrote,
> but once it is correct you will as Altera uses 'cdns,qspi-nor' alone.
Yes, yo're right , we need oneOf in the case of adding 'cadence,qspi' 
and 'cdns,qspi-nor' two different group of items.
> 
>> cdns,qspi-nor can be dropped instead I can add cadence,qspi ,because this
>> driver suuports qspi-nor and qspi-nand as well.
> 
> No, you can't change it because it is an ABI.
Ok, Got it, thanks!

Regards
Vadivel
> 
>>
>> Sure, let me go through other documentation files for reference.
>>
>>>
>>>> +          - enum:
>>>> +              - ti,k2g-qspi
>>>> +              - ti,am654-ospi
>>>> +          - const: cdns,qspi-nor
>>>
>>>> +examples:
>>>> +  - |
>>>> +    qspi: spi@ff705000 {
>>>> +      compatible = "cadence,qspi","cdns,qpsi-nor";
>>>
>>> And you missed fixing this.
>> Yes, fixed by "cadence,qspi" keeping alone, need to remove cdns,qspi-nor,
>> thanks!
> 
> Nope!
> 
> Rob
> 

  reply	other threads:[~2020-11-09  1:40 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-30  5:31 [PATCH v6 0/6] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-10-30  5:31 ` [PATCH v6 1/6] spi: cadence-quadspi: Add QSPI " Ramuthevar,Vadivel MuruganX
2020-10-30  5:31 ` [PATCH v6 2/6] spi: cadence-quadspi: Disable the DAC " Ramuthevar,Vadivel MuruganX
2020-11-03 16:09   ` Pratyush Yadav
2020-11-04  9:18     ` Ramuthevar, Vadivel MuruganX
2020-10-30  5:31 ` [PATCH v6 3/6] spi: cadence-quadspi: Add multi-chipselect support " Ramuthevar,Vadivel MuruganX
2020-11-05  7:11   ` Linus Walleij
2020-11-06  4:33     ` Ramuthevar, Vadivel MuruganX
2020-10-30  5:31 ` [PATCH v6 4/6] spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi Ramuthevar,Vadivel MuruganX
2020-10-30  5:31 ` [PATCH v6 5/6] dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml Ramuthevar,Vadivel MuruganX
2020-10-30 15:18   ` Rob Herring
2020-11-02  5:59     ` Ramuthevar, Vadivel MuruganX
2020-11-04 22:02       ` Rob Herring
2020-11-09  1:40         ` Ramuthevar, Vadivel MuruganX [this message]
2020-10-30  5:31 ` [PATCH v6 6/6] dt-bindings: spi: Add compatible for Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-11-04 22:03   ` Rob Herring
2020-11-09  1:49     ` Ramuthevar, Vadivel MuruganX
2020-11-09 15:15       ` Rob Herring
2020-11-10  5:21         ` Ramuthevar, Vadivel MuruganX

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