[PATCH 0/3] Convert qcom,hfpll documentation to yaml + related changes

[PATCH 0/3] Convert qcom,hfpll documentation to yaml + related changes

[Luca Weiss]

Finally touch the hfpll doc and convert it to yaml, and do some related
changes along the way.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
Luca Weiss (3):
      dt-bindings: clock: qcom,hfpll: Convert to YAML
      clk: qcom: hfpll: Add QCS404-specific compatible
      arm64: dts: qcom: qcs404: Use specific compatible for hfpll

 .../devicetree/bindings/clock/qcom,hfpll.txt       | 63 -----------------
 .../devicetree/bindings/clock/qcom,hfpll.yaml      | 82 ++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/qcs404.dtsi               |  2 +-
 drivers/clk/qcom/hfpll.c                           |  6 +-
 4 files changed, 87 insertions(+), 66 deletions(-)
---
base-commit: 39676dfe52331dba909c617f213fdb21015c8d10
change-id: 20231231-hfpll-yaml-9266f012365c

Best regards,
-- 
Luca Weiss <luca@z3ntu.xyz>

[PATCH 1/3] dt-bindings: clock: qcom,hfpll: Convert to YAML

[Luca Weiss]

Convert the .txt documentation to .yaml.

Take the liberty to change the compatibles for ipq8064, apq8064, msm8974
and msm8960 to follow the updated naming schema. These compatibles are
not used upstream yet.

Also add a compatible for QCS404 since that SoC upstream already uses
qcom,hfpll compatible but without an SoC-specific string.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
 .../devicetree/bindings/clock/qcom,hfpll.txt       | 63 -----------------
 .../devicetree/bindings/clock/qcom,hfpll.yaml      | 82 ++++++++++++++++++++++
 2 files changed, 82 insertions(+), 63 deletions(-)

diff --git a/Documentation/devicetree/bindings/clock/qcom,hfpll.txt b/Documentation/devicetree/bindings/clock/qcom,hfpll.txt
deleted file mode 100644
index 5769cbbe76be..000000000000
--- a/Documentation/devicetree/bindings/clock/qcom,hfpll.txt
+++ /dev/null
@@ -1,63 +0,0 @@
-High-Frequency PLL (HFPLL)
-
-PROPERTIES
-
-- compatible:
-	Usage: required
-	Value type: <string>:
-		shall contain only one of the following. The generic
-		compatible "qcom,hfpll" should be also included.
-
-                        "qcom,hfpll-ipq8064", "qcom,hfpll"
-                        "qcom,hfpll-apq8064", "qcom,hfpll"
-                        "qcom,hfpll-msm8974", "qcom,hfpll"
-                        "qcom,hfpll-msm8960", "qcom,hfpll"
-                        "qcom,msm8976-hfpll-a53", "qcom,hfpll"
-                        "qcom,msm8976-hfpll-a72", "qcom,hfpll"
-                        "qcom,msm8976-hfpll-cci", "qcom,hfpll"
-
-- reg:
-	Usage: required
-	Value type: <prop-encoded-array>
-	Definition: address and size of HPLL registers. An optional second
-		    element specifies the address and size of the alias
-		    register region.
-
-- clocks:
-	Usage: required
-	Value type: <prop-encoded-array>
-	Definition: reference to the xo clock.
-
-- clock-names:
-	Usage: required
-	Value type: <stringlist>
-	Definition: must be "xo".
-
-- clock-output-names:
-	Usage: required
-	Value type: <string>
-	Definition: Name of the PLL. Typically hfpllX where X is a CPU number
-		    starting at 0. Otherwise hfpll_Y where Y is more specific
-		    such as "l2".
-
-Example:
-
-1) An HFPLL for the L2 cache.
-
-	clock-controller@f9016000 {
-		compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
-		reg = <0xf9016000 0x30>;
-		clocks = <&xo_board>;
-		clock-names = "xo";
-		clock-output-names = "hfpll_l2";
-	};
-
-2) An HFPLL for CPU0. This HFPLL has the alias register region.
-
-	clock-controller@f908a000 {
-		compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
-		reg = <0xf908a000 0x30>, <0xf900a000 0x30>;
-		clocks = <&xo_board>;
-		clock-names = "xo";
-		clock-output-names = "hfpll0";
-	};
diff --git a/Documentation/devicetree/bindings/clock/qcom,hfpll.yaml b/Documentation/devicetree/bindings/clock/qcom,hfpll.yaml
new file mode 100644
index 000000000000..2cb4098012bc
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,hfpll.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,hfpll.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm High-Frequency PLL
+
+maintainers:
+  - Bjorn Andersson <andersson@kernel.org>
+
+description:
+  The HFPLL is used as CPU PLL on various Qualcomm SoCs.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - qcom,apq8064-hfpll
+          - qcom,ipq8064-hfpll
+          - qcom,msm8960-hfpll
+          - qcom,msm8974-hfpll
+          - qcom,msm8976-hfpll-a53
+          - qcom,msm8976-hfpll-a72
+          - qcom,msm8976-hfpll-cci
+          - qcom,qcs404-hfpll
+      - const: qcom,hfpll
+
+  reg:
+    items:
+      - description: Base address and size of the register region
+      - description: Optional base address and size of the alias register region
+    minItems: 1
+
+  '#clock-cells':
+    const: 0
+
+  clocks:
+    items:
+      - description: board XO clock
+
+  clock-names:
+    items:
+      - const: xo
+
+  clock-output-names:
+    description:
+      Name of the PLL. Typically hfpllX where X is a CPU number starting at 0.
+      Otherwise hfpll_Y where Y is more specific such as "l2".
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - '#clock-cells'
+  - clocks
+  - clock-names
+  - clock-output-names
+
+additionalProperties: false
+
+examples:
+  # Example 1 - HFPLL for L2 cache
+  - |
+    clock-controller@f9016000 {
+        compatible = "qcom,ipq8064-hfpll", "qcom,hfpll";
+        reg = <0xf9016000 0x30>;
+        clocks = <&xo_board>;
+        clock-names = "xo";
+        clock-output-names = "hfpll_l2";
+        #clock-cells = <0>;
+    };
+  # Example 2 - HFPLL for CPU0
+  - |
+    clock-controller@f908a000 {
+        compatible = "qcom,ipq8064-hfpll", "qcom,hfpll";
+        reg = <0xf908a000 0x30>, <0xf900a000 0x30>;
+        clocks = <&xo_board>;
+        clock-names = "xo";
+        clock-output-names = "hfpll0";
+        #clock-cells = <0>;
+    };

-- 
2.43.0

[PATCH 2/3] clk: qcom: hfpll: Add QCS404-specific compatible

[Luca Weiss]

It doesn't appear that the configuration is for the HFPLL is generic, so
add a qcs404-specific compatible and rename the existing struct to
qcs404.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
 drivers/clk/qcom/hfpll.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
index dac27e31ef60..5b12982519be 100644
--- a/drivers/clk/qcom/hfpll.c
+++ b/drivers/clk/qcom/hfpll.c
@@ -14,7 +14,7 @@
 #include "clk-regmap.h"
 #include "clk-hfpll.h"
 
-static const struct hfpll_data hdata = {
+static const struct hfpll_data qcs404 = {
 	.mode_reg = 0x00,
 	.l_reg = 0x04,
 	.m_reg = 0x08,
@@ -84,10 +84,12 @@ static const struct hfpll_data msm8976_cci = {
 };
 
 static const struct of_device_id qcom_hfpll_match_table[] = {
-	{ .compatible = "qcom,hfpll", .data = &hdata },
 	{ .compatible = "qcom,msm8976-hfpll-a53", .data = &msm8976_a53 },
 	{ .compatible = "qcom,msm8976-hfpll-a72", .data = &msm8976_a72 },
 	{ .compatible = "qcom,msm8976-hfpll-cci", .data = &msm8976_cci },
+	{ .compatible = "qcom,qcs404-hfpll", .data = &qcs404 },
+	/* deprecated, use SoC-specific compatible */
+	{ .compatible = "qcom,hfpll", .data = &qcs404 },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, qcom_hfpll_match_table);

-- 
2.43.0

[PATCH 3/3] arm64: dts: qcom: qcs404: Use specific compatible for hfpll

[Luca Weiss]

Follow the updated bindings and use a QCS404-specific compatible for the
HFPLL.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
---
 arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 6ac64ce9bb68..788dcc747a24 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -1317,7 +1317,7 @@ apcs_glb: mailbox@b011000 {
 		};
 
 		apcs_hfpll: clock-controller@b016000 {
-			compatible = "qcom,hfpll";
+			compatible = "qcom,qcs404-hfpll", "qcom,hfpll";
 			reg = <0x0b016000 0x30>;
 			#clock-cells = <0>;
 			clock-output-names = "apcs_hfpll";

-- 
2.43.0

Re: [PATCH 1/3] dt-bindings: clock: qcom,hfpll: Convert to YAML

[Krzysztof Kozlowski]

On 31/12/2023 15:48, Luca Weiss wrote:
> Convert the .txt documentation to .yaml.
> 
> Take the liberty to change the compatibles for ipq8064, apq8064, msm8974
> and msm8960 to follow the updated naming schema. These compatibles are
> not used upstream yet.
> 


> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - qcom,apq8064-hfpll
> +          - qcom,ipq8064-hfpll
> +          - qcom,msm8960-hfpll
> +          - qcom,msm8974-hfpll
> +          - qcom,msm8976-hfpll-a53
> +          - qcom,msm8976-hfpll-a72
> +          - qcom,msm8976-hfpll-cci
> +          - qcom,qcs404-hfpll
> +      - const: qcom,hfpll
> +
> +  reg:
> +    items:
> +      - description: Base address and size of the register region

HPLL registers

> +      - description: Optional base address and size of the alias register region

Alias register region

> +    minItems: 1
> +
> +  '#clock-cells':
> +    const: 0
> +
> +  clocks:
> +    items:
> +      - description: board XO clock
> +
> +  clock-names:
> +    items:
> +      - const: xo
> +
> +  clock-output-names:
> +    description:
> +      Name of the PLL. Typically hfpllX where X is a CPU number starting at 0.
> +      Otherwise hfpll_Y where Y is more specific such as "l2".
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - '#clock-cells'
> +  - clocks
> +  - clock-names
> +  - clock-output-names
> +
> +additionalProperties: false
> +
> +examples:
> +  # Example 1 - HFPLL for L2 cache
> +  - |
> +    clock-controller@f9016000 {
> +        compatible = "qcom,ipq8064-hfpll", "qcom,hfpll";
> +        reg = <0xf9016000 0x30>;
> +        clocks = <&xo_board>;
> +        clock-names = "xo";
> +        clock-output-names = "hfpll_l2";
> +        #clock-cells = <0>;
> +    };
> +  # Example 2 - HFPLL for CPU0

Just keep one example, they are the same. And then drop the comment.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH 2/3] clk: qcom: hfpll: Add QCS404-specific compatible

[Krzysztof Kozlowski]

On 31/12/2023 15:48, Luca Weiss wrote:
> It doesn't appear that the configuration is for the HFPLL is generic, so

That's ok...

> add a qcs404-specific compatible and rename the existing struct to

but why this is the solution? If the qcom,hfpll compatible was
deprecated, but it is not. This commit is contradictory to the bindings.


> qcs404.
> 
> Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> ---
>  drivers/clk/qcom/hfpll.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
> index dac27e31ef60..5b12982519be 100644
> --- a/drivers/clk/qcom/hfpll.c
> +++ b/drivers/clk/qcom/hfpll.c
> @@ -14,7 +14,7 @@
>  #include "clk-regmap.h"
>  #include "clk-hfpll.h"
>  
> -static const struct hfpll_data hdata = {
> +static const struct hfpll_data qcs404 = {
>  	.mode_reg = 0x00,
>  	.l_reg = 0x04,
>  	.m_reg = 0x08,
> @@ -84,10 +84,12 @@ static const struct hfpll_data msm8976_cci = {
>  };
>  
>  static const struct of_device_id qcom_hfpll_match_table[] = {
> -	{ .compatible = "qcom,hfpll", .data = &hdata },
>  	{ .compatible = "qcom,msm8976-hfpll-a53", .data = &msm8976_a53 },
>  	{ .compatible = "qcom,msm8976-hfpll-a72", .data = &msm8976_a72 },
>  	{ .compatible = "qcom,msm8976-hfpll-cci", .data = &msm8976_cci },
> +	{ .compatible = "qcom,qcs404-hfpll", .data = &qcs404 },
> +	/* deprecated, use SoC-specific compatible */

Why? That's not a deprecated compatible. You now expect to create many
unnecessary entries, which is not really needed. This is opposite of
what we try to achieve with compatibility lists.

Best regards,
Krzysztof

Re: [PATCH 1/3] dt-bindings: clock: qcom,hfpll: Convert to YAML

[Dmitry Baryshkov]

On Sun, 31 Dec 2023 at 16:49, Luca Weiss <luca@z3ntu.xyz> wrote:
>
> Convert the .txt documentation to .yaml.
>
> Take the liberty to change the compatibles for ipq8064, apq8064, msm8974
> and msm8960 to follow the updated naming schema. These compatibles are
> not used upstream yet.
>
> Also add a compatible for QCS404 since that SoC upstream already uses
> qcom,hfpll compatible but without an SoC-specific string.
>
> Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> ---
>  .../devicetree/bindings/clock/qcom,hfpll.txt       | 63 -----------------
>  .../devicetree/bindings/clock/qcom,hfpll.yaml      | 82 ++++++++++++++++++++++
>  2 files changed, 82 insertions(+), 63 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,hfpll.txt b/Documentation/devicetree/bindings/clock/qcom,hfpll.txt
> deleted file mode 100644
> index 5769cbbe76be..000000000000
> --- a/Documentation/devicetree/bindings/clock/qcom,hfpll.txt
> +++ /dev/null
> @@ -1,63 +0,0 @@
> -High-Frequency PLL (HFPLL)
> -
> -PROPERTIES
> -
> -- compatible:
> -       Usage: required
> -       Value type: <string>:
> -               shall contain only one of the following. The generic
> -               compatible "qcom,hfpll" should be also included.
> -
> -                        "qcom,hfpll-ipq8064", "qcom,hfpll"
> -                        "qcom,hfpll-apq8064", "qcom,hfpll"
> -                        "qcom,hfpll-msm8974", "qcom,hfpll"
> -                        "qcom,hfpll-msm8960", "qcom,hfpll"
> -                        "qcom,msm8976-hfpll-a53", "qcom,hfpll"
> -                        "qcom,msm8976-hfpll-a72", "qcom,hfpll"
> -                        "qcom,msm8976-hfpll-cci", "qcom,hfpll"
> -
> -- reg:
> -       Usage: required
> -       Value type: <prop-encoded-array>
> -       Definition: address and size of HPLL registers. An optional second
> -                   element specifies the address and size of the alias
> -                   register region.
> -
> -- clocks:
> -       Usage: required
> -       Value type: <prop-encoded-array>
> -       Definition: reference to the xo clock.
> -
> -- clock-names:
> -       Usage: required
> -       Value type: <stringlist>
> -       Definition: must be "xo".
> -
> -- clock-output-names:
> -       Usage: required
> -       Value type: <string>
> -       Definition: Name of the PLL. Typically hfpllX where X is a CPU number
> -                   starting at 0. Otherwise hfpll_Y where Y is more specific
> -                   such as "l2".
> -
> -Example:
> -
> -1) An HFPLL for the L2 cache.
> -
> -       clock-controller@f9016000 {
> -               compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
> -               reg = <0xf9016000 0x30>;
> -               clocks = <&xo_board>;
> -               clock-names = "xo";
> -               clock-output-names = "hfpll_l2";
> -       };
> -
> -2) An HFPLL for CPU0. This HFPLL has the alias register region.
> -
> -       clock-controller@f908a000 {
> -               compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
> -               reg = <0xf908a000 0x30>, <0xf900a000 0x30>;
> -               clocks = <&xo_board>;
> -               clock-names = "xo";
> -               clock-output-names = "hfpll0";
> -       };
> diff --git a/Documentation/devicetree/bindings/clock/qcom,hfpll.yaml b/Documentation/devicetree/bindings/clock/qcom,hfpll.yaml
> new file mode 100644
> index 000000000000..2cb4098012bc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,hfpll.yaml
> @@ -0,0 +1,82 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,hfpll.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm High-Frequency PLL
> +
> +maintainers:
> +  - Bjorn Andersson <andersson@kernel.org>
> +
> +description:
> +  The HFPLL is used as CPU PLL on various Qualcomm SoCs.
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - qcom,apq8064-hfpll
> +          - qcom,ipq8064-hfpll
> +          - qcom,msm8960-hfpll

I think we should drop these entries. On msm8960 / apq8064 / ipq8064
the HFPLLs are a part of GCC, so there is no need for a separate
compat entry.

> +          - qcom,msm8974-hfpll

This one is good, the HFPLL is separate, next to the acc / saw

> +          - qcom,msm8976-hfpll-a53
> +          - qcom,msm8976-hfpll-a72
> +          - qcom,msm8976-hfpll-cci

Ok.

> +          - qcom,qcs404-hfpll
> +      - const: qcom,hfpll
> +
> +  reg:
> +    items:
> +      - description: Base address and size of the register region
> +      - description: Optional base address and size of the alias register region
> +    minItems: 1
> +
> +  '#clock-cells':
> +    const: 0
> +
> +  clocks:
> +    items:
> +      - description: board XO clock
> +
> +  clock-names:
> +    items:
> +      - const: xo
> +
> +  clock-output-names:
> +    description:
> +      Name of the PLL. Typically hfpllX where X is a CPU number starting at 0.
> +      Otherwise hfpll_Y where Y is more specific such as "l2".
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - '#clock-cells'
> +  - clocks
> +  - clock-names
> +  - clock-output-names
> +
> +additionalProperties: false
> +
> +examples:
> +  # Example 1 - HFPLL for L2 cache
> +  - |
> +    clock-controller@f9016000 {
> +        compatible = "qcom,ipq8064-hfpll", "qcom,hfpll";
> +        reg = <0xf9016000 0x30>;
> +        clocks = <&xo_board>;
> +        clock-names = "xo";
> +        clock-output-names = "hfpll_l2";
> +        #clock-cells = <0>;
> +    };
> +  # Example 2 - HFPLL for CPU0
> +  - |
> +    clock-controller@f908a000 {
> +        compatible = "qcom,ipq8064-hfpll", "qcom,hfpll";
> +        reg = <0xf908a000 0x30>, <0xf900a000 0x30>;
> +        clocks = <&xo_board>;
> +        clock-names = "xo";
> +        clock-output-names = "hfpll0";
> +        #clock-cells = <0>;
> +    };
>
> --
> 2.43.0
>
>


-- 
With best wishes
Dmitry

Re: [PATCH 2/3] clk: qcom: hfpll: Add QCS404-specific compatible

[Luca Weiss]

On Dienstag, 2. Jänner 2024 11:41:26 CET Krzysztof Kozlowski wrote:
> On 31/12/2023 15:48, Luca Weiss wrote:
> > It doesn't appear that the configuration is for the HFPLL is generic, so
> 
> That's ok...
> 
> > add a qcs404-specific compatible and rename the existing struct to
> 
> but why this is the solution? If the qcom,hfpll compatible was
> deprecated, but it is not. This commit is contradictory to the bindings.
> 
> > qcs404.
> > 
> > Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
> > ---
> > 
> >  drivers/clk/qcom/hfpll.c | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
> > index dac27e31ef60..5b12982519be 100644
> > --- a/drivers/clk/qcom/hfpll.c
> > +++ b/drivers/clk/qcom/hfpll.c
> > @@ -14,7 +14,7 @@
> > 
> >  #include "clk-regmap.h"
> >  #include "clk-hfpll.h"
> > 
> > -static const struct hfpll_data hdata = {
> > +static const struct hfpll_data qcs404 = {
> > 
> >  	.mode_reg = 0x00,
> >  	.l_reg = 0x04,
> >  	.m_reg = 0x08,
> > 
> > @@ -84,10 +84,12 @@ static const struct hfpll_data msm8976_cci = {
> > 
> >  };
> >  
> >  static const struct of_device_id qcom_hfpll_match_table[] = {
> > 
> > -	{ .compatible = "qcom,hfpll", .data = &hdata },
> > 
> >  	{ .compatible = "qcom,msm8976-hfpll-a53", .data = &msm8976_a53 },
> >  	{ .compatible = "qcom,msm8976-hfpll-a72", .data = &msm8976_a72 },
> >  	{ .compatible = "qcom,msm8976-hfpll-cci", .data = &msm8976_cci },
> > 
> > +	{ .compatible = "qcom,qcs404-hfpll", .data = &qcs404 },
> > +	/* deprecated, use SoC-specific compatible */
> 
> Why? That's not a deprecated compatible. You now expect to create many
> unnecessary entries, which is not really needed. This is opposite of
> what we try to achieve with compatibility lists.

Just "qcom,hfpll" is not allowed by the bindings.

The problem is that it's actually unclear to me what "qcom,hfpll" was supposed 
to be currently. It was added originally for MSM8974 and friends (see git log) 
but then is currently only used by QCS404 while in QCS404 downstream msm-4.4 
(I think it was 4.4) I see different driver data than what's here.

So I wanted to just move what's used here to be qcs404-specific and then in an 
upcoming patch add a msm8974-specific compatible with different driver data.

Also wouldn't the "don't extend driver lists when not neccessary" mean using 
something like "qcom,msm1234-hfpll", "qcom,qcs404-hfpll", "qcom,hfpll" then? 
That was kind of my idea if some other SoC can reuse e.g. qcs404 data?

Regards
Luca

> 
> Best regards,
> Krzysztof

Re: [PATCH 2/3] clk: qcom: hfpll: Add QCS404-specific compatible

[Krzysztof Kozlowski]

On 06/01/2024 11:19, Luca Weiss wrote:
> On Dienstag, 2. Jänner 2024 11:41:26 CET Krzysztof Kozlowski wrote:
>> On 31/12/2023 15:48, Luca Weiss wrote:
>>> It doesn't appear that the configuration is for the HFPLL is generic, so
>>
>> That's ok...
>>
>>> add a qcs404-specific compatible and rename the existing struct to
>>
>> but why this is the solution? If the qcom,hfpll compatible was
>> deprecated, but it is not. This commit is contradictory to the bindings.
>>
>>> qcs404.
>>>
>>> Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
>>> ---
>>>
>>>  drivers/clk/qcom/hfpll.c | 6 ++++--
>>>  1 file changed, 4 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
>>> index dac27e31ef60..5b12982519be 100644
>>> --- a/drivers/clk/qcom/hfpll.c
>>> +++ b/drivers/clk/qcom/hfpll.c
>>> @@ -14,7 +14,7 @@
>>>
>>>  #include "clk-regmap.h"
>>>  #include "clk-hfpll.h"
>>>
>>> -static const struct hfpll_data hdata = {
>>> +static const struct hfpll_data qcs404 = {
>>>
>>>  	.mode_reg = 0x00,
>>>  	.l_reg = 0x04,
>>>  	.m_reg = 0x08,
>>>
>>> @@ -84,10 +84,12 @@ static const struct hfpll_data msm8976_cci = {
>>>
>>>  };
>>>  
>>>  static const struct of_device_id qcom_hfpll_match_table[] = {
>>>
>>> -	{ .compatible = "qcom,hfpll", .data = &hdata },
>>>
>>>  	{ .compatible = "qcom,msm8976-hfpll-a53", .data = &msm8976_a53 },
>>>  	{ .compatible = "qcom,msm8976-hfpll-a72", .data = &msm8976_a72 },
>>>  	{ .compatible = "qcom,msm8976-hfpll-cci", .data = &msm8976_cci },
>>>
>>> +	{ .compatible = "qcom,qcs404-hfpll", .data = &qcs404 },
>>> +	/* deprecated, use SoC-specific compatible */
>>
>> Why? That's not a deprecated compatible. You now expect to create many
>> unnecessary entries, which is not really needed. This is opposite of
>> what we try to achieve with compatibility lists.
> 
> Just "qcom,hfpll" is not allowed by the bindings.

Okay... sentence is correct but how is it related to the driver?

> The problem is that it's actually unclear to me what "qcom,hfpll" was supposed 
> to be currently. It was added originally for MSM8974 and friends (see git log) 
> but then is currently only used by QCS404 while in QCS404 downstream msm-4.4 
> (I think it was 4.4) I see different driver data than what's here.

I discourage from using generic compatibles, because their meaning is
too often fluid, but if we already have it then: it is supposed to be
whatever driver and bindings defined it when they were added.

> 
> So I wanted to just move what's used here to be qcs404-specific and then in an 
> upcoming patch add a msm8974-specific compatible with different driver data.
> 
> Also wouldn't the "don't extend driver lists when not neccessary" mean using 
> something like "qcom,msm1234-hfpll", "qcom,qcs404-hfpll", "qcom,hfpll" then?

qcs404 and hfpll are the same aren't they? Then why would third
compatible appear?

> That was kind of my idea if some other SoC can reuse e.g. qcs404 data?

If any other SoC wants to reuse qcs404, why that SoC cannot use hfpll?
If hfpll compatible is not correct, it should be deprecated, which is
not happening in this patchset.

Best regards,
Krzysztof