Re: [RFC PATCH 1/6] drivers: crypto: Updated Makefile for xilinx subdirectory

Re: [RFC PATCH 1/6] drivers: crypto: Updated Makefile for xilinx subdirectory

[Michal Simek]

On 11/29/21 20:20, Harsha wrote:
> This patch updates the Makefile for xilinx subdirectory.
> Currently the xilinx subdirectory includes only zynqmp-aes-gcm.c.
> Since this patch series adds zynqmp-sha.c in the xilinx subdirectory,
> so the Makefile needs to be updated.

You should change this description.

CONFIG_CRYPTO_DEV_ZYNQMP_AES protects zynqmp-aes-gcm.o and it is used 
twice and it is enough to use it once.

> 
> Signed-off-by: Harsha <harsha.harsha@xilinx.com>
> ---
>   drivers/crypto/Makefile | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
> index 1fe5120..0a4fff2 100644
> --- a/drivers/crypto/Makefile
> +++ b/drivers/crypto/Makefile
> @@ -47,7 +47,7 @@ obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/
>   obj-$(CONFIG_CRYPTO_DEV_BCM_SPU) += bcm/
>   obj-$(CONFIG_CRYPTO_DEV_SAFEXCEL) += inside-secure/
>   obj-$(CONFIG_CRYPTO_DEV_ARTPEC6) += axis/
> -obj-$(CONFIG_CRYPTO_DEV_ZYNQMP_AES) += xilinx/
> +obj-y += xilinx/
>   obj-y += hisilicon/
>   obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic/
>   obj-y += keembay/
> 

This should be regular patch not just RFC.  When this is fixed feel free 
to add my

Reviewed-by: Michal Simek <michal.simek@xilinx.com>

Thanks,
Michal

Re: [RFC PATCH 2/6] firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality

[Michal Simek]

On 11/29/21 20:20, Harsha wrote:
> This patch adds zynqmp_pm_sha_hash API in the ZynqMP firmware to compute
> SHA3 hash of given data.
> 
> Signed-off-by: Harsha <harsha.harsha@xilinx.com>
> ---
>   drivers/firmware/xilinx/zynqmp.c     | 26 ++++++++++++++++++++++++++
>   include/linux/firmware/xlnx-zynqmp.h |  8 ++++++++
>   2 files changed, 34 insertions(+)
> 
> diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
> index 3dd45a7..a84c5ea 100644
> --- a/drivers/firmware/xilinx/zynqmp.c
> +++ b/drivers/firmware/xilinx/zynqmp.c
> @@ -1117,6 +1117,32 @@ int zynqmp_pm_aes_engine(const u64 address, u32 *out)
>   EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);
>   
>   /**
> + * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash
> + * @address:	Address of the data/ Address of output buffer where
> + *		hash should be stored.
> + * @size:	Size of the data.
> + * @flags:
> + *	BIT(0) - for initializing csudma driver and SHA3(Here address
> + *		 and size inputs can be NULL).
> + *	BIT(1) - to call Sha3_Update API which can be called multiple
> + *		 times when data is not contiguous.
> + *	BIT(2) - to get final hash of the whole updated data.
> + *		 Hash will be overwritten at provided address with
> + *		 48 bytes.
> + *
> + * Return:	Returns status, either success or error code.
> + */
> +int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)
> +{
> +	u32 lower_addr = lower_32_bits(address);
> +	u32 upper_addr = upper_32_bits(address);
> +
> +	return zynqmp_pm_invoke_fn(PM_SECURE_SHA, upper_addr, lower_addr,
> +				   size, flags, NULL);
> +}
> +EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);
> +
> +/**
>    * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart
>    * @type:	Shutdown or restart? 0 for shutdown, 1 for restart
>    * @subtype:	Specifies which system should be restarted or shut down
> diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
> index 47fd4e5..38ef708 100644
> --- a/include/linux/firmware/xlnx-zynqmp.h
> +++ b/include/linux/firmware/xlnx-zynqmp.h
> @@ -78,6 +78,7 @@ enum pm_api_id {
>   	PM_FPGA_LOAD = 22,
>   	PM_FPGA_GET_STATUS = 23,
>   	PM_GET_CHIPID = 24,
> +	PM_SECURE_SHA = 26,
>   	PM_PINCTRL_REQUEST = 28,
>   	PM_PINCTRL_RELEASE = 29,
>   	PM_PINCTRL_GET_FUNCTION = 30,
> @@ -410,6 +411,7 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
>   			      const u32 qos,
>   			      const enum zynqmp_pm_request_ack ack);
>   int zynqmp_pm_aes_engine(const u64 address, u32 *out);
> +int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags);
>   int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags);
>   int zynqmp_pm_fpga_get_status(u32 *value);
>   int zynqmp_pm_write_ggs(u32 index, u32 value);
> @@ -581,6 +583,12 @@ static inline int zynqmp_pm_aes_engine(const u64 address, u32 *out)
>   	return -ENODEV;
>   }
>   
> +static inline int zynqmp_pm_sha_hash(const u64 address, const u32 size,
> +				     const u32 flags)
> +{
> +	return -ENODEV;
> +}
> +
>   static inline int zynqmp_pm_fpga_load(const u64 address, const u32 size,
>   				      const u32 flags)
>   {
> 

Acked-by: Michal Simek <michal.simek@xilinx.com>

Thanks,
Michal

Re: [RFC PATCH 4/6] arm64: dts: zynqmp: Add Xilinx SHA3 node

[Michal Simek]

On 11/29/21 20:20, Harsha wrote:
> This patch adds a SHA3 DT node for Xilinx ZynqMP SoC.
> 
> Signed-off-by: Harsha <harsha.harsha@xilinx.com>
> ---
>   arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 74e6644..33b7ef6 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -174,6 +174,10 @@
>   				compatible = "xlnx,zynqmp-aes";
>   			};
>   
> +			xlnx_sha3_384: sha384 {
> +				compatible = "xlnx,zynqmp-sha3-384";
> +			};
> +
>   			zynqmp_reset: reset-controller {
>   				compatible = "xlnx,zynqmp-reset";
>   				#reset-cells = <1>;
> 

I will let Rob to comment this but I think this can be discovered and 
there is no need to link it with any device now. That's why maybe the 
whole dt binding is not needed at all.

Thanks,
Michal

[RFC PATCH 4/6] arm64: dts: zynqmp: Add Xilinx SHA3 node

[Harsha]

This patch adds a SHA3 DT node for Xilinx ZynqMP SoC.

Signed-off-by: Harsha <harsha.harsha@xilinx.com>
---
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 74e6644..33b7ef6 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -174,6 +174,10 @@
 				compatible = "xlnx,zynqmp-aes";
 			};
 
+			xlnx_sha3_384: sha384 {
+				compatible = "xlnx,zynqmp-sha3-384";
+			};
+
 			zynqmp_reset: reset-controller {
 				compatible = "xlnx,zynqmp-reset";
 				#reset-cells = <1>;
-- 
1.8.2.1