Re: [PATCH V7 5/5] perf tools: adding sink configuration for cs_etm PMU

[Suzuki K Poulose <Suzuki.Poulose@arm.com>]

On 31/08/16 15:14, Mathieu Poirier wrote:
> On 31 August 2016 at 03:37, Suzuki K Poulose <Suzuki.Poulose@arm.com> wrote:
>> On 30/08/16 17:19, Mathieu Poirier wrote:
>>>
>>> Using the PMU::set_drv_config() callback to enable the CoreSight
>>> sink that will be used for the trace session.
>>
>>
>>> +int cs_etm_set_drv_config(struct perf_evsel_config_term *term)
>>> +{
>>> +       int ret;
>>> +       char enable_sink[ENABLE_SINK_MAX];
>>> +
>>> +       snprintf(enable_sink, ENABLE_SINK_MAX, "%s/%s",
>>> +                term->val.drv_cfg, "enable_sink");
>>> +
>>> +       ret = cs_device__print_file(enable_sink, "%d", 1);
>>> +       if (ret < 0)
>>> +               return ret;
>>> +
>>> +       return 0;
>>> +}
>>
>>
>>
>> Don't we have to disable the sink at the end of the session ? How is that
>> taken care of ? Did I miss that ?
>>
>
> Correct - the sink has to be disabled once it is no longer needed.  It
> is a little tricky to do and I haven't decided on the best way to
> proceed.  Fortunately that aspect doesn't affect this patchset.

Well, this patchset when used, could leave a sink enabled. If we a choose
a different sink (say an ETF) from the perf, which occurs before the
previous sink (say an ETR) in the coresight path, the perf wouldn't get any
trace data, without any clue.

May be we could register an atexit() handler for clearing the sink ? So that
it is guaranteed to clear it irrespective of the path taken by perf to exit ?

Cheers
Suzuki