Re: [PATCH 00/49] Add Alder Lake support for perf

["Jin, Yao" <yao.jin@linux.intel.com>]

On 2/12/2021 12:22 AM, Liang, Kan wrote:
> 
> 
> On 2/11/2021 6:40 AM, Jiri Olsa wrote:
>> On Mon, Feb 08, 2021 at 07:24:57AM -0800, kan.liang@linux.intel.com wrote:
>>
>> SNIP
>>
>>> Jin Yao (24):
>>>    perf jevents: Support unit value "cpu_core" and "cpu_atom"
>>>    perf util: Save pmu name to struct perf_pmu_alias
>>>    perf pmu: Save detected hybrid pmus to a global pmu list
>>>    perf pmu: Add hybrid helper functions
>>>    perf list: Support --cputype option to list hybrid pmu events
>>>    perf stat: Hybrid evsel uses its own cpus
>>>    perf header: Support HYBRID_TOPOLOGY feature
>>>    perf header: Support hybrid CPU_PMU_CAPS
>>>    tools headers uapi: Update tools's copy of linux/perf_event.h
>>>    perf parse-events: Create two hybrid hardware events
>>>    perf parse-events: Create two hybrid cache events
>>>    perf parse-events: Support hardware events inside PMU
>>>    perf list: Display pmu prefix for partially supported hybrid cache
>>>      events
>>>    perf parse-events: Support hybrid raw events
>>>    perf stat: Support --cputype option for hybrid events
>>>    perf stat: Support metrics with hybrid events
>>>    perf evlist: Create two hybrid 'cycles' events by default
>>>    perf stat: Add default hybrid events
>>>    perf stat: Uniquify hybrid event name
>>>    perf stat: Merge event counts from all hybrid PMUs
>>>    perf stat: Filter out unmatched aggregation for hybrid event
>>>    perf evlist: Warn as events from different hybrid PMUs in a group
>>>    perf Documentation: Document intel-hybrid support
>>>    perf evsel: Adjust hybrid event and global event mixed group
>>>
>>> Kan Liang (22):
>>>    perf/x86/intel: Hybrid PMU support for perf capabilities
>>>    perf/x86: Hybrid PMU support for intel_ctrl
>>>    perf/x86: Hybrid PMU support for counters
>>>    perf/x86: Hybrid PMU support for unconstrained
>>>    perf/x86: Hybrid PMU support for hardware cache event
>>>    perf/x86: Hybrid PMU support for event constraints
>>>    perf/x86: Hybrid PMU support for extra_regs
>>>    perf/x86/intel: Factor out intel_pmu_check_num_counters
>>>    perf/x86/intel: Factor out intel_pmu_check_event_constraints
>>>    perf/x86/intel: Factor out intel_pmu_check_extra_regs
>>>    perf/x86: Expose check_hw_exists
>>>    perf/x86: Remove temporary pmu assignment in event_init
>>>    perf/x86: Factor out x86_pmu_show_pmu_cap
>>>    perf/x86: Register hybrid PMUs
>>>    perf/x86: Add structures for the attributes of Hybrid PMUs
>>>    perf/x86/intel: Add attr_update for Hybrid PMUs
>>>    perf/x86: Support filter_match callback
>>>    perf/x86/intel: Add Alder Lake Hybrid support
>>>    perf: Introduce PERF_TYPE_HARDWARE_PMU and PERF_TYPE_HW_CACHE_PMU
>>>    perf/x86/intel/uncore: Add Alder Lake support
>>>    perf/x86/msr: Add Alder Lake CPU support
>>>    perf/x86/cstate: Add Alder Lake CPU support
>>>
>>> Ricardo Neri (2):
>>>    x86/cpufeatures: Enumerate Intel Hybrid Technology feature bit
>>>    x86/cpu: Describe hybrid CPUs in cpuinfo_x86
>>>
>>> Zhang Rui (1):
>>>    perf/x86/rapl: Add support for Intel Alder Lake
>>
>> hi,
>> would you have git branch with all this somewhere?
>>
> 
> Here is the git branch
> 
> https://github.com/kliang2/perf.git adl_enabling
> 
> Please note that the branch is on top of Peter's perf/core branch, which doesn't include the latest 
> perf tool changes. The perf tool patches in the branch only includes the critical changes. There 
> will be more tool patches later, e.g., patches for perf mem, perf test etc.
> 
> Thanks,
> Kan

Yes, there will be much more perf tool patches later, such as the supports for perf mem, perf c2c 
and etc.

Since the AlderLake perf tool patches are too huge, I will separate the whole patches into several 
series in v2 and then post.

Thanks
Jin Yao