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From: Tom Lendacky <thomas.lendacky@amd.com>
To: Kuppuswamy Sathyanarayanan 
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Peter Zijlstra <peterz@infradead.org>,
	Andy Lutomirski <luto@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Richard Henderson <rth@twiddle.net>,
	Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	James E J Bottomley <James.Bottomley@HansenPartnership.com>,
	Helge Deller <deller@gmx.de>,
	"David S . Miller" <davem@davemloft.net>,
	Arnd Bergmann <arnd@arndb.de>, Jonathan Corbet <corbet@lwn.net>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	David Hildenbrand <david@redhat.com>,
	Andrea Arcangeli <aarcange@redhat.com>,
	Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Peter H Anvin <hpa@zytor.com>,
	Dave Hansen <dave.hansen@intel.com>,
	Tony Luck <tony.luck@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Andi Kleen <ak@linux.intel.com>,
	Kirill Shutemov <kirill.shutemov@linux.intel.com>,
	Sean Christopherson <seanjc@google.com>,
	Kuppuswamy Sathyanarayanan <knsathya@kernel.org>,
	x86@kernel.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-alpha@vger.kernel.org,
	linux-mips@vger.kernel.org, linux-parisc@vger.kernel.org,
	sparclinux@vger.kernel.org, linux-arch@vger.kernel.org,
	linux-doc@vger.kernel.org,
	virtualization@lists.linux-foundation.org
Subject: Re: [PATCH v5 01/16] x86/mm: Move force_dma_unencrypted() to common code
Date: Wed, 20 Oct 2021 11:11:13 -0500	[thread overview]
Message-ID: <72b8be39-b4e2-5d77-524c-a2ea0c750ab1@amd.com> (raw)
In-Reply-To: <20211009003711.1390019-2-sathyanarayanan.kuppuswamy@linux.intel.com>

On 10/8/21 7:36 PM, Kuppuswamy Sathyanarayanan wrote:
> From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
> 
> Intel TDX doesn't allow VMM to access guest private memory. Any memory
> that is required for communication with VMM must be shared explicitly
> by setting the bit in page table entry. After setting the shared bit,
> the conversion must be completed with MapGPA hypercall. Details about
> MapGPA hypercall can be found in [1], sec 3.2.
> 
> The call informs VMM about the conversion between private/shared
> mappings. The shared memory is similar to unencrypted memory in AMD
> SME/SEV terminology but the underlying process of sharing/un-sharing
> the memory is different for Intel TDX guest platform.
> 
> SEV assumes that I/O devices can only do DMA to "decrypted" physical
> addresses without the C-bit set. In order for the CPU to interact with
> this memory, the CPU needs a decrypted mapping. To add this support,
> AMD SME code forces force_dma_unencrypted() to return true for
> platforms that support AMD SEV feature. It will be used for DMA memory
> allocation API to trigger set_memory_decrypted() for platforms that
> support AMD SEV feature.
> 
> TDX is similar. So, to communicate with I/O devices, related pages need
> to be marked as shared. As mentioned above, shared memory in TDX
> architecture is similar to decrypted memory in AMD SME/SEV. So similar
> to AMD SEV, force_dma_unencrypted() has to forced to return true. This
> support is added in other patches in this series.
> 
> So move force_dma_unencrypted() out of AMD specific code and call AMD
> specific (amd_force_dma_unencrypted()) initialization function from it.
> force_dma_unencrypted() will be modified by later patches to include
> Intel TDX guest platform specific initialization.
> 
> Also, introduce new config option X86_MEM_ENCRYPT_COMMON that has to be
> selected by all x86 memory encryption features. This will be selected
> by both AMD SEV and Intel TDX guest config options.
> 
> This is preparation for TDX changes in DMA code and it has no
> functional change.

Can force_dma_unencrypted() be moved to arch/x86/kernel/cc_platform.c, 
instead of creating a new file? It might fit better with patch #6.

Thanks,
Tom

> 
> [1] - https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-guest-hypervisor-communication-interface.pdf
> 
> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> Reviewed-by: Andi Kleen <ak@linux.intel.com>
> Reviewed-by: Tony Luck <tony.luck@intel.com>
> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> ---
> 
> Changes since v4:
>   * Removed used we/you from commit log.
> 
> Change since v3:
>   * None
> 
> Changes since v1:
>   * Removed sev_active(), sme_active() checks in force_dma_unencrypted().
> 
>   arch/x86/Kconfig                          |  8 ++++++--
>   arch/x86/include/asm/mem_encrypt_common.h | 18 ++++++++++++++++++
>   arch/x86/mm/Makefile                      |  2 ++
>   arch/x86/mm/mem_encrypt.c                 |  3 ++-
>   arch/x86/mm/mem_encrypt_common.c          | 17 +++++++++++++++++
>   5 files changed, 45 insertions(+), 3 deletions(-)
>   create mode 100644 arch/x86/include/asm/mem_encrypt_common.h
>   create mode 100644 arch/x86/mm/mem_encrypt_common.c
> 
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index af49ad084919..37b27412f52e 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -1519,16 +1519,20 @@ config X86_CPA_STATISTICS
>   	  helps to determine the effectiveness of preserving large and huge
>   	  page mappings when mapping protections are changed.
>   
> +config X86_MEM_ENCRYPT_COMMON
> +	select ARCH_HAS_FORCE_DMA_UNENCRYPTED
> +	select DYNAMIC_PHYSICAL_MASK
> +	def_bool n
> +
>   config AMD_MEM_ENCRYPT
>   	bool "AMD Secure Memory Encryption (SME) support"
>   	depends on X86_64 && CPU_SUP_AMD
>   	select DMA_COHERENT_POOL
> -	select DYNAMIC_PHYSICAL_MASK
>   	select ARCH_USE_MEMREMAP_PROT
> -	select ARCH_HAS_FORCE_DMA_UNENCRYPTED
>   	select INSTRUCTION_DECODER
>   	select ARCH_HAS_RESTRICTED_VIRTIO_MEMORY_ACCESS
>   	select ARCH_HAS_CC_PLATFORM
> +	select X86_MEM_ENCRYPT_COMMON
>   	help
>   	  Say yes to enable support for the encryption of system memory.
>   	  This requires an AMD processor that supports Secure Memory
> diff --git a/arch/x86/include/asm/mem_encrypt_common.h b/arch/x86/include/asm/mem_encrypt_common.h
> new file mode 100644
> index 000000000000..697bc40a4e3d
> --- /dev/null
> +++ b/arch/x86/include/asm/mem_encrypt_common.h
> @@ -0,0 +1,18 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/* Copyright (C) 2020 Intel Corporation */
> +#ifndef _ASM_X86_MEM_ENCRYPT_COMMON_H
> +#define _ASM_X86_MEM_ENCRYPT_COMMON_H
> +
> +#include <linux/mem_encrypt.h>
> +#include <linux/device.h>
> +
> +#ifdef CONFIG_AMD_MEM_ENCRYPT
> +bool amd_force_dma_unencrypted(struct device *dev);
> +#else /* CONFIG_AMD_MEM_ENCRYPT */
> +static inline bool amd_force_dma_unencrypted(struct device *dev)
> +{
> +	return false;
> +}
> +#endif /* CONFIG_AMD_MEM_ENCRYPT */
> +
> +#endif
> diff --git a/arch/x86/mm/Makefile b/arch/x86/mm/Makefile
> index 5864219221ca..b31cb52bf1bd 100644
> --- a/arch/x86/mm/Makefile
> +++ b/arch/x86/mm/Makefile
> @@ -52,6 +52,8 @@ obj-$(CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS)	+= pkeys.o
>   obj-$(CONFIG_RANDOMIZE_MEMORY)			+= kaslr.o
>   obj-$(CONFIG_PAGE_TABLE_ISOLATION)		+= pti.o
>   
> +obj-$(CONFIG_X86_MEM_ENCRYPT_COMMON)	+= mem_encrypt_common.o
> +
>   obj-$(CONFIG_AMD_MEM_ENCRYPT)	+= mem_encrypt.o
>   obj-$(CONFIG_AMD_MEM_ENCRYPT)	+= mem_encrypt_identity.o
>   obj-$(CONFIG_AMD_MEM_ENCRYPT)	+= mem_encrypt_boot.o
> diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c
> index 23d54b810f08..5d7fbed73949 100644
> --- a/arch/x86/mm/mem_encrypt.c
> +++ b/arch/x86/mm/mem_encrypt.c
> @@ -31,6 +31,7 @@
>   #include <asm/processor-flags.h>
>   #include <asm/msr.h>
>   #include <asm/cmdline.h>
> +#include <asm/mem_encrypt_common.h>
>   
>   #include "mm_internal.h"
>   
> @@ -362,7 +363,7 @@ int __init early_set_memory_encrypted(unsigned long vaddr, unsigned long size)
>   }
>   
>   /* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */
> -bool force_dma_unencrypted(struct device *dev)
> +bool amd_force_dma_unencrypted(struct device *dev)
>   {
>   	/*
>   	 * For SEV, all DMA must be to unencrypted addresses.
> diff --git a/arch/x86/mm/mem_encrypt_common.c b/arch/x86/mm/mem_encrypt_common.c
> new file mode 100644
> index 000000000000..f063c885b0a5
> --- /dev/null
> +++ b/arch/x86/mm/mem_encrypt_common.c
> @@ -0,0 +1,17 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Memory Encryption Support Common Code
> + *
> + * Copyright (C) 2021 Intel Corporation
> + *
> + * Author: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
> + */
> +
> +#include <asm/mem_encrypt_common.h>
> +#include <linux/dma-mapping.h>
> +
> +/* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */
> +bool force_dma_unencrypted(struct device *dev)
> +{
> +	return amd_force_dma_unencrypted(dev);
> +}
> 

  reply	other threads:[~2021-10-20 16:11 UTC|newest]

Thread overview: 85+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-09  0:36 [PATCH v5 00/16] Add TDX Guest Support (shared-mm support) Kuppuswamy Sathyanarayanan
2021-10-09  0:36 ` [PATCH v5 01/16] x86/mm: Move force_dma_unencrypted() to common code Kuppuswamy Sathyanarayanan
2021-10-20 16:11   ` Tom Lendacky [this message]
2021-10-20 16:43     ` Sathyanarayanan Kuppuswamy
2021-10-09  0:36 ` [PATCH v5 02/16] x86/tdx: Get TD execution environment information via TDINFO Kuppuswamy Sathyanarayanan
2021-10-09  0:36 ` [PATCH v5 03/16] x86/tdx: Exclude Shared bit from physical_mask Kuppuswamy Sathyanarayanan
2021-11-05 22:11   ` Sean Christopherson
2021-11-08 14:45     ` Kirill A. Shutemov
2021-10-09  0:36 ` [PATCH v5 04/16] x86/tdx: Make pages shared in ioremap() Kuppuswamy Sathyanarayanan
2021-10-20 16:03   ` Tom Lendacky
2021-10-20 16:41     ` Sathyanarayanan Kuppuswamy
2021-10-09  0:37 ` [PATCH v5 05/16] x86/tdx: Add helper to do MapGPA hypercall Kuppuswamy Sathyanarayanan
2021-10-09  0:37 ` [PATCH v5 06/16] x86/tdx: Make DMA pages shared Kuppuswamy Sathyanarayanan
2021-10-20 16:33   ` Tom Lendacky
2021-10-20 16:45     ` Sathyanarayanan Kuppuswamy
2021-10-20 17:22       ` Tom Lendacky
2021-10-20 17:26         ` Sathyanarayanan Kuppuswamy
2021-10-09  0:37 ` [PATCH v5 07/16] x86/kvm: Use bounce buffers for TD guest Kuppuswamy Sathyanarayanan
2021-10-20 16:39   ` Tom Lendacky
2021-10-20 16:50     ` Sathyanarayanan Kuppuswamy
2021-10-20 17:26       ` Tom Lendacky
2021-10-09  0:37 ` [PATCH v5 08/16] x86/tdx: ioapic: Add shared bit for IOAPIC base address Kuppuswamy Sathyanarayanan
2021-10-09  0:37 ` [PATCH v5 09/16] x86/tdx: Enable shared memory confidential guest flags for TDX guest Kuppuswamy Sathyanarayanan
2021-10-09  0:37 ` [PATCH v5 10/16] PCI: Consolidate pci_iomap_range(), pci_iomap_wc_range() Kuppuswamy Sathyanarayanan
2021-10-09  0:37 ` [PATCH v5 11/16] asm/io.h: Add ioremap_host_shared fallback Kuppuswamy Sathyanarayanan
2021-10-09  0:37 ` [PATCH v5 12/16] PCI: Add pci_iomap_host_shared(), pci_iomap_host_shared_range() Kuppuswamy Sathyanarayanan
2021-10-09  9:53   ` Michael S. Tsirkin
2021-10-09 20:39     ` Dan Williams
2021-10-10 22:11       ` Andi Kleen
2021-10-12 17:42         ` Dan Williams
2021-10-12 18:35           ` Andi Kleen
2021-10-12 21:14             ` Dan Williams
2021-10-12 21:18               ` Michael S. Tsirkin
2021-10-12 21:24                 ` Andi Kleen
2021-10-12 21:28               ` Andi Kleen
2021-10-12 22:00                 ` Dan Williams
2021-10-18 12:13             ` Greg KH
2021-10-12 18:36         ` Reshetova, Elena
2021-10-12 18:38           ` Andi Kleen
2021-10-12 18:57             ` Reshetova, Elena
2021-10-12 19:13               ` Dan Williams
2021-10-12 19:49                 ` Andi Kleen
2021-10-12 21:11           ` Michael S. Tsirkin
2021-10-14  6:32             ` Reshetova, Elena
2021-10-14  6:57               ` Michael S. Tsirkin
2021-10-14  7:27                 ` Reshetova, Elena
2021-10-14  9:26                   ` Michael S. Tsirkin
2021-10-14 12:33                     ` Reshetova, Elena
2021-10-17 22:17                       ` Michael S. Tsirkin
2021-10-14 11:49                   ` Michael S. Tsirkin
2021-10-17 21:52               ` Thomas Gleixner
2021-10-18  7:03                 ` Reshetova, Elena
2021-10-18  0:55         ` Thomas Gleixner
2021-10-18  1:10           ` Thomas Gleixner
2021-10-18 12:08         ` Greg KH
2021-10-10 22:22     ` Andi Kleen
2021-10-11 11:59       ` Michael S. Tsirkin
2021-10-11 17:32         ` Andi Kleen
2021-10-11 18:22           ` Michael S. Tsirkin
2021-10-18 12:15         ` Greg KH
2021-10-18 13:17           ` Michael S. Tsirkin
2021-10-11  7:58   ` Christoph Hellwig
2021-10-11 17:23     ` Andi Kleen
2021-10-11 19:09       ` Michael S. Tsirkin
2021-10-12  5:31         ` Christoph Hellwig
2021-10-12 18:37           ` Andi Kleen
2021-10-09  0:37 ` [PATCH v5 13/16] PCI: Mark MSI data shared Kuppuswamy Sathyanarayanan
2021-10-09  0:37 ` [PATCH v5 14/16] virtio: Use shared mappings for virtio PCI devices Kuppuswamy Sathyanarayanan
2021-10-09  0:37 ` [PATCH v5 15/16] x86/tdx: Implement ioremap_host_shared for x86 Kuppuswamy Sathyanarayanan
2021-10-09  0:37 ` [PATCH v5 16/16] x86/tdx: Add cmdline option to force use of ioremap_host_shared Kuppuswamy Sathyanarayanan
2021-10-09  1:45   ` Randy Dunlap
2021-10-09  2:10     ` Kuppuswamy, Sathyanarayanan
2021-10-09 11:04   ` Michael S. Tsirkin
2021-10-11  2:39     ` Andi Kleen
2021-10-11 12:04       ` Michael S. Tsirkin
2021-10-11 17:35         ` Andi Kleen
2021-10-11 18:28           ` Michael S. Tsirkin
2021-10-12 17:55             ` Andi Kleen
2021-10-12 20:59               ` Michael S. Tsirkin
2021-10-12 21:18                 ` Andi Kleen
2021-10-12 21:30                   ` Michael S. Tsirkin
2021-10-15  5:50                     ` Andi Kleen
2021-10-15  6:57                       ` Michael S. Tsirkin
2021-10-15 13:34                         ` Andi Kleen
2021-10-17 22:34                           ` Michael S. Tsirkin

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