From: Md Sadre Alam <quic_mdalam@quicinc.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: <andersson@kernel.org>, <konrad.dybcio@linaro.org>,
<broonie@kernel.org>, <robh@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
<richard@nod.at>, <vigneshr@ti.com>,
<manivannan.sadhasivam@linaro.org>, <neil.armstrong@linaro.org>,
<daniel@makrotopia.org>, <arnd@arndb.de>,
<chris.packham@alliedtelesis.co.nz>,
<christophe.kerello@foss.st.com>, <linux-arm-msm@vger.kernel.org>,
<linux-spi@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-mtd@lists.infradead.org>,
<quic_srichara@quicinc.com>, <quic_varada@quicinc.com>
Subject: Re: [PATCH v4 2/5] drivers: mtd: nand: Add qpic_common API file
Date: Tue, 19 Mar 2024 17:46:05 +0530 [thread overview]
Message-ID: <756ccc79-0077-5c23-73e3-bbb82fbfa8b0@quicinc.com> (raw)
In-Reply-To: <20240319114316.4b977d93@xps-13>
On 3/19/2024 4:13 PM, Miquel Raynal wrote:
> Hi,
>
>>>> +/**
>>>> + * qcom_offset_to_nandc_reg() - Get the actual offset
>>>> + * @regs: pointer to nandc_reg structure
>>>> + * @offset: register offset
>>>> + *
>>>> + * This function will reurn the actual offset for qpic controller register
>>>> + */
>>>> +__le32 *qcom_offset_to_nandc_reg(struct nandc_regs *regs, int offset)
>>>> +{
>>>> + switch (offset) {
>>>> + case NAND_FLASH_CMD:
>>>> + return ®s->cmd;
>>>> + case NAND_ADDR0:
>>>> + return ®s->addr0;
>>>> + case NAND_ADDR1:
>>>> + return ®s->addr1;
>>>> + case NAND_FLASH_CHIP_SELECT:
>>>> + return ®s->chip_sel;
>>>> + case NAND_EXEC_CMD:
>>>> + return ®s->exec;
>>>> + case NAND_FLASH_STATUS:
>>>> + return ®s->clrflashstatus;
>>>> + case NAND_DEV0_CFG0:
>>>> + return ®s->cfg0;
>>>> + case NAND_DEV0_CFG1:
>>>> + return ®s->cfg1;
>>>> + case NAND_DEV0_ECC_CFG:
>>>> + return ®s->ecc_bch_cfg;
>>>> + case NAND_READ_STATUS:
>>>> + return ®s->clrreadstatus;
>>>> + case NAND_DEV_CMD1:
>>>> + return ®s->cmd1;
>>>> + case NAND_DEV_CMD1_RESTORE:
>>>> + return ®s->orig_cmd1;
>>>> + case NAND_DEV_CMD_VLD:
>>>> + return ®s->vld;
>>>> + case NAND_DEV_CMD_VLD_RESTORE:
>>>> + return ®s->orig_vld;
>>>> + case NAND_EBI2_ECC_BUF_CFG:
>>>> + return ®s->ecc_buf_cfg;
>>>> + case NAND_READ_LOCATION_0:
>>>> + return ®s->read_location0;
>>>> + case NAND_READ_LOCATION_1:
>>>> + return ®s->read_location1;
>>>> + case NAND_READ_LOCATION_2:
>>>> + return ®s->read_location2;
>>>> + case NAND_READ_LOCATION_3:
>>>> + return ®s->read_location3;
>>>> + case NAND_READ_LOCATION_LAST_CW_0:
>>>> + return ®s->read_location_last0;
>>>> + case NAND_READ_LOCATION_LAST_CW_1:
>>>> + return ®s->read_location_last1;
>>>> + case NAND_READ_LOCATION_LAST_CW_2:
>>>> + return ®s->read_location_last2;
>>>> + case NAND_READ_LOCATION_LAST_CW_3:
>>>> + return ®s->read_location_last3;
>>>
>>> Why do you need this indirection?
>>
>> This indirection I believe is needed by the write_reg_dma function,
>> wherein a bunch of registers are modified based on a starting register.
>> Can I change this in a separate cleanup series as a follow up to this?
>
> I think it would be cleaner to make the changes I requested first and
> then make a copy. I understand it is more work on your side, so if you
> really prefer you can (1) make the copy and then (2) clean it all. But
> please do it all in this series.
Ok
>
>>>> diff --git a/include/linux/mtd/nand-qpic-common.h b/include/linux/mtd/nand-qpic-common.h
>>>> new file mode 100644
>>>> index 000000000000..aced15866627
>>>> --- /dev/null
>>>> +++ b/include/linux/mtd/nand-qpic-common.h
>>>> @@ -0,0 +1,486 @@
>>>> +/* SPDX-License-Identifier: GPL-2.0 */
>>>> +/*
>>>> + * QCOM QPIC common APIs header file
>>>> + *
>>>> + * Copyright (c) 2023 Qualcomm Inc.
>>>> + * Authors: Md sadre Alam <quic_mdalam@quicinc.com>
>>>> + * Sricharan R <quic_srichara@quicinc.com>
>>>> + * Varadarajan Narayanan <quic_varada@quicinc.com>
>>>> + *
>>>> + */
>>>> +#ifndef __MTD_NAND_QPIC_COMMON_H__
>>>> +#define __MTD_NAND_QPIC_COMMON_H__
>>>> +
>>>> +#include <linux/bitops.h>
>>>> +#include <linux/clk.h>
>>>> +#include <linux/delay.h>
>>>> +#include <linux/dmaengine.h>
>>>> +#include <linux/dma-mapping.h>
>>>> +#include <linux/dma/qcom_adm.h>
>>>> +#include <linux/dma/qcom_bam_dma.h>
>>>> +#include <linux/module.h>
>>>> +#include <linux/mtd/partitions.h>
>>>> +#include <linux/mtd/rawnand.h>
>>>
>>> You really need this?
>> Yes , since some generic structure used here.
>
> Which ones? If this is a common file, you probably should not.
Since we are using this struct qcom_nand_controller { }
for both SPI nand as well as raw nand. In this we are having this
struct nand_controller controller member.
>
> Thanks,
> Miquèl
Thanks,
Alam.
next prev parent reply other threads:[~2024-03-19 12:16 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-08 9:17 [PATCH v4 0/5] Add QPIC SPI NAND driver Md Sadre Alam
2024-03-08 9:17 ` [PATCH v4 1/5] spi: dt-bindings: Introduce qcom,spi-qpic-snand Md Sadre Alam
2024-03-08 10:34 ` Krzysztof Kozlowski
2024-03-08 9:17 ` [PATCH v4 2/5] drivers: mtd: nand: Add qpic_common API file Md Sadre Alam
2024-03-15 11:45 ` Miquel Raynal
2024-03-19 10:25 ` Md Sadre Alam
2024-03-19 10:43 ` Miquel Raynal
2024-03-19 12:16 ` Md Sadre Alam [this message]
2024-03-19 13:09 ` Miquel Raynal
2024-03-20 6:34 ` Md Sadre Alam
2024-03-08 9:17 ` [PATCH v4 3/5] spi: spi-qpic: Add qpic spi nand driver support Md Sadre Alam
2024-03-15 12:08 ` Miquel Raynal
2024-03-19 10:28 ` Md Sadre Alam
2024-04-07 17:48 ` Alex G.
2024-04-07 18:40 ` Alex G.
2024-04-07 18:45 ` Alex G.
2024-04-07 18:55 ` Krzysztof Kozlowski
2024-04-07 18:54 ` Krzysztof Kozlowski
2024-04-07 18:58 ` Alex G.
2024-03-08 9:17 ` [PATCH v4 4/5] arm64: dts: qcom: ipq9574: Add SPI nand support Md Sadre Alam
2024-03-08 9:17 ` [PATCH v4 5/5] arm64: dts: qcom: ipq9574: Disable eMMC node Md Sadre Alam
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