* [PATCH v2 0/2] Add support for proxy interconnect bandwidth votes
@ 2022-05-09 7:53 Sibi Sankar
2022-05-09 7:53 ` [PATCH v2 1/2] dt-bindings: remoteproc: qcom: Add SC7280 MSS bindings Sibi Sankar
2022-05-09 7:53 ` [PATCH v2 2/2] arm64: dts: qcom: sc7280: Add proxy interconnect requirements for modem Sibi Sankar
0 siblings, 2 replies; 8+ messages in thread
From: Sibi Sankar @ 2022-05-09 7:53 UTC (permalink / raw)
To: bjorn.andersson, robh+dt
Cc: ohad, agross, mathieu.poirier, linux-arm-msm, linux-remoteproc,
devicetree, linux-kernel, evgreen, dianders, swboyd, mka,
krzysztof.kozlowski, Sibi Sankar
Add proxy interconnect bandwidth votes during modem bootup on SC7280 SoCs.
V2:
* Dropped patch 3 from version 1 [Sub with Bjorn's patch]
* Add YAML support [Krzysztof]
* Drop interconnect names [Bjorn]
Sibi Sankar (2):
dt-bindings: remoteproc: qcom: Add SC7280 MSS bindings
arm64: dts: qcom: sc7280: Add proxy interconnect requirements for
modem
.../bindings/remoteproc/qcom,sc7280-mss-pil.yaml | 261 +++++++++++++++++++++
arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 1 +
2 files changed, 262 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml
--
2.7.4
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 1/2] dt-bindings: remoteproc: qcom: Add SC7280 MSS bindings
2022-05-09 7:53 [PATCH v2 0/2] Add support for proxy interconnect bandwidth votes Sibi Sankar
@ 2022-05-09 7:53 ` Sibi Sankar
2022-05-09 12:20 ` Rob Herring
2022-05-09 19:51 ` Matthias Kaehlcke
2022-05-09 7:53 ` [PATCH v2 2/2] arm64: dts: qcom: sc7280: Add proxy interconnect requirements for modem Sibi Sankar
1 sibling, 2 replies; 8+ messages in thread
From: Sibi Sankar @ 2022-05-09 7:53 UTC (permalink / raw)
To: bjorn.andersson, robh+dt
Cc: ohad, agross, mathieu.poirier, linux-arm-msm, linux-remoteproc,
devicetree, linux-kernel, evgreen, dianders, swboyd, mka,
krzysztof.kozlowski, Sibi Sankar
Add MSS PIL loading bindings for SC7280 SoCs.
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
---
.../bindings/remoteproc/qcom,sc7280-mss-pil.yaml | 261 +++++++++++++++++++++
1 file changed, 261 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml
new file mode 100644
index 000000000000..7e7dee6208b2
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml
@@ -0,0 +1,261 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SC7280 MSS Peripheral Image Loader
+
+maintainers:
+ - Sibi Sankar <quic_sibis@quicinc.com>
+
+description:
+ This document defines the binding for a component that loads and boots firmware
+ on the Qualcomm Technology Inc. SC7280 Modem Hexagon Core.
+
+properties:
+ compatible:
+ enum:
+ - qcom,sc7280-mss-pil
+
+ reg:
+ items:
+ - description: MSS QDSP6 registers
+ - description: RMB registers
+
+ reg-names:
+ items:
+ - const: qdsp6
+ - const: rmb
+
+ iommus:
+ items:
+ - description: MSA Stream 1
+ - description: MSA Stream 2
+
+ interconnects:
+ items:
+ - description: Path leading to system memory
+
+ interrupts:
+ items:
+ - description: Watchdog interrupt
+ - description: Fatal interrupt
+ - description: Ready interrupt
+ - description: Handover interrupt
+ - description: Stop acknowledge interrupt
+ - description: Shutdown acknowledge interrupt
+
+ interrupt-names:
+ items:
+ - const: wdog
+ - const: fatal
+ - const: ready
+ - const: handover
+ - const: stop-ack
+ - const: shutdown-ack
+
+ clocks:
+ items:
+ - description: GCC MSS IFACE clock
+ - description: GCC MSS SNOC_AXI clock
+ - description: GCC MSS OFFLINE clock
+ - description: RPMH PKA clock
+ - description: RPMH XO clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: snoc_axi
+ - const: offline
+ - const: pka
+ - const: xo
+
+ power-domains:
+ items:
+ - description: CX power domain
+ - description: MSS power domain
+
+ power-domain-names:
+ items:
+ - const: cx
+ - const: mss
+
+ resets:
+ items:
+ - description: AOSS restart
+ - description: PDC SYNC
+
+ reset-names:
+ items:
+ - const: mss_restart
+ - const: pdc_sync
+
+ memory-region:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: Phandle reference to the reserved-memory for the MBA region followed
+ by the modem region.
+
+ firmware-name:
+ $ref: /schemas/types.yaml#/definitions/string
+ description:
+ The name of the firmware which should be loaded for this remote
+ processor.
+
+ qcom,halt-regs:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description:
+ Phandle reference to a syscon representing TCSR followed by the
+ four offsets within syscon for q6, modem, nc and vq6 halt registers.
+
+ qcom,ext-regs:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description:
+ Two phandle references to syscons representing TCSR_REG and TCSR register
+ space followed by the two offsets within the syscon to force_clk_en/rscc_disable
+ and axim1_clk_off/crypto_clk_off registers respectively.
+
+ qcom,qaccept-regs:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description:
+ Phandle reference to a syscon representing TCSR followed by the
+ three offsets within syscon for mdm, cx and axi qaccept registers.
+
+ qcom,qmp:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: Reference to the AOSS side-channel message RAM.
+
+ qcom,smem-states:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: States used by the AP to signal the Hexagon core
+ items:
+ - description: Stop the modem
+
+ qcom,smem-state-names:
+ $ref: /schemas/types.yaml#/definitions/string
+ description: The names of the state bits used for SMP2P output
+ const: stop
+
+ glink-edge:
+ type: object
+ description: |
+ Qualcomm G-Link subnode which represents communication edge, channels
+ and devices related to the DSP.
+
+ properties:
+ interrupts:
+ items:
+ - description: IRQ from MSS to GLINK
+
+ mboxes:
+ items:
+ - description: Mailbox for communication between APPS and MSS
+
+ label:
+ description: The names of the state bits used for SMP2P output
+ items:
+ - const: modem
+
+ qcom,remote-pid:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: ID of the shared memory used by GLINK for communication with MSS
+
+ required:
+ - interrupts
+ - mboxes
+ - label
+ - qcom,remote-pid
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - iommus
+ - interconnects
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - power-domains
+ - power-domain-names
+ - resets
+ - reset-names
+ - qcom,halt-regs
+ - qcom,ext-regs
+ - qcom,qaccept-regs
+ - memory-region
+ - qcom,qmp
+ - qcom,smem-states
+ - qcom,smem-state-names
+ - glink-edge
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-sc7280.h>
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/interconnect/qcom,sc7280.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/mailbox/qcom-ipcc.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+ #include <dt-bindings/reset/qcom,sdm845-aoss.h>
+ #include <dt-bindings/reset/qcom,sdm845-pdc.h>
+
+ remoteproc_mpss: remoteproc@4080000 {
+ compatible = "qcom,sc7280-mss-pil";
+ reg = <0x04080000 0x10000>, <0x04180000 0x48>;
+ reg-names = "qdsp6", "rmb";
+
+ iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
+
+ interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
+
+ interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+
+ interrupt-names = "wdog", "fatal", "ready", "handover",
+ "stop-ack", "shutdown-ack";
+
+ clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
+ <&gcc GCC_MSS_OFFLINE_AXI_CLK>,
+ <&gcc GCC_MSS_SNOC_AXI_CLK>,
+ <&rpmhcc RPMH_PKA_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "iface", "offline", "snoc_axi", "pka", "xo";
+
+ power-domains = <&rpmhpd SC7280_CX>,
+ <&rpmhpd SC7280_MSS>;
+ power-domain-names = "cx", "mss";
+
+ memory-region = <&mba_mem>, <&mpss_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&modem_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
+ <&pdc_reset PDC_MODEM_SYNC_RESET>;
+ reset-names = "mss_restart", "pdc_reset";
+
+ qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
+ qcom,ext-regs = <&tcsr 0x10000 0x10004 &tcsr_mutex 0x26004 0x26008>;
+ qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>;
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_MPSS
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+ label = "modem";
+ qcom,remote-pid = <1>;
+ };
+ };
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 2/2] arm64: dts: qcom: sc7280: Add proxy interconnect requirements for modem
2022-05-09 7:53 [PATCH v2 0/2] Add support for proxy interconnect bandwidth votes Sibi Sankar
2022-05-09 7:53 ` [PATCH v2 1/2] dt-bindings: remoteproc: qcom: Add SC7280 MSS bindings Sibi Sankar
@ 2022-05-09 7:53 ` Sibi Sankar
2022-05-09 19:55 ` Matthias Kaehlcke
1 sibling, 1 reply; 8+ messages in thread
From: Sibi Sankar @ 2022-05-09 7:53 UTC (permalink / raw)
To: bjorn.andersson, robh+dt
Cc: ohad, agross, mathieu.poirier, linux-arm-msm, linux-remoteproc,
devicetree, linux-kernel, evgreen, dianders, swboyd, mka,
krzysztof.kozlowski, Sibi Sankar
Add interconnects that are required to be proxy voted upon during modem
bootup on SC7280 SoCs.
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
---
v2:
* Drop incorrect interconnect names [Bjorn]
arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
index 9f4a9c263c35..91aad86cc708 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi
@@ -88,6 +88,7 @@
status = "okay";
compatible = "qcom,sc7280-mss-pil";
iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
+ interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
memory-region = <&mba_mem>, <&mpss_mem>;
};
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: remoteproc: qcom: Add SC7280 MSS bindings
2022-05-09 7:53 ` [PATCH v2 1/2] dt-bindings: remoteproc: qcom: Add SC7280 MSS bindings Sibi Sankar
@ 2022-05-09 12:20 ` Rob Herring
2022-05-09 19:19 ` Matthias Kaehlcke
2022-05-09 19:51 ` Matthias Kaehlcke
1 sibling, 1 reply; 8+ messages in thread
From: Rob Herring @ 2022-05-09 12:20 UTC (permalink / raw)
To: Sibi Sankar
Cc: mka, swboyd, linux-remoteproc, devicetree, bjorn.andersson,
robh+dt, mathieu.poirier, krzysztof.kozlowski, agross, dianders,
ohad, linux-arm-msm, linux-kernel, evgreen
On Mon, 09 May 2022 13:23:17 +0530, Sibi Sankar wrote:
> Add MSS PIL loading bindings for SC7280 SoCs.
>
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
> .../bindings/remoteproc/qcom,sc7280-mss-pil.yaml | 261 +++++++++++++++++++++
> 1 file changed, 261 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
remoteproc@4080000: clock-names:1: 'snoc_axi' was expected
arch/arm64/boot/dts/qcom/sc7280-crd.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
arch/arm64/boot/dts/qcom/sc7280-idp.dtb
remoteproc@4080000: clock-names:2: 'offline' was expected
arch/arm64/boot/dts/qcom/sc7280-crd.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
arch/arm64/boot/dts/qcom/sc7280-idp.dtb
remoteproc@4080000: 'interconnects' is a required property
arch/arm64/boot/dts/qcom/sc7280-crd.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
arch/arm64/boot/dts/qcom/sc7280-idp.dtb
remoteproc@4080000: reset-names:1: 'pdc_sync' was expected
arch/arm64/boot/dts/qcom/sc7280-crd.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
arch/arm64/boot/dts/qcom/sc7280-idp.dtb
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: remoteproc: qcom: Add SC7280 MSS bindings
2022-05-09 12:20 ` Rob Herring
@ 2022-05-09 19:19 ` Matthias Kaehlcke
2022-05-10 11:06 ` Sibi Sankar
0 siblings, 1 reply; 8+ messages in thread
From: Matthias Kaehlcke @ 2022-05-09 19:19 UTC (permalink / raw)
To: Rob Herring
Cc: Sibi Sankar, swboyd, linux-remoteproc, devicetree,
bjorn.andersson, robh+dt, mathieu.poirier, krzysztof.kozlowski,
agross, dianders, ohad, linux-arm-msm, linux-kernel, evgreen
On Mon, May 09, 2022 at 07:20:58AM -0500, Rob Herring wrote:
> On Mon, 09 May 2022 13:23:17 +0530, Sibi Sankar wrote:
> > Add MSS PIL loading bindings for SC7280 SoCs.
> >
> > Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> > ---
> > .../bindings/remoteproc/qcom,sc7280-mss-pil.yaml | 261 +++++++++++++++++++++
> > 1 file changed, 261 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml
> >
>
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
>
> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> This will change in the future.
>
> Full log is available here: https://patchwork.ozlabs.org/patch/
The culprit is this snippet in arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi:
/* Modem setup is different on Chrome setups than typical Qualcomm setup */
&remoteproc_mpss {
status = "okay";
compatible = "qcom,sc7280-mss-pil";
iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
memory-region = <&mba_mem>, <&mpss_mem>;
};
The original compatible string from sc7280.dtsi is 'qcom,sc7280-mpss-pas'.
> remoteproc@4080000: clock-names:1: 'snoc_axi' was expected
> arch/arm64/boot/dts/qcom/sc7280-crd.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp.dtb
>
> remoteproc@4080000: clock-names:2: 'offline' was expected
> arch/arm64/boot/dts/qcom/sc7280-crd.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp.dtb
The fix probably consists in adding overrides for 'clocks' and
'clock-names' to the extension in sc7280-chrome-common.dtsi, unless
we add a dedicated 'qcom,sc7280-mss-pil' node to sc7280.dtsi. This
can be done once the binding landed.
> remoteproc@4080000: 'interconnects' is a required property
> arch/arm64/boot/dts/qcom/sc7280-crd.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp.dtb
This can be fixed by adding an 'interconnects' to either the
extension in sc7280-chrome-common.dtsi, or the original node if
'qcom,sc7280-mpss-pas' uses the same interconnect.
> remoteproc@4080000: reset-names:1: 'pdc_sync' was expected
> arch/arm64/boot/dts/qcom/sc7280-crd.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
> arch/arm64/boot/dts/qcom/sc7280-idp.dtb
>
This could be fixed by aligning the reset names of the
'qcom,sc7280-mpss-pas' and 'qcom,sc7280-mss-pil' bindings.
The reset is called 'pdc_reset' for 'mpss-pas', and 'pdc_sync'
for 'mpss-pil'.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: remoteproc: qcom: Add SC7280 MSS bindings
2022-05-09 7:53 ` [PATCH v2 1/2] dt-bindings: remoteproc: qcom: Add SC7280 MSS bindings Sibi Sankar
2022-05-09 12:20 ` Rob Herring
@ 2022-05-09 19:51 ` Matthias Kaehlcke
1 sibling, 0 replies; 8+ messages in thread
From: Matthias Kaehlcke @ 2022-05-09 19:51 UTC (permalink / raw)
To: Sibi Sankar
Cc: bjorn.andersson, robh+dt, ohad, agross, mathieu.poirier,
linux-arm-msm, linux-remoteproc, devicetree, linux-kernel,
evgreen, dianders, swboyd, krzysztof.kozlowski
On Mon, May 09, 2022 at 01:23:17PM +0530, Sibi Sankar wrote:
> Add MSS PIL loading bindings for SC7280 SoCs.
>
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
> .../bindings/remoteproc/qcom,sc7280-mss-pil.yaml | 261 +++++++++++++++++++++
> 1 file changed, 261 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml
>
> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml
> new file mode 100644
> index 000000000000..7e7dee6208b2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml
> @@ -0,0 +1,261 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm SC7280 MSS Peripheral Image Loader
> +
> +maintainers:
> + - Sibi Sankar <quic_sibis@quicinc.com>
> +
> +description:
> + This document defines the binding for a component that loads and boots firmware
> + on the Qualcomm Technology Inc. SC7280 Modem Hexagon Core.
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,sc7280-mss-pil
> +
> + reg:
> + items:
> + - description: MSS QDSP6 registers
> + - description: RMB registers
> +
> + reg-names:
> + items:
> + - const: qdsp6
> + - const: rmb
> +
> + iommus:
> + items:
> + - description: MSA Stream 1
> + - description: MSA Stream 2
> +
> + interconnects:
> + items:
> + - description: Path leading to system memory
> +
> + interrupts:
> + items:
> + - description: Watchdog interrupt
> + - description: Fatal interrupt
> + - description: Ready interrupt
> + - description: Handover interrupt
> + - description: Stop acknowledge interrupt
> + - description: Shutdown acknowledge interrupt
> +
> + interrupt-names:
> + items:
> + - const: wdog
> + - const: fatal
> + - const: ready
> + - const: handover
> + - const: stop-ack
> + - const: shutdown-ack
> +
> + clocks:
> + items:
> + - description: GCC MSS IFACE clock
> + - description: GCC MSS SNOC_AXI clock
> + - description: GCC MSS OFFLINE clock
> + - description: RPMH PKA clock
> + - description: RPMH XO clock
> +
> + clock-names:
> + items:
> + - const: iface
> + - const: snoc_axi
> + - const: offline
> + - const: pka
> + - const: xo
> +
> + power-domains:
> + items:
> + - description: CX power domain
> + - description: MSS power domain
> +
> + power-domain-names:
> + items:
> + - const: cx
> + - const: mss
> +
> + resets:
> + items:
> + - description: AOSS restart
> + - description: PDC SYNC
> +
> + reset-names:
> + items:
> + - const: mss_restart
> + - const: pdc_sync
> +
> + memory-region:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description: Phandle reference to the reserved-memory for the MBA region followed
> + by the modem region.
> +
> + firmware-name:
> + $ref: /schemas/types.yaml#/definitions/string
> + description:
> + The name of the firmware which should be loaded for this remote
> + processor.
> +
> + qcom,halt-regs:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + Phandle reference to a syscon representing TCSR followed by the
> + four offsets within syscon for q6, modem, nc and vq6 halt registers.
> +
> + qcom,ext-regs:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + Two phandle references to syscons representing TCSR_REG and TCSR register
> + space followed by the two offsets within the syscon to force_clk_en/rscc_disable
> + and axim1_clk_off/crypto_clk_off registers respectively.
> +
> + qcom,qaccept-regs:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + Phandle reference to a syscon representing TCSR followed by the
> + three offsets within syscon for mdm, cx and axi qaccept registers.
> +
> + qcom,qmp:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: Reference to the AOSS side-channel message RAM.
> +
> + qcom,smem-states:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description: States used by the AP to signal the Hexagon core
> + items:
> + - description: Stop the modem
> +
> + qcom,smem-state-names:
> + $ref: /schemas/types.yaml#/definitions/string
> + description: The names of the state bits used for SMP2P output
> + const: stop
> +
> + glink-edge:
> + type: object
> + description: |
> + Qualcomm G-Link subnode which represents communication edge, channels
> + and devices related to the DSP.
> +
> + properties:
> + interrupts:
> + items:
> + - description: IRQ from MSS to GLINK
> +
> + mboxes:
> + items:
> + - description: Mailbox for communication between APPS and MSS
> +
> + label:
> + description: The names of the state bits used for SMP2P output
> + items:
> + - const: modem
> +
> + qcom,remote-pid:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: ID of the shared memory used by GLINK for communication with MSS
> +
> + required:
> + - interrupts
> + - mboxes
> + - label
> + - qcom,remote-pid
> +
> + additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - iommus
> + - interconnects
> + - interrupts
> + - interrupt-names
> + - clocks
> + - clock-names
> + - power-domains
> + - power-domain-names
> + - resets
> + - reset-names
> + - qcom,halt-regs
> + - qcom,ext-regs
> + - qcom,qaccept-regs
> + - memory-region
> + - qcom,qmp
> + - qcom,smem-states
> + - qcom,smem-state-names
> + - glink-edge
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,gcc-sc7280.h>
> + #include <dt-bindings/clock/qcom,rpmh.h>
> + #include <dt-bindings/interconnect/qcom,sc7280.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/mailbox/qcom-ipcc.h>
> + #include <dt-bindings/power/qcom-rpmpd.h>
> + #include <dt-bindings/reset/qcom,sdm845-aoss.h>
> + #include <dt-bindings/reset/qcom,sdm845-pdc.h>
> +
> + remoteproc_mpss: remoteproc@4080000 {
> + compatible = "qcom,sc7280-mss-pil";
> + reg = <0x04080000 0x10000>, <0x04180000 0x48>;
> + reg-names = "qdsp6", "rmb";
> +
> + iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
> +
> + interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
> +
> + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
> + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
> + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
> + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
> + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
> + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
> +
> + interrupt-names = "wdog", "fatal", "ready", "handover",
> + "stop-ack", "shutdown-ack";
> +
> + clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
> + <&gcc GCC_MSS_OFFLINE_AXI_CLK>,
> + <&gcc GCC_MSS_SNOC_AXI_CLK>,
> + <&rpmhcc RPMH_PKA_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "iface", "offline", "snoc_axi", "pka", "xo";
Shouldn't these be in the same order as specified in the binding?
i.e.:
> + clock-names:
> + items:
> + - const: iface
> + - const: snoc_axi
> + - const: offline
> + - const: pka
> + - const: xo
> +
> + power-domains = <&rpmhpd SC7280_CX>,
> + <&rpmhpd SC7280_MSS>;
> + power-domain-names = "cx", "mss";
> +
> + memory-region = <&mba_mem>, <&mpss_mem>;
> +
> + qcom,qmp = <&aoss_qmp>;
> +
> + qcom,smem-states = <&modem_smp2p_out 0>;
> + qcom,smem-state-names = "stop";
> +
> + resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
> + <&pdc_reset PDC_MODEM_SYNC_RESET>;
> + reset-names = "mss_restart", "pdc_reset";
The binding calls the second reset 'pdc_sync':
> + reset-names:
> + items:
> + - const: mss_restart
> + - const: pdc_sync
The driver looks for 'pdc_reset', so I guess the binding needs to be updated.
> +
> + qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
> + qcom,ext-regs = <&tcsr 0x10000 0x10004 &tcsr_mutex 0x26004 0x26008>;
> + qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>;
> +
> + glink-edge {
> + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
> + IPCC_MPROC_SIGNAL_GLINK_QMP
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_MPSS
> + IPCC_MPROC_SIGNAL_GLINK_QMP>;
> + label = "modem";
> + qcom,remote-pid = <1>;
> + };
> + };
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 2/2] arm64: dts: qcom: sc7280: Add proxy interconnect requirements for modem
2022-05-09 7:53 ` [PATCH v2 2/2] arm64: dts: qcom: sc7280: Add proxy interconnect requirements for modem Sibi Sankar
@ 2022-05-09 19:55 ` Matthias Kaehlcke
0 siblings, 0 replies; 8+ messages in thread
From: Matthias Kaehlcke @ 2022-05-09 19:55 UTC (permalink / raw)
To: Sibi Sankar
Cc: bjorn.andersson, robh+dt, ohad, agross, mathieu.poirier,
linux-arm-msm, linux-remoteproc, devicetree, linux-kernel,
evgreen, dianders, swboyd, krzysztof.kozlowski
On Mon, May 09, 2022 at 01:23:18PM +0530, Sibi Sankar wrote:
> Add interconnects that are required to be proxy voted upon during modem
> bootup on SC7280 SoCs.
>
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/2] dt-bindings: remoteproc: qcom: Add SC7280 MSS bindings
2022-05-09 19:19 ` Matthias Kaehlcke
@ 2022-05-10 11:06 ` Sibi Sankar
0 siblings, 0 replies; 8+ messages in thread
From: Sibi Sankar @ 2022-05-10 11:06 UTC (permalink / raw)
To: Matthias Kaehlcke, Rob Herring
Cc: swboyd, linux-remoteproc, devicetree, bjorn.andersson, robh+dt,
mathieu.poirier, krzysztof.kozlowski, agross, dianders, ohad,
linux-arm-msm, linux-kernel, evgreen
Hey Matthias,
Thanks for taking time to review the series.
I'll re-order the clock names in the bindings and fix the pdc_sync typo
in the next re-spin. The interconnects missing warnings should go away
since patch 2 adds it.
-Sibi
On 5/10/22 12:49 AM, Matthias Kaehlcke wrote:
> On Mon, May 09, 2022 at 07:20:58AM -0500, Rob Herring wrote:
>> On Mon, 09 May 2022 13:23:17 +0530, Sibi Sankar wrote:
>>> Add MSS PIL loading bindings for SC7280 SoCs.
>>>
>>> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
>>> ---
>>> .../bindings/remoteproc/qcom,sc7280-mss-pil.yaml | 261 +++++++++++++++++++++
>>> 1 file changed, 261 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml
>>>
>>
>> Running 'make dtbs_check' with the schema in this patch gives the
>> following warnings. Consider if they are expected or the schema is
>> incorrect. These may not be new warnings.
>>
>> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
>> This will change in the future.
>>
>> Full log is available here: https://patchwork.ozlabs.org/patch/
>
> The culprit is this snippet in arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi:
>
> /* Modem setup is different on Chrome setups than typical Qualcomm setup */
> &remoteproc_mpss {
> status = "okay";
> compatible = "qcom,sc7280-mss-pil";
> iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
> memory-region = <&mba_mem>, <&mpss_mem>;
> };
>
> The original compatible string from sc7280.dtsi is 'qcom,sc7280-mpss-pas'.
>
>> remoteproc@4080000: clock-names:1: 'snoc_axi' was expected
>> arch/arm64/boot/dts/qcom/sc7280-crd.dtb
>> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
>> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
>> arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
>> arch/arm64/boot/dts/qcom/sc7280-idp.dtb
>>
>> remoteproc@4080000: clock-names:2: 'offline' was expected
>> arch/arm64/boot/dts/qcom/sc7280-crd.dtb
>> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
>> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
>> arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
>> arch/arm64/boot/dts/qcom/sc7280-idp.dtb
>
> The fix probably consists in adding overrides for 'clocks' and
> 'clock-names' to the extension in sc7280-chrome-common.dtsi, unless
> we add a dedicated 'qcom,sc7280-mss-pil' node to sc7280.dtsi. This
> can be done once the binding landed.
>
>> remoteproc@4080000: 'interconnects' is a required property
>> arch/arm64/boot/dts/qcom/sc7280-crd.dtb
>> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
>> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
>> arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
>> arch/arm64/boot/dts/qcom/sc7280-idp.dtb
>
> This can be fixed by adding an 'interconnects' to either the
> extension in sc7280-chrome-common.dtsi, or the original node if
> 'qcom,sc7280-mpss-pas' uses the same interconnect.
>
>> remoteproc@4080000: reset-names:1: 'pdc_sync' was expected
>> arch/arm64/boot/dts/qcom/sc7280-crd.dtb
>> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dtb
>> arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb
>> arch/arm64/boot/dts/qcom/sc7280-idp2.dtb
>> arch/arm64/boot/dts/qcom/sc7280-idp.dtb
>>
>
> This could be fixed by aligning the reset names of the
> 'qcom,sc7280-mpss-pas' and 'qcom,sc7280-mss-pil' bindings.
> The reset is called 'pdc_reset' for 'mpss-pas', and 'pdc_sync'
> for 'mpss-pil'.
>
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-05-10 11:06 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-09 7:53 [PATCH v2 0/2] Add support for proxy interconnect bandwidth votes Sibi Sankar
2022-05-09 7:53 ` [PATCH v2 1/2] dt-bindings: remoteproc: qcom: Add SC7280 MSS bindings Sibi Sankar
2022-05-09 12:20 ` Rob Herring
2022-05-09 19:19 ` Matthias Kaehlcke
2022-05-10 11:06 ` Sibi Sankar
2022-05-09 19:51 ` Matthias Kaehlcke
2022-05-09 7:53 ` [PATCH v2 2/2] arm64: dts: qcom: sc7280: Add proxy interconnect requirements for modem Sibi Sankar
2022-05-09 19:55 ` Matthias Kaehlcke
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