[RESEND PATCHv2] arm64: defconfig: enable fpga and service layer

[RESEND PATCHv2] arm64: defconfig: enable fpga and service layer

[richard.gong]

From: Richard Gong <richard.gong@intel.com>

Enable FPGA framework, Intel Stratix10 SoC FPGA manager, Stratix10
service layer, and Altera Freeze Bridge drivers.

Intel Stratix10 service layer driver was added with commit 7ca5ce896524
("firmware: add Intel Stratix10 service layer driver").

Intel Stratix10 service layer provides kernel APIs for drivers to request
access to the secure features. Such features include FPGA programming,
remote status update, and read and write secure registers.

While clients of the service layer can be built as modules, the service
layer itself has to be configured as built-in.  The service layer is
dependent on ARCH_STRATIX10.

Enabling Altera Freeze Bridge depends on commit 38cd7ad5bd25
("fpga: altera_freeze_bridge: remove restriction to socfpga").

Signed-off-by: Richard Gong <richard.gong@intel.com>
---
v2: add to enable FPGA framework, Intel Stratix10 SoC FPGA manager and
    Altera freeze bridge drivers.
---
 arch/arm64/configs/defconfig | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 931429d9..96c52f4 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -733,6 +733,13 @@ CONFIG_QCOM_QFPROM=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_UNIPHIER_EFUSE=y
 CONFIG_MESON_EFUSE=m
+CONFIG_INTEL_STRATIX10_SERVICE=y
+CONFIG_FPGA=m
+CONFIG_FPGA_MGR_STRATIX10_SOC=m
+CONFIG_FPGA_BRIDGE=m
+CONFIG_ALTERA_FREEZE_BRIDGE=m
+CONFIG_FPGA_REGION=m
+CONFIG_OF_FPGA_REGION=m
 CONFIG_TEE=y
 CONFIG_OPTEE=y
 CONFIG_EXT2_FS=y
-- 
2.7.4

Re: [RESEND PATCHv2] arm64: defconfig: enable fpga and service layer

[Dinh Nguyen]

Hi Richard,

On 2/19/19 9:24 AM, richard.gong@linux.intel.com wrote:
> From: Richard Gong <richard.gong@intel.com>
> 
> Enable FPGA framework, Intel Stratix10 SoC FPGA manager, Stratix10
> service layer, and Altera Freeze Bridge drivers.
> 
> Intel Stratix10 service layer driver was added with commit 7ca5ce896524
> ("firmware: add Intel Stratix10 service layer driver").
> 
> Intel Stratix10 service layer provides kernel APIs for drivers to request
> access to the secure features. Such features include FPGA programming,
> remote status update, and read and write secure registers.
> 
> While clients of the service layer can be built as modules, the service
> layer itself has to be configured as built-in.  The service layer is
> dependent on ARCH_STRATIX10.
> 
> Enabling Altera Freeze Bridge depends on commit 38cd7ad5bd25
> ("fpga: altera_freeze_bridge: remove restriction to socfpga").
> 
> Signed-off-by: Richard Gong <richard.gong@intel.com>
> ---
> v2: add to enable FPGA framework, Intel Stratix10 SoC FPGA manager and
>     Altera freeze bridge drivers.
> ---
>  arch/arm64/configs/defconfig | 7 +++++++
>  1 file changed, 7 insertions(+)
> 

I've made a change to this patch and applied it.

Thanks,
Dinh
---
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 2b8c479d88bb..74b6cadde31c 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -84,6 +84,7 @@ CONFIG_ARM_SCPI_CPUFREQ=y
 CONFIG_ARM_TEGRA186_CPUFREQ=y
 CONFIG_ARM_SCPI_PROTOCOL=y
 CONFIG_RASPBERRYPI_FIRMWARE=y
+CONFIG_INTEL_STRATIX10_SERVICE=y
 CONFIG_TI_SCI_PROTOCOL=y
 CONFIG_EFI_CAPSULE_LOADER=y
 CONFIG_IMX_SCU=y
@@ -736,6 +737,12 @@ CONFIG_QCOM_QFPROM=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_UNIPHIER_EFUSE=y
 CONFIG_MESON_EFUSE=m
+CONFIG_FPGA=y
+CONFIG_FPGA_MGR_STRATIX10_SOC=m
+CONFIG_FPGA_BRIDGE=m
+CONFIG_ALTERA_FREEZE_BRIDGE=m
+CONFIG_FPGA_REGION=m
+CONFIG_OF_FPGA_REGION=m
 CONFIG_TEE=y
 CONFIG_OPTEE=y
 CONFIG_EXT2_FS=y