From: Mylene Josserand <mylene.josserand@collabora.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
"open list:ARM/Rockchip SoC..."
<linux-rockchip@lists.infradead.org>,
linux-clk <linux-clk@vger.kernel.org>,
Collabora Kernel ML <kernel@collabora.com>,
kever.yang@rock-chips.com
Subject: Re: [PATCH v2 2/2] clk: rockchip: rk3288: Handle clock tree for rk3288w
Date: Thu, 2 Apr 2020 08:35:05 +0200 [thread overview]
Message-ID: <7c21a7d6-a24f-dbc6-4eaa-548ddfc0f73e@collabora.com> (raw)
In-Reply-To: <CAMuHMdXvFOKqmZ-MLJV4SAeLN-PDzqPvMvbVpcD=jyip9tbdnA@mail.gmail.com>
Hi Geert,
On 4/1/20 6:56 PM, Geert Uytterhoeven wrote:
> Hi Mylène,
>
> On Wed, Apr 1, 2020 at 5:35 PM Mylène Josserand
> <mylene.josserand@collabora.com> wrote:
>> The revision rk3288w has a different clock tree about
>> "hclk_vio" clock, according to the BSP kernel code.
>>
>> This patch handles this difference by detecting which SOC it is
>> and creating the div accordingly. Because we are using
>> soc_device_match function, we need to delay the registration
>> of this clock later than others to have time to get SoC revision.
>>
>> Otherwise, because of CLK_OF_DECLARE uses, clock tree will be
>> created too soon to have time to detect SoC's revision.
>>
>> Signed-off-by: Mylène Josserand <mylene.josserand@collabora.com>
>
> Thanks for your patch!
Thanks for your review!
>
>> --- a/drivers/clk/rockchip/clk-rk3288.c
>> +++ b/drivers/clk/rockchip/clk-rk3288.c
>> @@ -914,10 +923,15 @@ static struct syscore_ops rk3288_clk_syscore_ops = {
>> .resume = rk3288_clk_resume,
>> };
>>
>> +static const struct soc_device_attribute rk3288w[] = {
>> + { .soc_id = "RK32xx", .revision = "RK3288w" },
>> + { /* sentinel */ }
>> +};
>> +
>> +static struct rockchip_clk_provider *ctx;
>> +
>> static void __init rk3288_clk_init(struct device_node *np)
>> {
>> - struct rockchip_clk_provider *ctx;
>> -
>> rk3288_cru_base = of_iomap(np, 0);
>> if (!rk3288_cru_base) {
>> pr_err("%s: could not map cru region\n", __func__);
>> @@ -955,3 +969,17 @@ static void __init rk3288_clk_init(struct device_node *np)
>> rockchip_clk_of_add_provider(np, ctx);
>> }
>> CLK_OF_DECLARE(rk3288_cru, "rockchip,rk3288-cru", rk3288_clk_init);
>> +
>> +static int __init rk3288_hclkvio_register(void)
>> +{
>
> This function will always be called, even when running a (multi-platform)
> kernel on a non-rk3288 platform. So you need some protection against
> that.
erg, good point, I didn't think about that.
>
>> + /* Check for the rk3288w revision as clock tree is different */
>> + if (soc_device_match(rk3288w))
>> + rockchip_clk_register_branches(ctx, rk3288w_hclkvio_branch,
>> + ARRAY_SIZE(rk3288w_hclkvio_branch));
>> + else
>> + rockchip_clk_register_branches(ctx, rk3288_hclkvio_branch,
>> + ARRAY_SIZE(rk3288_hclkvio_branch));
>
> Note that soc_device_match() returns a struct soc_device_attribute
> pointer. If you would store the rockchip_clk_branch array pointer and
> size in rk3288w[...].data (i.e. a pointer to a struct containing that
> info), for both the r83288w and normal rk3288 variants, you could
> simplify this to:
>
> attr = soc_device_match(rk3288w);
> if (attr) {
> struct rk3288_branch_array *p = attr->data;
> rockchip_clk_register_branches(ctx, p->branches, p->len);
> }
>
> That would handle the not-running-on-rk3288 issue as well.
Nice, thank you for the explanation and the code, very useful :)
Best regards,
Mylène
prev parent reply other threads:[~2020-04-02 6:35 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-01 15:35 [PATCH v2 0/2] ARM: Add Rockchip rk3288w support Mylène Josserand
2020-04-01 15:35 ` [PATCH v2 1/2] soc: rockchip: Register a soc_device to retrieve revision Mylène Josserand
2020-04-01 16:34 ` Heiko Stübner
2020-04-02 6:31 ` Mylene Josserand
2020-04-02 11:45 ` Robin Murphy
2020-04-02 14:14 ` Heiko Stübner
2020-04-01 15:35 ` [PATCH v2 2/2] clk: rockchip: rk3288: Handle clock tree for rk3288w Mylène Josserand
2020-04-01 16:56 ` Geert Uytterhoeven
2020-04-02 6:35 ` Mylene Josserand [this message]
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