Re: [PATCH] x86: Prefer MWAIT over HALT on AMD processors

[Dave Hansen <dave.hansen@intel.com>]

On 4/5/22 07:07, Peter Zijlstra wrote:
> On Tue, Apr 05, 2022 at 06:30:21PM +0530, Wyes Karny wrote:
>> +static inline bool early_mwait_supported(const struct cpuinfo_x86 *c)
>> +{
>> +	if (c->x86_vendor == X86_VENDOR_INTEL)
>> +		return true;
>> +
>> +	if (c->x86_vendor == X86_VENDOR_AMD && cpu_has(c, X86_FEATURE_ZEN))
> What about Hygon? For some reason you guys don't co-ordinate and we end
> up getting endless 'make-same' patches, sometimes separated by years :/

Believe it or not Hygon seems to work OK with this because:

> static void init_hygon(struct cpuinfo_x86 *c)
> {
...
>         set_cpu_cap(c, X86_FEATURE_ZEN);

I do worry a bit though that using X86_FEATURE_ZEN is going to bite us
long-term.  It currently claims to be set for "family 0x17 or above":

> #define X86_FEATURE_ZEN                 ( 7*32+28) /* "" CPU is AMD family 0x17 or above (Zen) */

But then it goes and gets used in side-channel defense:

>         if (!static_cpu_has(X86_FEATURE_ZEN)) {
>                 msr |= ssbd_tif_to_amd_ls_cfg(tifn);
>                 wrmsrl(MSR_AMD64_LS_CFG, msr);
>                 return;
>         }

This seem _bit_ at odds with the commit message (and the AMD SSBD
whitepaper):

>     Add the necessary synchronization logic for AMD family 17H. 

So, is X86_FEATURE_ZEN for family==0x17, or family>=0x17?