From: Scott Wood <oss@buserror.net>
To: yingjie_bai@126.com, Kumar Gala <galak@kernel.crashing.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
Bai Yingjie <byj.tea@gmail.com>
Subject: Re: [PATCH] powerpc/mpc85xx: also write addr_h to spin table for 64bit boot entry
Date: Thu, 19 Dec 2019 17:54:24 -0600 [thread overview]
Message-ID: <7f0bd277632942acbdc0c41c6cd149d8543c2b3e.camel@buserror.net> (raw)
In-Reply-To: <1574694943-7883-1-git-send-email-yingjie_bai@126.com>
On Mon, 2019-11-25 at 23:15 +0800, yingjie_bai@126.com wrote:
> From: Bai Yingjie <byj.tea@gmail.com>
>
> CPU like P4080 has 36bit physical address, its DDR physical
> start address can be configured above 4G by LAW registers.
>
> For such systems in which their physical memory start address was
> configured higher than 4G, we need also to write addr_h into the spin
> table of the target secondary CPU, so that addr_h and addr_l together
> represent a 64bit physical address.
> Otherwise the secondary core can not get correct entry to start from.
>
> This should do no harm for normal case where addr_h is all 0.
>
> Signed-off-by: Bai Yingjie <byj.tea@gmail.com>
> ---
> arch/powerpc/platforms/85xx/smp.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
Acked-by: Scott Wood <oss@buserror.net>
-Scott
next prev parent reply other threads:[~2019-12-19 23:56 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-25 15:15 [PATCH] powerpc/mpc85xx: also write addr_h to spin table for 64bit boot entry yingjie_bai
2019-12-19 23:54 ` Scott Wood [this message]
2019-12-22 9:38 ` Michael Ellerman
2019-12-24 1:35 ` Yingjie Bai
2019-12-25 1:23 ` Scott Wood
2019-12-25 3:24 ` Yingjie Bai
2019-12-25 6:51 ` Scott Wood
2019-12-25 7:19 ` Yingjie Bai
2019-12-30 7:41 ` Yingjie Bai
2020-01-06 5:38 ` Yingjie Bai
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