From: Yingjie Bai <byj.tea@gmail.com>
To: Michael Ellerman <mpe@ellerman.id.au>
Cc: yingjie_bai@126.com, Scott Wood <oss@buserror.net>,
Kumar Gala <galak@kernel.crashing.org>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] powerpc/mpc85xx: also write addr_h to spin table for 64bit boot entry
Date: Tue, 24 Dec 2019 09:35:16 +0800 [thread overview]
Message-ID: <CAFAt38F-YQUVNXEnLut0tMivYUy_OTK7G4wAHfddcmncsEpREQ@mail.gmail.com> (raw)
In-Reply-To: <87pngglmxg.fsf@mpe.ellerman.id.au>
Hi Michael,
Thanks for pointing out the issue. My mistake...
This patch should indeed make sense only when
CONFIG_PHYS_64BIT=y
I could not find corenet32_smp_defconfig, but I guess in your config,
CONFIG_PHYS_64BIT=n ?
I will update the patch later today
On Sun, Dec 22, 2019 at 5:38 PM Michael Ellerman <mpe@ellerman.id.au> wrote:
>
> yingjie_bai@126.com writes:
> > From: Bai Yingjie <byj.tea@gmail.com>
> >
> > CPU like P4080 has 36bit physical address, its DDR physical
> > start address can be configured above 4G by LAW registers.
> >
> > For such systems in which their physical memory start address was
> > configured higher than 4G, we need also to write addr_h into the spin
> > table of the target secondary CPU, so that addr_h and addr_l together
> > represent a 64bit physical address.
> > Otherwise the secondary core can not get correct entry to start from.
> >
> > This should do no harm for normal case where addr_h is all 0.
> >
> > Signed-off-by: Bai Yingjie <byj.tea@gmail.com>
> > ---
> > arch/powerpc/platforms/85xx/smp.c | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
> > index 8c7ea2486bc0..f12cdd1e80ff 100644
> > --- a/arch/powerpc/platforms/85xx/smp.c
> > +++ b/arch/powerpc/platforms/85xx/smp.c
> > @@ -252,6 +252,14 @@ static int smp_85xx_start_cpu(int cpu)
> > out_be64((u64 *)(&spin_table->addr_h),
> > __pa(ppc_function_entry(generic_secondary_smp_init)));
> > #else
> > + /*
> > + * We need also to write addr_h to spin table for systems
> > + * in which their physical memory start address was configured
> > + * to above 4G, otherwise the secondary core can not get
> > + * correct entry to start from.
> > + * This does no harm for normal case where addr_h is all 0.
> > + */
> > + out_be32(&spin_table->addr_h, __pa(__early_start) >> 32);
> > out_be32(&spin_table->addr_l, __pa(__early_start));
>
> This breaks the corenet32_smp_defconfig build:
>
> /linux/arch/powerpc/platforms/85xx/smp.c: In function 'smp_85xx_start_cpu':
> /linux/arch/powerpc/platforms/85xx/smp.c:262:52: error: right shift count >= width of type [-Werror=shift-count-overflow]
> 262 | out_be32(&spin_table->addr_h, __pa(__early_start) >> 32);
> | ^~
> cc1: all warnings being treated as errors
>
> cheers
next prev parent reply other threads:[~2019-12-24 1:35 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-25 15:15 [PATCH] powerpc/mpc85xx: also write addr_h to spin table for 64bit boot entry yingjie_bai
2019-12-19 23:54 ` Scott Wood
2019-12-22 9:38 ` Michael Ellerman
2019-12-24 1:35 ` Yingjie Bai [this message]
2019-12-25 1:23 ` Scott Wood
2019-12-25 3:24 ` Yingjie Bai
2019-12-25 6:51 ` Scott Wood
2019-12-25 7:19 ` Yingjie Bai
2019-12-30 7:41 ` Yingjie Bai
2020-01-06 5:38 ` Yingjie Bai
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