[PATCH v2 0/9] openrisc: Misc fixes from backlog

[PATCH v2 0/9] openrisc: Misc fixes from backlog

[Stafford Horne]

Hello,

This patch is a small set of fixes from the openrisc backlog. These
changes fix several issues with the openrisc build on modern tool chains
and address other issues which have cropped up as the kernel has been
getting updated.

Consider for Pull:

The following changes since commit a25f0944ba9b1d8a6813fd6f1a86f1bd59ac25a6:

  Linux 4.9-rc5 (2016-11-13 10:32:32 -0800)

are available in the git repository at:

  https://github.com/stffrdhrn/linux.git tags/or1k-fixes-4.9

for you to fetch changes up to a9fae5563e34217ff99efafde7e7bf607a5d5ec6:

  openrisc: include l.swa in check for write data pagefault (2016-11-14 21:58:33 +0900)

Regards,
 Stafford

Changes since V1:
 - Removed SMP option patch and replaced with NR_CPUS default value
 - Removed Apply transparent_union on semun patch as its handled by libc
 - Added memblock patch as suggested by Jonas
 - Added MAINTAINERS patch as suggested by Guenter
 - Added l.swa patch as its needed to fix musl programs
 - Improved commit message on rt_sigreturn patch

Christian Svensson (1):
  openrisc: Add thread-local storage (TLS) support

Guenter Roeck (1):
  openrisc: Support both old (or32) and new (or1k) toolchain

Jonas Bonn (1):
  openrisc: restore all regs on rt_sigreturn

Rob Herring (1):
  openrisc: remove the redundant of_platform_populate

Stafford Horne (3):
  openrisc: add NR_CPUS Kconfig default value
  openrisc: Consolidate setup to use memblock instead of bootmem
  openrisc: Updates after openrisc.net has been lost

Stefan Kristiansson (2):
  openrisc: fix PTRS_PER_PGD define
  openrisc: include l.swa in check for write data pagefault

 MAINTAINERS                         |  6 +++--
 arch/openrisc/Kconfig               |  4 ++++
 arch/openrisc/README.openrisc       |  8 +++----
 arch/openrisc/TODO.openrisc         |  3 ---
 arch/openrisc/include/asm/pgalloc.h |  1 -
 arch/openrisc/include/asm/pgtable.h |  2 +-
 arch/openrisc/kernel/entry.S        | 12 ++++++++--
 arch/openrisc/kernel/process.c      | 13 ++++++++++
 arch/openrisc/kernel/setup.c        | 48 ++++++++++---------------------------
 arch/openrisc/kernel/vmlinux.lds.S  |  8 ++++++-
 arch/openrisc/mm/init.c             |  4 ++--
 arch/openrisc/mm/ioremap.c          |  4 ----
 12 files changed, 58 insertions(+), 55 deletions(-)

-- 
2.7.4

[PATCH v2 1/9] openrisc: fix PTRS_PER_PGD define

[Stafford Horne]

From: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>

On OpenRISC, with its 8k pages, PAGE_SHIFT is defined to be 13.
That makes the expression (1UL << (PAGE_SHIFT-2)) evaluate
to 2048.
The correct value for PTRS_PER_PGD should be 256.

Correcting the PTRS_PER_PGD define unveiled a bug in map_ram(),
where PTRS_PER_PGD was used when the intent was to iterate
over a set of page table entries.
This patch corrects that issue as well.

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Acked-by: Jonas Bonn <jonas@southpole.se>
Tested-by: Guenter Roeck <linux@roeck-us.net>
---
 arch/openrisc/include/asm/pgtable.h | 2 +-
 arch/openrisc/mm/init.c             | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/openrisc/include/asm/pgtable.h b/arch/openrisc/include/asm/pgtable.h
index 69c7df0..3567aa7 100644
--- a/arch/openrisc/include/asm/pgtable.h
+++ b/arch/openrisc/include/asm/pgtable.h
@@ -69,7 +69,7 @@ extern void paging_init(void);
  */
 #define PTRS_PER_PTE	(1UL << (PAGE_SHIFT-2))
 
-#define PTRS_PER_PGD	(1UL << (PAGE_SHIFT-2))
+#define PTRS_PER_PGD	(1UL << (32-PGDIR_SHIFT))
 
 /* calculate how many PGD entries a user-level program can use
  * the first mappable virtual address is 0
diff --git a/arch/openrisc/mm/init.c b/arch/openrisc/mm/init.c
index 7f94652..b782ce9 100644
--- a/arch/openrisc/mm/init.c
+++ b/arch/openrisc/mm/init.c
@@ -110,7 +110,7 @@ static void __init map_ram(void)
 			set_pmd(pme, __pmd(_KERNPG_TABLE + __pa(pte)));
 
 			/* Fill the newly allocated page with PTE'S */
-			for (j = 0; p < e && j < PTRS_PER_PGD;
+			for (j = 0; p < e && j < PTRS_PER_PTE;
 			     v += PAGE_SIZE, p += PAGE_SIZE, j++, pte++) {
 				if (v >= (u32) _e_kernel_ro ||
 				    v < (u32) _s_kernel_ro)
-- 
2.7.4

[PATCH v2 2/9] openrisc: restore all regs on rt_sigreturn

[Stafford Horne]

From: Jonas Bonn <jonas@southpole.se>

Fix signal handling for when signals are handled as the result of timers
or exceptions, previous code assumed syscalls. This was noticeable with X
crashing where it uses SIGALRM.

This patch restores all regs before returning to userspace via
_resume_userspace instead of via syscall return path.

The rt_sigreturn syscall is more like a context switch than a function
call; it entails a return from one context (the signal handler) to another
(the process in question).  For a context switch like this there are
effectively no call-saved regs that remain constant across the transition.

Reported-by: Sebastian Macke <sebastian@macke.de>
Signed-off-by: Jonas Bonn <jonas@southpole.se>
Tested-by: Guenter Roeck <linux@roeck-us.net>
[shorne@gmail.com: Updated comment better reflect change and issue]

Signed-off-by: Stafford Horne <shorne@gmail.com>
---
 arch/openrisc/kernel/entry.S | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S
index fec8bf9..572d223 100644
--- a/arch/openrisc/kernel/entry.S
+++ b/arch/openrisc/kernel/entry.S
@@ -1101,8 +1101,16 @@ ENTRY(__sys_fork)
 	 l.addi	r3,r1,0
 
 ENTRY(sys_rt_sigreturn)
-	l.j	_sys_rt_sigreturn
+	l.jal	_sys_rt_sigreturn
 	 l.addi	r3,r1,0
+	l.sfne	r30,r0
+	l.bnf	_no_syscall_trace
+	 l.nop
+	l.jal	do_syscall_trace_leave
+	 l.addi	r3,r1,0
+_no_syscall_trace:
+	l.j	_resume_userspace
+	 l.nop
 
 /* This is a catch-all syscall for atomic instructions for the OpenRISC 1000.
  * The functions takes a variable number of parameters depending on which
-- 
2.7.4

[PATCH v2 3/9] openrisc: Add thread-local storage (TLS) support

[Stafford Horne]

From: Christian Svensson <blue@cmd.nu>

Historically OpenRISC GCC has reserved r10 which we now use to hold
the thread pointer for thread-local storage (TLS).

Signed-off-by: Christian Svensson <blue@cmd.nu>
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
---
 arch/openrisc/kernel/process.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/openrisc/kernel/process.c b/arch/openrisc/kernel/process.c
index 7095dfe..277123b 100644
--- a/arch/openrisc/kernel/process.c
+++ b/arch/openrisc/kernel/process.c
@@ -173,6 +173,19 @@ copy_thread(unsigned long clone_flags, unsigned long usp,
 
 		if (usp)
 			userregs->sp = usp;
+
+		/*
+		 * For CLONE_SETTLS set "tp" (r10) to the TLS pointer passed to sys_clone.
+		 *
+		 * The kernel entry is:
+		 *	int clone (long flags, void *child_stack, int *parent_tid,
+		 *		int *child_tid, struct void *tls)
+		 *
+		 * This makes the source r7 in the kernel registers.
+		 */
+		if (clone_flags & CLONE_SETTLS)
+			userregs->gpr[10] = userregs->gpr[7];
+
 		userregs->gpr[11] = 0;	/* Result from fork() */
 
 		kregs->gpr[20] = 0;	/* Userspace thread */
-- 
2.7.4

[PATCH v2 4/9] openrisc: Support both old (or32) and new (or1k) toolchain

[Stafford Horne]

From: Guenter Roeck <linux@roeck-us.net>

The output file format for or1k has changed from "elf32-or32"
to "elf32-or1k". Select the correct output format automatically
to be able to compile the kernel with both toolchain variants.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Stafford Horne <shorne@gmail.com>
---
 arch/openrisc/kernel/vmlinux.lds.S | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/openrisc/kernel/vmlinux.lds.S b/arch/openrisc/kernel/vmlinux.lds.S
index d68b9ed..ef31fc2 100644
--- a/arch/openrisc/kernel/vmlinux.lds.S
+++ b/arch/openrisc/kernel/vmlinux.lds.S
@@ -30,7 +30,13 @@
 #include <asm/cache.h>
 #include <asm-generic/vmlinux.lds.h>
 
-OUTPUT_FORMAT("elf32-or32", "elf32-or32", "elf32-or32")
+#ifdef __OR1K__
+#define __OUTPUT_FORMAT        "elf32-or1k"
+#else
+#define __OUTPUT_FORMAT        "elf32-or32"
+#endif
+
+OUTPUT_FORMAT(__OUTPUT_FORMAT, __OUTPUT_FORMAT, __OUTPUT_FORMAT)
 jiffies = jiffies_64 + 4;
 
 SECTIONS
-- 
2.7.4

[PATCH v2 5/9] openrisc: add NR_CPUS Kconfig default value

[Stafford Horne]

The build system now expects that NR_CPUS is defined.

Follow 4cbbbb4 ("microblaze: Fix missing NR_CPUS in menuconfig")

Signed-off-by: Stafford Horne <shorne@gmail.com>
---
 arch/openrisc/Kconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig
index 489e7f9..691e1af 100644
--- a/arch/openrisc/Kconfig
+++ b/arch/openrisc/Kconfig
@@ -98,6 +98,9 @@ config OPENRISC_HAVE_INST_DIV
 	  Select this if your implementation has a hardware divide instruction
 endmenu
 
+config NR_CPUS
+	int
+	default "1"
 
 source kernel/Kconfig.hz
 source kernel/Kconfig.preempt
-- 
2.7.4

[PATCH v2 6/9] openrisc: remove the redundant of_platform_populate

[Stafford Horne]

From: Rob Herring <robh@kernel.org>

The of_platform_populate call in the openrisc arch code is now redundant
as the DT core provides a default call. Openrisc has a NULL match table
which means only top level nodes with compatible strings will have
devices creates. The default version will also descend nodes in the
match table such as "simple-bus" which should be fine as openrisc
doesn't have any of these (though it is preferred that memory-mapped
peripherals be grouped under a bus node(s)).

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Jonas Bonn <jonas@southpole.se>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Stafford Horne <shorne@gmail.com>
---
 arch/openrisc/kernel/setup.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/arch/openrisc/kernel/setup.c b/arch/openrisc/kernel/setup.c
index b4ed8b3..d2f78cf 100644
--- a/arch/openrisc/kernel/setup.c
+++ b/arch/openrisc/kernel/setup.c
@@ -38,7 +38,6 @@
 #include <linux/of.h>
 #include <linux/memblock.h>
 #include <linux/device.h>
-#include <linux/of_platform.h>
 
 #include <asm/sections.h>
 #include <asm/segment.h>
@@ -219,15 +218,6 @@ void __init or32_early_setup(void *fdt)
 	early_init_devtree(fdt);
 }
 
-static int __init openrisc_device_probe(void)
-{
-	of_platform_populate(NULL, NULL, NULL, NULL);
-
-	return 0;
-}
-
-device_initcall(openrisc_device_probe);
-
 static inline unsigned long extract_value_bits(unsigned long reg,
 					       short bit_nr, short width)
 {
-- 
2.7.4

[PATCH v2 7/9] openrisc: Consolidate setup to use memblock instead of bootmem

[Stafford Horne]

Clearing out one todo item. Use the memblock boot time memory
which is the current standard.

Signed-off-by: Stafford Horne <shorne@gmail.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Jonas <jonas@southpole.se>
---
 arch/openrisc/Kconfig               |  1 +
 arch/openrisc/TODO.openrisc         |  3 ---
 arch/openrisc/include/asm/pgalloc.h |  1 -
 arch/openrisc/kernel/setup.c        | 36 ++++++++++++------------------------
 arch/openrisc/mm/init.c             |  2 +-
 arch/openrisc/mm/ioremap.c          |  4 ----
 6 files changed, 14 insertions(+), 33 deletions(-)

diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig
index 691e1af..8d22015 100644
--- a/arch/openrisc/Kconfig
+++ b/arch/openrisc/Kconfig
@@ -26,6 +26,7 @@ config OPENRISC
 	select HAVE_DEBUG_STACKOVERFLOW
 	select OR1K_PIC
 	select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1
+	select NO_BOOTMEM
 
 config MMU
 	def_bool y
diff --git a/arch/openrisc/TODO.openrisc b/arch/openrisc/TODO.openrisc
index acfeef9..0eb04c8 100644
--- a/arch/openrisc/TODO.openrisc
+++ b/arch/openrisc/TODO.openrisc
@@ -5,9 +5,6 @@ that are due for investigation shortly, i.e. our TODO list:
 
 -- Implement the rest of the DMA API... dma_map_sg, etc.
 
--- Consolidate usage of memblock and bootmem... move everything over to
-   memblock.
-
 -- Finish the renaming cleanup... there are references to or32 in the code
    which was an older name for the architecture.  The name we've settled on is
    or1k and this change is slowly trickling through the stack.  For the time
diff --git a/arch/openrisc/include/asm/pgalloc.h b/arch/openrisc/include/asm/pgalloc.h
index 87eebd1..3e1a466 100644
--- a/arch/openrisc/include/asm/pgalloc.h
+++ b/arch/openrisc/include/asm/pgalloc.h
@@ -23,7 +23,6 @@
 #include <linux/threads.h>
 #include <linux/mm.h>
 #include <linux/memblock.h>
-#include <linux/bootmem.h>
 
 extern int mem_init_done;
 
diff --git a/arch/openrisc/kernel/setup.c b/arch/openrisc/kernel/setup.c
index d2f78cf..6329d7a 100644
--- a/arch/openrisc/kernel/setup.c
+++ b/arch/openrisc/kernel/setup.c
@@ -50,18 +50,16 @@
 
 #include "vmlinux.h"
 
-static unsigned long __init setup_memory(void)
+static void __init setup_memory(void)
 {
-	unsigned long bootmap_size;
 	unsigned long ram_start_pfn;
-	unsigned long free_ram_start_pfn;
 	unsigned long ram_end_pfn;
 	phys_addr_t memory_start, memory_end;
 	struct memblock_region *region;
 
 	memory_end = memory_start = 0;
 
-	/* Find main memory where is the kernel */
+	/* Find main memory where is the kernel, we assume its the only one */
 	for_each_memblock(memory, region) {
 		memory_start = region->base;
 		memory_end = region->base + region->size;
@@ -74,10 +72,11 @@ static unsigned long __init setup_memory(void)
 	}
 
 	ram_start_pfn = PFN_UP(memory_start);
-	/* free_ram_start_pfn is first page after kernel */
-	free_ram_start_pfn = PFN_UP(__pa(_end));
 	ram_end_pfn = PFN_DOWN(memblock_end_of_DRAM());
 
+	/* setup bootmem globals (we use no_bootmem, but mm still depends on this) */
+	min_low_pfn = ram_start_pfn;
+	max_low_pfn = ram_end_pfn;
 	max_pfn = ram_end_pfn;
 
 	/*
@@ -85,22 +84,13 @@ static unsigned long __init setup_memory(void)
 	 *
 	 * This makes the memory from the end of the kernel to the end of
 	 * RAM usable.
-	 * init_bootmem sets the global values min_low_pfn, max_low_pfn.
 	 */
-	bootmap_size = init_bootmem(free_ram_start_pfn,
-				    ram_end_pfn - ram_start_pfn);
-	free_bootmem(PFN_PHYS(free_ram_start_pfn),
-		     (ram_end_pfn - free_ram_start_pfn) << PAGE_SHIFT);
-	reserve_bootmem(PFN_PHYS(free_ram_start_pfn), bootmap_size,
-			BOOTMEM_DEFAULT);
-
-	for_each_memblock(reserved, region) {
-		printk(KERN_INFO "Reserved - 0x%08x-0x%08x\n",
-		       (u32) region->base, (u32) region->size);
-		reserve_bootmem(region->base, region->size, BOOTMEM_DEFAULT);
-	}
+	memblock_reserve(__pa(_stext), _end - _stext);
+
+	early_init_fdt_reserve_self();
+	early_init_fdt_scan_reserved_mem();
 
-	return ram_end_pfn;
+	memblock_dump_all();
 }
 
 struct cpuinfo cpuinfo;
@@ -272,8 +262,6 @@ void calibrate_delay(void)
 
 void __init setup_arch(char **cmdline_p)
 {
-	unsigned long max_low_pfn;
-
 	unflatten_and_copy_device_tree();
 
 	setup_cpuinfo();
@@ -294,8 +282,8 @@ void __init setup_arch(char **cmdline_p)
 	initrd_below_start_ok = 1;
 #endif
 
-	/* setup bootmem allocator */
-	max_low_pfn = setup_memory();
+	/* setup memblock allocator */
+	setup_memory();
 
 	/* paging_init() sets up the MMU and marks all pages as reserved */
 	paging_init();
diff --git a/arch/openrisc/mm/init.c b/arch/openrisc/mm/init.c
index b782ce9..f67d82b 100644
--- a/arch/openrisc/mm/init.c
+++ b/arch/openrisc/mm/init.c
@@ -106,7 +106,7 @@ static void __init map_ram(void)
 			}
 
 			/* Alloc one page for holding PTE's... */
-			pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
+			pte = (pte_t *) __va(memblock_alloc(PAGE_SIZE, PAGE_SIZE));
 			set_pmd(pme, __pmd(_KERNPG_TABLE + __pa(pte)));
 
 			/* Fill the newly allocated page with PTE'S */
diff --git a/arch/openrisc/mm/ioremap.c b/arch/openrisc/mm/ioremap.c
index fa60b81..8705a46 100644
--- a/arch/openrisc/mm/ioremap.c
+++ b/arch/openrisc/mm/ioremap.c
@@ -124,11 +124,7 @@ pte_t __ref *pte_alloc_one_kernel(struct mm_struct *mm,
 	if (likely(mem_init_done)) {
 		pte = (pte_t *) __get_free_page(GFP_KERNEL);
 	} else {
-		pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
-#if 0
-		/* FIXME: use memblock... */
 		pte = (pte_t *) __va(memblock_alloc(PAGE_SIZE, PAGE_SIZE));
-#endif
 	}
 
 	if (pte)
-- 
2.7.4

[PATCH v2 8/9] openrisc: Updates after openrisc.net has been lost

[Stafford Horne]

The openrisc.net domain expired and was taken over by squatters.
These updates point documentation to the new domain, mailing lists
and git repos.

Also, Jonas is not the main maintainer anylonger, he reviews changes
but does not maintain a repo or sent pull requests.  Updating this to
add Stafford and Stefan who are the active maintainers.

Signed-off-by: Stafford Horne <shorne@gmail.com>
---
 MAINTAINERS                   | 6 ++++--
 arch/openrisc/README.openrisc | 8 ++++----
 arch/openrisc/kernel/setup.c  | 2 +-
 3 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 851b89b..d84a585 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8958,9 +8958,11 @@ F:	drivers/of/resolver.c
 
 OPENRISC ARCHITECTURE
 M:	Jonas Bonn <jonas@southpole.se>
-W:	http://openrisc.net
+M:	Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
+M:	Stafford Horne <shorne@gmail.com>
+L:	openrisc@lists.librecores.org
+W:	http://openrisc.io
 S:	Maintained
-T:	git git://openrisc.net/~jonas/linux
 F:	arch/openrisc/
 
 OPENVSWITCH
diff --git a/arch/openrisc/README.openrisc b/arch/openrisc/README.openrisc
index c9f7edf..072069a 100644
--- a/arch/openrisc/README.openrisc
+++ b/arch/openrisc/README.openrisc
@@ -6,7 +6,7 @@ target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).
 
 For information about OpenRISC processors and ongoing development:
 
-	website		http://openrisc.net
+	website		http://openrisc.io
 
 For more information about Linux on OpenRISC, please contact South Pole AB.
 
@@ -24,17 +24,17 @@ In order to build and run Linux for OpenRISC, you'll need at least a basic
 toolchain and, perhaps, the architectural simulator.  Steps to get these bits
 in place are outlined here.
 
-1)  The toolchain can be obtained from openrisc.net.  Instructions for building
+1)  The toolchain can be obtained from openrisc.io.  Instructions for building
 a toolchain can be found at:
 
-http://openrisc.net/toolchain-build.html
+https://github.com/openrisc/tutorials
 
 2) or1ksim (optional)
 
 or1ksim is the architectural simulator which will allow you to actually run
 your OpenRISC Linux kernel if you don't have an OpenRISC processor at hand.
 
-	git clone git://openrisc.net/jonas/or1ksim-svn
+	git clone https://github.com/openrisc/or1ksim.git
 
 	cd or1ksim
 	./configure --prefix=$OPENRISC_PREFIX
diff --git a/arch/openrisc/kernel/setup.c b/arch/openrisc/kernel/setup.c
index 6329d7a..cb797a3 100644
--- a/arch/openrisc/kernel/setup.c
+++ b/arch/openrisc/kernel/setup.c
@@ -295,7 +295,7 @@ void __init setup_arch(char **cmdline_p)
 
 	*cmdline_p = boot_command_line;
 
-	printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n");
+	printk(KERN_INFO "OpenRISC Linux -- http://openrisc.io\n");
 }
 
 static int show_cpuinfo(struct seq_file *m, void *v)
-- 
2.7.4

[PATCH v2 9/9] openrisc: include l.swa in check for write data pagefault

[Stafford Horne]

From: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>

During page fault handling we check the last instruction to understand
if the fault was for a read or for a write.  By default we fall back to
read.  New instructions were added to the openrisc 1.1 spec for an
atomic load/store pair (l.lwa/l.swa).

This patch adds the opcode for l.swa (0x33) allowing it to be treated as
a write operation.

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
[shorne@gmail.com: expanded a bit on the comment]

Signed-off-by: Stafford Horne <shorne@gmail.com>
---
 arch/openrisc/kernel/entry.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S
index 572d223..aac0bde 100644
--- a/arch/openrisc/kernel/entry.S
+++ b/arch/openrisc/kernel/entry.S
@@ -264,7 +264,7 @@ EXCEPTION_ENTRY(_data_page_fault_handler)
 	l.srli  r6,r6,26                   // check opcode for write access
 #endif
 
-	l.sfgeui r6,0x34		   // check opcode for write access
+	l.sfgeui r6,0x33		   // check opcode for write access
 	l.bnf   1f
 	l.sfleui r6,0x37
 	l.bnf   1f
-- 
2.7.4

Re: [OpenRISC] [PATCH v2 8/9] openrisc: Updates after openrisc.net has been lost

[Olof Kindgren]

On Mon, Nov 14, 2016 at 2:30 PM, Stafford Horne <shorne@gmail.com> wrote:
> The openrisc.net domain expired and was taken over by squatters.
> These updates point documentation to the new domain, mailing lists
> and git repos.
>
> Also, Jonas is not the main maintainer anylonger, he reviews changes
> but does not maintain a repo or sent pull requests.  Updating this to
> add Stafford and Stefan who are the active maintainers.
>
> Signed-off-by: Stafford Horne <shorne@gmail.com>
> ---
>  MAINTAINERS                   | 6 ++++--
>  arch/openrisc/README.openrisc | 8 ++++----
>  arch/openrisc/kernel/setup.c  | 2 +-
>  3 files changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 851b89b..d84a585 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -8958,9 +8958,11 @@ F:       drivers/of/resolver.c
>
>  OPENRISC ARCHITECTURE
>  M:     Jonas Bonn <jonas@southpole.se>
> -W:     http://openrisc.net
> +M:     Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
> +M:     Stafford Horne <shorne@gmail.com>
> +L:     openrisc@lists.librecores.org
> +W:     http://openrisc.io
>  S:     Maintained
> -T:     git git://openrisc.net/~jonas/linux
>  F:     arch/openrisc/
>
>  OPENVSWITCH
> diff --git a/arch/openrisc/README.openrisc b/arch/openrisc/README.openrisc
> index c9f7edf..072069a 100644
> --- a/arch/openrisc/README.openrisc
> +++ b/arch/openrisc/README.openrisc
> @@ -6,7 +6,7 @@ target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).
>
>  For information about OpenRISC processors and ongoing development:
>
> -       website         http://openrisc.net
> +       website         http://openrisc.io
>
>  For more information about Linux on OpenRISC, please contact South Pole AB.
>
> @@ -24,17 +24,17 @@ In order to build and run Linux for OpenRISC, you'll need at least a basic
>  toolchain and, perhaps, the architectural simulator.  Steps to get these bits
>  in place are outlined here.
>
> -1)  The toolchain can be obtained from openrisc.net.  Instructions for building
> +1)  The toolchain can be obtained from openrisc.io.  Instructions for building
>  a toolchain can be found at:
>
> -http://openrisc.net/toolchain-build.html
> +https://github.com/openrisc/tutorials
>
>  2) or1ksim (optional)
>
>  or1ksim is the architectural simulator which will allow you to actually run
>  your OpenRISC Linux kernel if you don't have an OpenRISC processor at hand.
>
> -       git clone git://openrisc.net/jonas/or1ksim-svn
> +       git clone https://github.com/openrisc/or1ksim.git
>
>         cd or1ksim
>         ./configure --prefix=$OPENRISC_PREFIX
> diff --git a/arch/openrisc/kernel/setup.c b/arch/openrisc/kernel/setup.c
> index 6329d7a..cb797a3 100644
> --- a/arch/openrisc/kernel/setup.c
> +++ b/arch/openrisc/kernel/setup.c
> @@ -295,7 +295,7 @@ void __init setup_arch(char **cmdline_p)
>
>         *cmdline_p = boot_command_line;
>
> -       printk(KERN_INFO "OpenRISC Linux -- http://openrisc.net\n");
> +       printk(KERN_INFO "OpenRISC Linux -- http://openrisc.io\n");
>  }
>
>  static int show_cpuinfo(struct seq_file *m, void *v)
> --
> 2.7.4
>
> _______________________________________________
> OpenRISC mailing list
> OpenRISC@lists.librecores.org
> https://lists.librecores.org/listinfo/openrisc

This looks all correct
Acked-by: Olof Kindgren <olof.kindgren@gmail.com>

Re: [PATCH v2 0/9] openrisc: Misc fixes from backlog

[Guenter Roeck]

On Mon, Nov 14, 2016 at 10:30:30PM +0900, Stafford Horne wrote:
> Hello,
> 
> This patch is a small set of fixes from the openrisc backlog. These
> changes fix several issues with the openrisc build on modern tool chains
> and address other issues which have cropped up as the kernel has been
> getting updated.
> 

Do you plan to send those patches to Linus yourself, or do you want me to do it
for you this time ? If so I'd ask for the patch series to be added to -next
and send it to Linus after the commit window opens. Let me know.

Thanks,
Guenter

> Consider for Pull:
> 
> The following changes since commit a25f0944ba9b1d8a6813fd6f1a86f1bd59ac25a6:
> 
>   Linux 4.9-rc5 (2016-11-13 10:32:32 -0800)
> 
> are available in the git repository at:
> 
>   https://github.com/stffrdhrn/linux.git tags/or1k-fixes-4.9
> 
> for you to fetch changes up to a9fae5563e34217ff99efafde7e7bf607a5d5ec6:
> 
>   openrisc: include l.swa in check for write data pagefault (2016-11-14 21:58:33 +0900)
> 
> Regards,
>  Stafford
> 
> Changes since V1:
>  - Removed SMP option patch and replaced with NR_CPUS default value
>  - Removed Apply transparent_union on semun patch as its handled by libc
>  - Added memblock patch as suggested by Jonas
>  - Added MAINTAINERS patch as suggested by Guenter
>  - Added l.swa patch as its needed to fix musl programs
>  - Improved commit message on rt_sigreturn patch
> 
> Christian Svensson (1):
>   openrisc: Add thread-local storage (TLS) support
> 
> Guenter Roeck (1):
>   openrisc: Support both old (or32) and new (or1k) toolchain
> 
> Jonas Bonn (1):
>   openrisc: restore all regs on rt_sigreturn
> 
> Rob Herring (1):
>   openrisc: remove the redundant of_platform_populate
> 
> Stafford Horne (3):
>   openrisc: add NR_CPUS Kconfig default value
>   openrisc: Consolidate setup to use memblock instead of bootmem
>   openrisc: Updates after openrisc.net has been lost
> 
> Stefan Kristiansson (2):
>   openrisc: fix PTRS_PER_PGD define
>   openrisc: include l.swa in check for write data pagefault
> 
>  MAINTAINERS                         |  6 +++--
>  arch/openrisc/Kconfig               |  4 ++++
>  arch/openrisc/README.openrisc       |  8 +++----
>  arch/openrisc/TODO.openrisc         |  3 ---
>  arch/openrisc/include/asm/pgalloc.h |  1 -
>  arch/openrisc/include/asm/pgtable.h |  2 +-
>  arch/openrisc/kernel/entry.S        | 12 ++++++++--
>  arch/openrisc/kernel/process.c      | 13 ++++++++++
>  arch/openrisc/kernel/setup.c        | 48 ++++++++++---------------------------
>  arch/openrisc/kernel/vmlinux.lds.S  |  8 ++++++-
>  arch/openrisc/mm/init.c             |  4 ++--
>  arch/openrisc/mm/ioremap.c          |  4 ----
>  12 files changed, 58 insertions(+), 55 deletions(-)
> 
> -- 
> 2.7.4
> 

Re: [PATCH v2 0/9] openrisc: Misc fixes from backlog

[Stafford Horne]

On Tue, 29 Nov 2016, Guenter Roeck wrote:

> On Mon, Nov 14, 2016 at 10:30:30PM +0900, Stafford Horne wrote:
>> Hello,
>>
>> This patch is a small set of fixes from the openrisc backlog. These
>> changes fix several issues with the openrisc build on modern tool chains
>> and address other issues which have cropped up as the kernel has been
>> getting updated.
>>
>
> Do you plan to send those patches to Linus yourself, or do you want me to do it
> for you this time ? If so I'd ask for the patch series to be added to -next
> and send it to Linus after the commit window opens. Let me know.

Hi Guenter,

Thanks for following up. One of the members of the openrisc team was able 
to get his key signed recently [0].  But, it puts me at 4 levels from 
Linus, which may not be good enough for accepting pull requests. At the 
same time, I am working with one Japan kernel developer to get my key 
signed, but there was a minor issue when we met. I hope that can get 
resolved this friday when I meet again at Japan Technical Jamboree [1].

You might not be interested in all of that. I will do the following:

   1 Create for-next branch on the github openrisc/linux with my current
     patch set
   2 Send a mail to Stephen Rothwell for including in linux next
   3 When the merge window opens either the other OpenRISC maintainer or I
     will create a signed tag and send a pull reuest to linus.

If those done work we will ask you for help.

Thanks for your help,

-Stafford

[0] 
https://pgp.cs.uu.nl/mk_path.cgi?FROM=00411886&TO=5E6627E4&PATHS=trust+paths
[1] http://elinux.org/Japan_Technical_Jamboree_59

>> Consider for Pull:
>>
>> The following changes since commit a25f0944ba9b1d8a6813fd6f1a86f1bd59ac25a6:
>>
>>   Linux 4.9-rc5 (2016-11-13 10:32:32 -0800)
>>
>> are available in the git repository at:
>>
>>   https://github.com/stffrdhrn/linux.git tags/or1k-fixes-4.9
>>
>> for you to fetch changes up to a9fae5563e34217ff99efafde7e7bf607a5d5ec6:
>>
>>   openrisc: include l.swa in check for write data pagefault (2016-11-14 21:58:33 +0900)
>>
>> Regards,
>>  Stafford
>>
>> Changes since V1:
>>  - Removed SMP option patch and replaced with NR_CPUS default value
>>  - Removed Apply transparent_union on semun patch as its handled by libc
>>  - Added memblock patch as suggested by Jonas
>>  - Added MAINTAINERS patch as suggested by Guenter
>>  - Added l.swa patch as its needed to fix musl programs
>>  - Improved commit message on rt_sigreturn patch
>>
>> Christian Svensson (1):
>>   openrisc: Add thread-local storage (TLS) support
>>
>> Guenter Roeck (1):
>>   openrisc: Support both old (or32) and new (or1k) toolchain
>>
>> Jonas Bonn (1):
>>   openrisc: restore all regs on rt_sigreturn
>>
>> Rob Herring (1):
>>   openrisc: remove the redundant of_platform_populate
>>
>> Stafford Horne (3):
>>   openrisc: add NR_CPUS Kconfig default value
>>   openrisc: Consolidate setup to use memblock instead of bootmem
>>   openrisc: Updates after openrisc.net has been lost
>>
>> Stefan Kristiansson (2):
>>   openrisc: fix PTRS_PER_PGD define
>>   openrisc: include l.swa in check for write data pagefault
>>
>>  MAINTAINERS                         |  6 +++--
>>  arch/openrisc/Kconfig               |  4 ++++
>>  arch/openrisc/README.openrisc       |  8 +++----
>>  arch/openrisc/TODO.openrisc         |  3 ---
>>  arch/openrisc/include/asm/pgalloc.h |  1 -
>>  arch/openrisc/include/asm/pgtable.h |  2 +-
>>  arch/openrisc/kernel/entry.S        | 12 ++++++++--
>>  arch/openrisc/kernel/process.c      | 13 ++++++++++
>>  arch/openrisc/kernel/setup.c        | 48 ++++++++++---------------------------
>>  arch/openrisc/kernel/vmlinux.lds.S  |  8 ++++++-
>>  arch/openrisc/mm/init.c             |  4 ++--
>>  arch/openrisc/mm/ioremap.c          |  4 ----
>>  12 files changed, 58 insertions(+), 55 deletions(-)
>>
>> --
>> 2.7.4
>>
>

Re: [PATCH v2 0/9] openrisc: Misc fixes from backlog

[Guenter Roeck]

On 11/30/2016 04:40 AM, Stafford Horne wrote:
>
>
> On Tue, 29 Nov 2016, Guenter Roeck wrote:
>
>> On Mon, Nov 14, 2016 at 10:30:30PM +0900, Stafford Horne wrote:
>>> Hello,
>>>
>>> This patch is a small set of fixes from the openrisc backlog. These
>>> changes fix several issues with the openrisc build on modern tool chains
>>> and address other issues which have cropped up as the kernel has been
>>> getting updated.
>>>
>>
>> Do you plan to send those patches to Linus yourself, or do you want me to do it
>> for you this time ? If so I'd ask for the patch series to be added to -next
>> and send it to Linus after the commit window opens. Let me know.
>
> Hi Guenter,
>
> Thanks for following up. One of the members of the openrisc team was able to get his key signed recently [0].  But, it puts me at 4 levels from Linus, which may not be good enough for accepting pull requests. At the same time, I am working with one Japan kernel developer to get my key signed, but there was a minor issue when we met. I hope that can get resolved this friday when I meet again at Japan Technical Jamboree [1].
>
> You might not be interested in all of that. I will do the following:
>
>   1 Create for-next branch on the github openrisc/linux with my current
>     patch set
>   2 Send a mail to Stephen Rothwell for including in linux next
>   3 When the merge window opens either the other OpenRISC maintainer or I
>     will create a signed tag and send a pull reuest to linus.
>
> If those done work we will ask you for help.
>

Sounds good. Please copy me on 3 - this way I'll know what is going on.

Thanks,
Guenter

Re: [PATCH v2 8/9] openrisc: Updates after openrisc.net has been lost

[Geert Uytterhoeven]

Hi Stafford, Stefan,

On Mon, Nov 14, 2016 at 2:30 PM, Stafford Horne <shorne@gmail.com> wrote:
> The openrisc.net domain expired and was taken over by squatters.
> These updates point documentation to the new domain, mailing lists
> and git repos.
>
> Also, Jonas is not the main maintainer anylonger, he reviews changes
> but does not maintain a repo or sent pull requests.  Updating this to
> add Stafford and Stefan who are the active maintainers.
>
> Signed-off-by: Stafford Horne <shorne@gmail.com>
> ---
>  MAINTAINERS                   | 6 ++++--
>  arch/openrisc/README.openrisc | 8 ++++----
>  arch/openrisc/kernel/setup.c  | 2 +-
>  3 files changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 851b89b..d84a585 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -8958,9 +8958,11 @@ F:       drivers/of/resolver.c
>
>  OPENRISC ARCHITECTURE
>  M:     Jonas Bonn <jonas@southpole.se>
> -W:     http://openrisc.net
> +M:     Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
> +M:     Stafford Horne <shorne@gmail.com>
> +L:     openrisc@lists.librecores.org
> +W:     http://openrisc.io
>  S:     Maintained
> -T:     git git://openrisc.net/~jonas/linux
>  F:     arch/openrisc/

It's great news to see new active maintainers for OpenRISC.
Thanks a lot!

Somehow I seem to have missed the new mailing announcement.
Subscribed ;-)

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 8/9] openrisc: Updates after openrisc.net has been lost

[Stafford Horne]

Hi Geert,

On Wed, Dec 14, 2016 at 09:57:11AM +0100, Geert Uytterhoeven wrote:
> Hi Stafford, Stefan,
> 
> On Mon, Nov 14, 2016 at 2:30 PM, Stafford Horne <shorne@gmail.com> wrote:
> > The openrisc.net domain expired and was taken over by squatters.
> > These updates point documentation to the new domain, mailing lists
> > and git repos.
> >
> > Also, Jonas is not the main maintainer anylonger, he reviews changes
> > but does not maintain a repo or sent pull requests.  Updating this to
> > add Stafford and Stefan who are the active maintainers.
> >
> > Signed-off-by: Stafford Horne <shorne@gmail.com>
> > ---
> >  MAINTAINERS                   | 6 ++++--
> >  arch/openrisc/README.openrisc | 8 ++++----
> >  arch/openrisc/kernel/setup.c  | 2 +-
> >  3 files changed, 9 insertions(+), 7 deletions(-)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 851b89b..d84a585 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -8958,9 +8958,11 @@ F:       drivers/of/resolver.c
> >
> >  OPENRISC ARCHITECTURE
> >  M:     Jonas Bonn <jonas@southpole.se>
> > -W:     http://openrisc.net
> > +M:     Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
> > +M:     Stafford Horne <shorne@gmail.com>
> > +L:     openrisc@lists.librecores.org
> > +W:     http://openrisc.io
> >  S:     Maintained
> > -T:     git git://openrisc.net/~jonas/linux
> >  F:     arch/openrisc/
> 
> It's great news to see new active maintainers for OpenRISC.
> Thanks a lot!
> 
> Somehow I seem to have missed the new mailing announcement.
> Subscribed ;-)

I hope we can help out as much as possible.  Let us know if you have any
requests.

Just to give a bit of a preview of what we have in our backlog:
 - Openrisc optimized memcpy memset routines
 - Various opencores (now librecores?) IP drivers
 - SMP support

I have been sorting through the patches and getting them ready (commit
messages, code style etc).  Everything will be reviewed on the openrisc
and kernel list.

We cant promise quick progress but hopefully better than it has been in
the recent past.

-Stafford