[PATCH 0/2] irqchip: add support for BCM6345 interrupt controller

[PATCH 0/2] irqchip: add support for BCM6345 interrupt controller

[Álvaro Fernández Rojas]

This interrupt controller is present on bcm63xx SoCs in order to generate
interrupts based on GPIO status changes.

Álvaro Fernández Rojas (2):
  dt-bindings: interrupt-controller: document BCM6345 external interrupt
    controller
  irqchip: add support for BCM6345 interrupt controller

 .../brcm,bcm6345-ext-intc.yaml                |  61 ++++
 drivers/irqchip/Kconfig                       |   4 +
 drivers/irqchip/Makefile                      |   1 +
 drivers/irqchip/irq-bcm6345-ext.c             | 271 ++++++++++++++++++
 4 files changed, 337 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
 create mode 100644 drivers/irqchip/irq-bcm6345-ext.c

-- 
2.20.1

[PATCH 1/2] dt-bindings: interrupt-controller: document BCM6345 external interrupt controller

[Álvaro Fernández Rojas]

Document the binding for the BCM6345 external interrupt controller.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
 .../brcm,bcm6345-ext-intc.yaml                | 61 +++++++++++++++++++
 1 file changed, 61 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
new file mode 100644
index 000000000000..9cc29fa03968
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/brcm,brcm6345-ext-intc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM6345 external interrupt controller
+
+maintainers:
+  - Álvaro Fernández Rojas <noltari@gmail.com>
+  - Jonas Gorski <jonas.gorski@gmail.com>
+
+properties:
+  compatible:
+    enum:
+      - brcm,bcm6318-ext-intc
+      - brcm,bcm6345-ext-intc
+
+  interrupt-parent:
+    description: Specifies the phandle to the parent interrupt controller
+      this one is cascaded from.
+
+  "#interrupt-cells":
+    const: 2
+
+  reg:
+    maxItems: 1
+
+  "#address-cells":
+    const: 0
+
+  interrupt-controller: true
+
+  interrupts:
+    description: Specifies the interrupt line(s) in the interrupt-parent
+      controller node, valid values depend on the type of parent interrupt
+      controller.
+    maxItems: 4
+
+required:
+  - compatible
+  - interrupt-parent
+  - "#interrupt-cells"
+  - reg
+  - "#address-cells"
+  - interrupt-controller
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    ext_intc: interrupt-controller@10000018 {
+      compatible = "brcm,bcm6345-ext-intc";
+      interrupt-parent = <&periph_intc>;
+      #interrupt-cells = <2>;
+      reg = <0x10000018 0x4>;
+      #address-cells = <0>;
+      interrupt-controller;
+      interrupts = <24>, <25>, <26>, <27>;
+    };
-- 
2.20.1

Re: [PATCH 1/2] dt-bindings: interrupt-controller: document BCM6345 external interrupt controller

[Rob Herring]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 1790 bytes --]

On Tue, 23 Feb 2021 19:08:39 +0100, Álvaro Fernández Rojas wrote:
> Document the binding for the BCM6345 external interrupt controller.
> 
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
> ---
>  .../brcm,bcm6345-ext-intc.yaml                | 61 +++++++++++++++++++
>  1 file changed, 61 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml: properties:interrupt-parent: False schema does not allow {'description': 'Specifies the phandle to the parent interrupt controller this one is cascaded from.'}
./Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml: $id: relative path/filename doesn't match actual path or filename
	expected: http://devicetree.org/schemas/interrupt-controller/brcm,bcm6345-ext-intc.yaml#
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml: ignoring, error in schema: properties: interrupt-parent
warning: no schema found in file: ./Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml

See https://patchwork.ozlabs.org/patch/1443597

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

Re: [PATCH 1/2] dt-bindings: interrupt-controller: document BCM6345 external interrupt controller

[kernel test robot]

[-- Attachment #1: Type: text/plain, Size: 1020 bytes --]

Hi "Álvaro,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on tip/irq/core]
[also build test WARNING on robh/for-next v5.11 next-20210224]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/lvaro-Fern-ndez-Rojas/irqchip-add-support-for-BCM6345-interrupt-controller/20210224-021254
base:   https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 0b6d70e571a1c764ab079e5c31d4156feee4b06b
reproduce: make dtbs_check

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

warning: no schema found in file: Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 54190 bytes --]

[-- Attachment #3: Type: text/plain, Size: 149 bytes --]

_______________________________________________
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To unsubscribe send an email to kbuild-leave@lists.01.org

[PATCH 2/2] irqchip: add support for BCM6345 interrupt controller

[Álvaro Fernández Rojas]

This interrupt controller is present on bcm63xx SoCs in order to generate
interrupts based on GPIO status changes.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
 drivers/irqchip/Kconfig           |   4 +
 drivers/irqchip/Makefile          |   1 +
 drivers/irqchip/irq-bcm6345-ext.c | 271 ++++++++++++++++++++++++++++++
 3 files changed, 276 insertions(+)
 create mode 100644 drivers/irqchip/irq-bcm6345-ext.c

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index e74fa206240a..eaa101939a34 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -113,6 +113,10 @@ config I8259
 	bool
 	select IRQ_DOMAIN
 
+config BCM6345_EXT_IRQ
+	bool "BCM6345 External IRQ Controller"
+	select IRQ_DOMAIN
+
 config BCM6345_L1_IRQ
 	bool
 	select GENERIC_IRQ_CHIP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index c59b95a0532c..3cba65bc0aa5 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -62,6 +62,7 @@ obj-$(CONFIG_XTENSA_MX)			+= irq-xtensa-mx.o
 obj-$(CONFIG_XILINX_INTC)		+= irq-xilinx-intc.o
 obj-$(CONFIG_IRQ_CROSSBAR)		+= irq-crossbar.o
 obj-$(CONFIG_SOC_VF610)			+= irq-vf610-mscm-ir.o
+obj-$(CONFIG_BCM6345_EXT_IRQ)		+= irq-bcm6345-ext.o
 obj-$(CONFIG_BCM6345_L1_IRQ)		+= irq-bcm6345-l1.o
 obj-$(CONFIG_BCM7038_L1_IRQ)		+= irq-bcm7038-l1.o
 obj-$(CONFIG_BCM7120_L2_IRQ)		+= irq-bcm7120-l2.o
diff --git a/drivers/irqchip/irq-bcm6345-ext.c b/drivers/irqchip/irq-bcm6345-ext.c
new file mode 100644
index 000000000000..5721ac8de295
--- /dev/null
+++ b/drivers/irqchip/irq-bcm6345-ext.c
@@ -0,0 +1,271 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Broadcom BCM6345 style external interrupt controller driver
+ *
+ * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
+ * Copyright (C) 2014 Jonas Gorski <jonas.gorski@gmail.com>
+ */
+
+#include <linux/ioport.h>
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/irqchip/chained_irq.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+
+#define MAX_IRQS		4
+
+#define EXTIRQ_CFG_SENSE	0
+#define EXTIRQ_CFG_STAT		1
+#define EXTIRQ_CFG_CLEAR	2
+#define EXTIRQ_CFG_MASK		3
+#define EXTIRQ_CFG_BOTHEDGE	4
+#define EXTIRQ_CFG_LEVELSENSE	5
+
+struct intc_data {
+	struct irq_chip chip;
+	struct irq_domain *domain;
+	raw_spinlock_t lock;
+
+	int parent_irq[MAX_IRQS];
+	void __iomem *reg;
+	int shift;
+	unsigned int toggle_clear_on_ack:1;
+};
+
+static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc)
+{
+	struct intc_data *data = irq_desc_get_handler_data(desc);
+	struct irq_chip *chip = irq_desc_get_chip(desc);
+	unsigned int irq = irq_desc_get_irq(desc);
+	unsigned int idx;
+
+	chained_irq_enter(chip, desc);
+
+	for (idx = 0; idx < MAX_IRQS; idx++) {
+		if (data->parent_irq[idx] != irq)
+			continue;
+
+		generic_handle_irq(irq_find_mapping(data->domain, idx));
+	}
+
+	chained_irq_exit(chip, desc);
+}
+
+static void bcm6345_ext_intc_irq_ack(struct irq_data *data)
+{
+	struct intc_data *priv = data->domain->host_data;
+	irq_hw_number_t hwirq = irqd_to_hwirq(data);
+	u32 reg;
+
+	raw_spin_lock(&priv->lock);
+	reg = __raw_readl(priv->reg);
+	__raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)),
+		     priv->reg);
+	if (priv->toggle_clear_on_ack)
+		__raw_writel(reg, priv->reg);
+	raw_spin_unlock(&priv->lock);
+}
+
+static void bcm6345_ext_intc_irq_mask(struct irq_data *data)
+{
+	struct intc_data *priv = data->domain->host_data;
+	irq_hw_number_t hwirq = irqd_to_hwirq(data);
+	u32 reg;
+
+	raw_spin_lock(&priv->lock);
+	reg = __raw_readl(priv->reg);
+	reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift));
+	__raw_writel(reg, priv->reg);
+	raw_spin_unlock(&priv->lock);
+}
+
+static void bcm6345_ext_intc_irq_unmask(struct irq_data *data)
+{
+	struct intc_data *priv = data->domain->host_data;
+	irq_hw_number_t hwirq = irqd_to_hwirq(data);
+	u32 reg;
+
+	raw_spin_lock(&priv->lock);
+	reg = __raw_readl(priv->reg);
+	reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift);
+	__raw_writel(reg, priv->reg);
+	raw_spin_unlock(&priv->lock);
+}
+
+static int bcm6345_ext_intc_set_type(struct irq_data *data,
+				     unsigned int flow_type)
+{
+	struct intc_data *priv = data->domain->host_data;
+	irq_hw_number_t hwirq = irqd_to_hwirq(data);
+	bool levelsense = 0, sense = 0, bothedge = 0;
+	u32 reg;
+
+	flow_type &= IRQ_TYPE_SENSE_MASK;
+
+	if (flow_type == IRQ_TYPE_NONE)
+		flow_type = IRQ_TYPE_LEVEL_LOW;
+
+	switch (flow_type) {
+	case IRQ_TYPE_EDGE_BOTH:
+		bothedge = 1;
+		break;
+
+	case IRQ_TYPE_EDGE_RISING:
+		sense = 1;
+		break;
+
+	case IRQ_TYPE_EDGE_FALLING:
+		break;
+
+	case IRQ_TYPE_LEVEL_HIGH:
+		levelsense = 1;
+		sense = 1;
+		break;
+
+	case IRQ_TYPE_LEVEL_LOW:
+		levelsense = 1;
+		break;
+
+	default:
+		pr_err("bogus flow type combination given!\n");
+		return -EINVAL;
+	}
+
+	raw_spin_lock(&priv->lock);
+	reg = __raw_readl(priv->reg);
+
+	if (levelsense)
+		reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift);
+	else
+		reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift));
+	if (sense)
+		reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift);
+	else
+		reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift));
+	if (bothedge)
+		reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift);
+	else
+		reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift));
+
+	__raw_writel(reg, priv->reg);
+	raw_spin_unlock(&priv->lock);
+
+	irqd_set_trigger_type(data, flow_type);
+	if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
+		irq_set_handler_locked(data, handle_level_irq);
+	else
+		irq_set_handler_locked(data, handle_edge_irq);
+
+	return 0;
+}
+
+static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq,
+				irq_hw_number_t hw)
+{
+	struct intc_data *priv = d->host_data;
+
+	irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
+
+	return 0;
+}
+
+static const struct irq_domain_ops bcm6345_ext_domain_ops = {
+	.xlate = irq_domain_xlate_twocell,
+	.map = bcm6345_ext_intc_map,
+};
+
+static int __init bcm6345_ext_intc_init(struct device_node *node,
+					int num_irqs, int *irqs,
+					void __iomem *reg, int shift,
+					bool toggle_clear_on_ack)
+{
+	struct intc_data *data;
+	unsigned int i;
+
+	data = kzalloc(sizeof(*data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	raw_spin_lock_init(&data->lock);
+
+	for (i = 0; i < num_irqs; i++) {
+		data->parent_irq[i] = irqs[i];
+
+		irq_set_handler_data(irqs[i], data);
+		irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle);
+	}
+
+	data->reg = reg;
+	data->shift = shift;
+	data->toggle_clear_on_ack = toggle_clear_on_ack;
+
+	data->chip.name = "bcm6345-ext-intc";
+	data->chip.irq_ack = bcm6345_ext_intc_irq_ack;
+	data->chip.irq_mask = bcm6345_ext_intc_irq_mask;
+	data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask;
+	data->chip.irq_set_type = bcm6345_ext_intc_set_type;
+
+	data->domain = irq_domain_add_simple(node, num_irqs, 0,
+					     &bcm6345_ext_domain_ops, data);
+	if (!data->domain) {
+		kfree(data);
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+static int __init bcm6345_ext_intc_of_init(struct device_node *node,
+					   struct device_node *parent)
+{
+	int num_irqs, ret = -EINVAL;
+	unsigned i;
+	void __iomem *base;
+	int irqs[MAX_IRQS] = { 0 };
+	u32 shift;
+	bool toggle_clear_on_ack = false;
+
+	num_irqs = of_irq_count(node);
+
+	if (!num_irqs || num_irqs > MAX_IRQS)
+		return -EINVAL;
+
+	if (of_property_read_u32(node, "brcm,field-width", &shift))
+		shift = 4;
+
+	/* On BCM6318 setting CLEAR seems to continuously mask interrupts */
+	if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc"))
+		toggle_clear_on_ack = true;
+
+	for (i = 0; i < num_irqs; i++) {
+		irqs[i] = irq_of_parse_and_map(node, i);
+		if (!irqs[i])
+			return -ENOMEM;
+	}
+
+	base = of_iomap(node, 0);
+	if (!base)
+		return -ENXIO;
+
+	ret = bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift,
+				    toggle_clear_on_ack);
+	if (!ret)
+		return 0;
+
+	iounmap(base);
+
+	for (i = 0; i < num_irqs; i++)
+		irq_dispose_mapping(irqs[i]);
+
+	return ret;
+}
+
+IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc",
+		bcm6345_ext_intc_of_init);
+IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc",
+		bcm6345_ext_intc_of_init);
-- 
2.20.1

Re: [PATCH 2/2] irqchip: add support for BCM6345 interrupt controller

[kernel test robot]

[-- Attachment #1: Type: text/plain, Size: 3357 bytes --]

Hi "Álvaro,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on tip/irq/core]
[also build test ERROR on v5.11 next-20210223]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/lvaro-Fern-ndez-Rojas/irqchip-add-support-for-BCM6345-interrupt-controller/20210224-021254
base:   https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git 0b6d70e571a1c764ab079e5c31d4156feee4b06b
config: s390-allmodconfig (attached as .config)
compiler: s390-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/b150214898982b67d7c34b848b445e5e557691c6
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review lvaro-Fern-ndez-Rojas/irqchip-add-support-for-BCM6345-interrupt-controller/20210224-021254
        git checkout b150214898982b67d7c34b848b445e5e557691c6
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=s390 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

   s390-linux-ld: kernel/dma/coherent.o: in function `dma_init_coherent_memory':
   coherent.c:(.text+0x4f0): undefined reference to `memremap'
   s390-linux-ld: coherent.c:(.text+0x702): undefined reference to `memunmap'
   s390-linux-ld: kernel/dma/coherent.o: in function `dma_declare_coherent_memory':
   coherent.c:(.text+0xf36): undefined reference to `memunmap'
   s390-linux-ld: drivers/irqchip/irq-al-fic.o: in function `al_fic_init_dt':
   irq-al-fic.c:(.init.text+0xc8): undefined reference to `of_iomap'
   s390-linux-ld: irq-al-fic.c:(.init.text+0x814): undefined reference to `iounmap'
   s390-linux-ld: drivers/irqchip/irq-bcm6345-ext.o: in function `bcm6345_ext_intc_of_init':
>> irq-bcm6345-ext.c:(.init.text+0x3bc): undefined reference to `of_iomap'
>> s390-linux-ld: irq-bcm6345-ext.c:(.init.text+0x7b4): undefined reference to `iounmap'
   s390-linux-ld: drivers/clk/clk-fixed-mmio.o: in function `fixed_mmio_clk_setup':
   clk-fixed-mmio.c:(.text+0xaa): undefined reference to `of_iomap'
   s390-linux-ld: clk-fixed-mmio.c:(.text+0x146): undefined reference to `iounmap'
   s390-linux-ld: drivers/clocksource/timer-of.o: in function `timer_of_init':
   timer-of.c:(.init.text+0x1d2): undefined reference to `of_iomap'
   s390-linux-ld: timer-of.c:(.init.text+0xce4): undefined reference to `iounmap'
   s390-linux-ld: drivers/clocksource/timer-of.o: in function `timer_of_cleanup':
   timer-of.c:(.init.text+0x103e): undefined reference to `iounmap'
   s390-linux-ld: drivers/clocksource/timer-microchip-pit64b.o: in function `mchp_pit64b_dt_init_timer':
   timer-microchip-pit64b.c:(.init.text+0x3aa): undefined reference to `of_iomap'
   s390-linux-ld: timer-microchip-pit64b.c:(.init.text+0x1196): undefined reference to `iounmap'

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 27943 bytes --]

[PATCH v2 0/2] irqchip: add support for BCM6345 interrupt controller

[Álvaro Fernández Rojas]

This interrupt controller is present on bcm63xx SoCs in order to generate
interrupts based on GPIO status changes.

v2: fix documentation title typo.

Álvaro Fernández Rojas (2):
  dt-bindings: interrupt-controller: document BCM6345 external interrupt
    controller
  irqchip: add support for BCM6345 interrupt controller

 .../brcm,bcm6345-ext-intc.yaml                |  61 ++++
 drivers/irqchip/Kconfig                       |   4 +
 drivers/irqchip/Makefile                      |   1 +
 drivers/irqchip/irq-bcm6345-ext.c             | 271 ++++++++++++++++++
 4 files changed, 337 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
 create mode 100644 drivers/irqchip/irq-bcm6345-ext.c

-- 
2.20.1

[PATCH v2 1/2] dt-bindings: interrupt-controller: document BCM6345 external interrupt controller

[Álvaro Fernández Rojas]

Document the binding for the BCM6345 external interrupt controller.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
 v2: fix title typo.

 .../brcm,bcm6345-ext-intc.yaml                | 61 +++++++++++++++++++
 1 file changed, 61 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
new file mode 100644
index 000000000000..b29a3221a6d1
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm6345-ext-intc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM6345 external interrupt controller
+
+maintainers:
+  - Álvaro Fernández Rojas <noltari@gmail.com>
+  - Jonas Gorski <jonas.gorski@gmail.com>
+
+properties:
+  compatible:
+    enum:
+      - brcm,bcm6318-ext-intc
+      - brcm,bcm6345-ext-intc
+
+  interrupt-parent:
+    description: Specifies the phandle to the parent interrupt controller
+      this one is cascaded from.
+
+  "#interrupt-cells":
+    const: 2
+
+  reg:
+    maxItems: 1
+
+  "#address-cells":
+    const: 0
+
+  interrupt-controller: true
+
+  interrupts:
+    description: Specifies the interrupt line(s) in the interrupt-parent
+      controller node, valid values depend on the type of parent interrupt
+      controller.
+    maxItems: 4
+
+required:
+  - compatible
+  - interrupt-parent
+  - "#interrupt-cells"
+  - reg
+  - "#address-cells"
+  - interrupt-controller
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    ext_intc: interrupt-controller@10000018 {
+      compatible = "brcm,bcm6345-ext-intc";
+      interrupt-parent = <&periph_intc>;
+      #interrupt-cells = <2>;
+      reg = <0x10000018 0x4>;
+      #address-cells = <0>;
+      interrupt-controller;
+      interrupts = <24>, <25>, <26>, <27>;
+    };
-- 
2.20.1

Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: document BCM6345 external interrupt controller

[Florian Fainelli]

On 2/23/2021 12:43 PM, Álvaro Fernández Rojas wrote:
> Document the binding for the BCM6345 external interrupt controller.
> 
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-- 
Florian

Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: document BCM6345 external interrupt controller

[Rob Herring]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain, Size: 1575 bytes --]

On Tue, 23 Feb 2021 21:43:39 +0100, Álvaro Fernández Rojas wrote:
> Document the binding for the BCM6345 external interrupt controller.
> 
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
> ---
>  v2: fix title typo.
> 
>  .../brcm,bcm6345-ext-intc.yaml                | 61 +++++++++++++++++++
>  1 file changed, 61 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml: properties:interrupt-parent: False schema does not allow {'description': 'Specifies the phandle to the parent interrupt controller this one is cascaded from.'}
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml: ignoring, error in schema: properties: interrupt-parent
warning: no schema found in file: ./Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml

See https://patchwork.ozlabs.org/patch/1443622

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

[PATCH v2 2/2] irqchip: add support for BCM6345 external interrupt controller

[Álvaro Fernández Rojas]

This interrupt controller is present on bcm63xx SoCs in order to generate
interrupts based on GPIO status changes.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
 v2: no changes.

 drivers/irqchip/Kconfig           |   4 +
 drivers/irqchip/Makefile          |   1 +
 drivers/irqchip/irq-bcm6345-ext.c | 271 ++++++++++++++++++++++++++++++
 3 files changed, 276 insertions(+)
 create mode 100644 drivers/irqchip/irq-bcm6345-ext.c

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index e74fa206240a..eaa101939a34 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -113,6 +113,10 @@ config I8259
 	bool
 	select IRQ_DOMAIN
 
+config BCM6345_EXT_IRQ
+	bool "BCM6345 External IRQ Controller"
+	select IRQ_DOMAIN
+
 config BCM6345_L1_IRQ
 	bool
 	select GENERIC_IRQ_CHIP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index c59b95a0532c..3cba65bc0aa5 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -62,6 +62,7 @@ obj-$(CONFIG_XTENSA_MX)			+= irq-xtensa-mx.o
 obj-$(CONFIG_XILINX_INTC)		+= irq-xilinx-intc.o
 obj-$(CONFIG_IRQ_CROSSBAR)		+= irq-crossbar.o
 obj-$(CONFIG_SOC_VF610)			+= irq-vf610-mscm-ir.o
+obj-$(CONFIG_BCM6345_EXT_IRQ)		+= irq-bcm6345-ext.o
 obj-$(CONFIG_BCM6345_L1_IRQ)		+= irq-bcm6345-l1.o
 obj-$(CONFIG_BCM7038_L1_IRQ)		+= irq-bcm7038-l1.o
 obj-$(CONFIG_BCM7120_L2_IRQ)		+= irq-bcm7120-l2.o
diff --git a/drivers/irqchip/irq-bcm6345-ext.c b/drivers/irqchip/irq-bcm6345-ext.c
new file mode 100644
index 000000000000..5721ac8de295
--- /dev/null
+++ b/drivers/irqchip/irq-bcm6345-ext.c
@@ -0,0 +1,271 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Broadcom BCM6345 style external interrupt controller driver
+ *
+ * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
+ * Copyright (C) 2014 Jonas Gorski <jonas.gorski@gmail.com>
+ */
+
+#include <linux/ioport.h>
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/irqchip/chained_irq.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+
+#define MAX_IRQS		4
+
+#define EXTIRQ_CFG_SENSE	0
+#define EXTIRQ_CFG_STAT		1
+#define EXTIRQ_CFG_CLEAR	2
+#define EXTIRQ_CFG_MASK		3
+#define EXTIRQ_CFG_BOTHEDGE	4
+#define EXTIRQ_CFG_LEVELSENSE	5
+
+struct intc_data {
+	struct irq_chip chip;
+	struct irq_domain *domain;
+	raw_spinlock_t lock;
+
+	int parent_irq[MAX_IRQS];
+	void __iomem *reg;
+	int shift;
+	unsigned int toggle_clear_on_ack:1;
+};
+
+static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc)
+{
+	struct intc_data *data = irq_desc_get_handler_data(desc);
+	struct irq_chip *chip = irq_desc_get_chip(desc);
+	unsigned int irq = irq_desc_get_irq(desc);
+	unsigned int idx;
+
+	chained_irq_enter(chip, desc);
+
+	for (idx = 0; idx < MAX_IRQS; idx++) {
+		if (data->parent_irq[idx] != irq)
+			continue;
+
+		generic_handle_irq(irq_find_mapping(data->domain, idx));
+	}
+
+	chained_irq_exit(chip, desc);
+}
+
+static void bcm6345_ext_intc_irq_ack(struct irq_data *data)
+{
+	struct intc_data *priv = data->domain->host_data;
+	irq_hw_number_t hwirq = irqd_to_hwirq(data);
+	u32 reg;
+
+	raw_spin_lock(&priv->lock);
+	reg = __raw_readl(priv->reg);
+	__raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)),
+		     priv->reg);
+	if (priv->toggle_clear_on_ack)
+		__raw_writel(reg, priv->reg);
+	raw_spin_unlock(&priv->lock);
+}
+
+static void bcm6345_ext_intc_irq_mask(struct irq_data *data)
+{
+	struct intc_data *priv = data->domain->host_data;
+	irq_hw_number_t hwirq = irqd_to_hwirq(data);
+	u32 reg;
+
+	raw_spin_lock(&priv->lock);
+	reg = __raw_readl(priv->reg);
+	reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift));
+	__raw_writel(reg, priv->reg);
+	raw_spin_unlock(&priv->lock);
+}
+
+static void bcm6345_ext_intc_irq_unmask(struct irq_data *data)
+{
+	struct intc_data *priv = data->domain->host_data;
+	irq_hw_number_t hwirq = irqd_to_hwirq(data);
+	u32 reg;
+
+	raw_spin_lock(&priv->lock);
+	reg = __raw_readl(priv->reg);
+	reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift);
+	__raw_writel(reg, priv->reg);
+	raw_spin_unlock(&priv->lock);
+}
+
+static int bcm6345_ext_intc_set_type(struct irq_data *data,
+				     unsigned int flow_type)
+{
+	struct intc_data *priv = data->domain->host_data;
+	irq_hw_number_t hwirq = irqd_to_hwirq(data);
+	bool levelsense = 0, sense = 0, bothedge = 0;
+	u32 reg;
+
+	flow_type &= IRQ_TYPE_SENSE_MASK;
+
+	if (flow_type == IRQ_TYPE_NONE)
+		flow_type = IRQ_TYPE_LEVEL_LOW;
+
+	switch (flow_type) {
+	case IRQ_TYPE_EDGE_BOTH:
+		bothedge = 1;
+		break;
+
+	case IRQ_TYPE_EDGE_RISING:
+		sense = 1;
+		break;
+
+	case IRQ_TYPE_EDGE_FALLING:
+		break;
+
+	case IRQ_TYPE_LEVEL_HIGH:
+		levelsense = 1;
+		sense = 1;
+		break;
+
+	case IRQ_TYPE_LEVEL_LOW:
+		levelsense = 1;
+		break;
+
+	default:
+		pr_err("bogus flow type combination given!\n");
+		return -EINVAL;
+	}
+
+	raw_spin_lock(&priv->lock);
+	reg = __raw_readl(priv->reg);
+
+	if (levelsense)
+		reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift);
+	else
+		reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift));
+	if (sense)
+		reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift);
+	else
+		reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift));
+	if (bothedge)
+		reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift);
+	else
+		reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift));
+
+	__raw_writel(reg, priv->reg);
+	raw_spin_unlock(&priv->lock);
+
+	irqd_set_trigger_type(data, flow_type);
+	if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
+		irq_set_handler_locked(data, handle_level_irq);
+	else
+		irq_set_handler_locked(data, handle_edge_irq);
+
+	return 0;
+}
+
+static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq,
+				irq_hw_number_t hw)
+{
+	struct intc_data *priv = d->host_data;
+
+	irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
+
+	return 0;
+}
+
+static const struct irq_domain_ops bcm6345_ext_domain_ops = {
+	.xlate = irq_domain_xlate_twocell,
+	.map = bcm6345_ext_intc_map,
+};
+
+static int __init bcm6345_ext_intc_init(struct device_node *node,
+					int num_irqs, int *irqs,
+					void __iomem *reg, int shift,
+					bool toggle_clear_on_ack)
+{
+	struct intc_data *data;
+	unsigned int i;
+
+	data = kzalloc(sizeof(*data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	raw_spin_lock_init(&data->lock);
+
+	for (i = 0; i < num_irqs; i++) {
+		data->parent_irq[i] = irqs[i];
+
+		irq_set_handler_data(irqs[i], data);
+		irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle);
+	}
+
+	data->reg = reg;
+	data->shift = shift;
+	data->toggle_clear_on_ack = toggle_clear_on_ack;
+
+	data->chip.name = "bcm6345-ext-intc";
+	data->chip.irq_ack = bcm6345_ext_intc_irq_ack;
+	data->chip.irq_mask = bcm6345_ext_intc_irq_mask;
+	data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask;
+	data->chip.irq_set_type = bcm6345_ext_intc_set_type;
+
+	data->domain = irq_domain_add_simple(node, num_irqs, 0,
+					     &bcm6345_ext_domain_ops, data);
+	if (!data->domain) {
+		kfree(data);
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+static int __init bcm6345_ext_intc_of_init(struct device_node *node,
+					   struct device_node *parent)
+{
+	int num_irqs, ret = -EINVAL;
+	unsigned i;
+	void __iomem *base;
+	int irqs[MAX_IRQS] = { 0 };
+	u32 shift;
+	bool toggle_clear_on_ack = false;
+
+	num_irqs = of_irq_count(node);
+
+	if (!num_irqs || num_irqs > MAX_IRQS)
+		return -EINVAL;
+
+	if (of_property_read_u32(node, "brcm,field-width", &shift))
+		shift = 4;
+
+	/* On BCM6318 setting CLEAR seems to continuously mask interrupts */
+	if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc"))
+		toggle_clear_on_ack = true;
+
+	for (i = 0; i < num_irqs; i++) {
+		irqs[i] = irq_of_parse_and_map(node, i);
+		if (!irqs[i])
+			return -ENOMEM;
+	}
+
+	base = of_iomap(node, 0);
+	if (!base)
+		return -ENXIO;
+
+	ret = bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift,
+				    toggle_clear_on_ack);
+	if (!ret)
+		return 0;
+
+	iounmap(base);
+
+	for (i = 0; i < num_irqs; i++)
+		irq_dispose_mapping(irqs[i]);
+
+	return ret;
+}
+
+IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc",
+		bcm6345_ext_intc_of_init);
+IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc",
+		bcm6345_ext_intc_of_init);
-- 
2.20.1

Re: [PATCH v2 2/2] irqchip: add support for BCM6345 external interrupt controller

[Florian Fainelli]

On 2/23/2021 12:43 PM, Álvaro Fernández Rojas wrote:
> This interrupt controller is present on bcm63xx SoCs in order to generate
> interrupts based on GPIO status changes.
> 
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
> ---

[snip]
> +static int __init bcm6345_ext_intc_of_init(struct device_node *node,
> +					   struct device_node *parent)
> +{
> +	int num_irqs, ret = -EINVAL;
> +	unsigned i;
> +	void __iomem *base;
> +	int irqs[MAX_IRQS] = { 0 };
> +	u32 shift;
> +	bool toggle_clear_on_ack = false;
> +
> +	num_irqs = of_irq_count(node);
> +
> +	if (!num_irqs || num_irqs > MAX_IRQS)
> +		return -EINVAL;
> +
> +	if (of_property_read_u32(node, "brcm,field-width", &shift))
> +		shift = 4;

This property is not documented in the binding, other than that:

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-- 
Florian

Re: [PATCH v2 2/2] irqchip: add support for BCM6345 external interrupt controller

[Álvaro Fernández Rojas]

Hi Florian,

> El 24 feb 2021, a las 4:43, Florian Fainelli <f.fainelli@gmail.com> escribió:
> 
> 
> 
> On 2/23/2021 12:43 PM, Álvaro Fernández Rojas wrote:
>> This interrupt controller is present on bcm63xx SoCs in order to generate
>> interrupts based on GPIO status changes.
>> 
>> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
>> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
>> ---
> 
> [snip]
>> +static int __init bcm6345_ext_intc_of_init(struct device_node *node,
>> +					   struct device_node *parent)
>> +{
>> +	int num_irqs, ret = -EINVAL;
>> +	unsigned i;
>> +	void __iomem *base;
>> +	int irqs[MAX_IRQS] = { 0 };
>> +	u32 shift;
>> +	bool toggle_clear_on_ack = false;
>> +
>> +	num_irqs = of_irq_count(node);
>> +
>> +	if (!num_irqs || num_irqs > MAX_IRQS)
>> +		return -EINVAL;
>> +
>> +	if (of_property_read_u32(node, "brcm,field-width", &shift))
>> +		shift = 4;
> 
> This property is not documented in the binding, other than that:

Nice catch, I will add it in next version.

> 
> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
> -- 
> Florian

[PATCH v2 0/2] irqchip: add support for BCM6345 interrupt controller

[Álvaro Fernández Rojas]

This interrupt controller is present on bcm63xx SoCs in order to generate
interrupts based on GPIO status changes.

v3: pass dt_binding_check.
v2: fix documentation title typo.

Álvaro Fernández Rojas (2):
  dt-bindings: interrupt-controller: document BCM6345 external interrupt
    controller
  irqchip: add support for BCM6345 external interrupt controller

 .../brcm,bcm6345-ext-intc.yaml                |  78 +++++
 drivers/irqchip/Kconfig                       |   4 +
 drivers/irqchip/Makefile                      |   1 +
 drivers/irqchip/irq-bcm6345-ext.c             | 271 ++++++++++++++++++
 4 files changed, 354 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
 create mode 100644 drivers/irqchip/irq-bcm6345-ext.c

-- 
2.20.1

[PATCH v2 1/2] dt-bindings: interrupt-controller: document BCM6345 external interrupt controller

[Álvaro Fernández Rojas]

Document the binding for the BCM6345 external interrupt controller.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
---
 v3: pass dt_binding_check.
 v2: fix title typo.

 .../brcm,bcm6345-ext-intc.yaml                | 78 +++++++++++++++++++
 1 file changed, 78 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
new file mode 100644
index 000000000000..a691510e78b7
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm6345-ext-intc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom BCM6345 external interrupt controller
+
+maintainers:
+  - Álvaro Fernández Rojas <noltari@gmail.com>
+  - Jonas Gorski <jonas.gorski@gmail.com>
+
+properties:
+  compatible:
+    enum:
+      - brcm,bcm6318-ext-intc
+      - brcm,bcm6345-ext-intc
+
+  "#interrupt-cells":
+    const: 2
+
+  reg:
+    maxItems: 1
+
+  "#address-cells":
+    const: 0
+
+  interrupt-controller: true
+
+  interrupts:
+    description: Specifies the interrupt line(s) in the interrupt-parent
+      controller node. Valid values depend on the type of parent interrupt
+      controller.
+    maxItems: 4
+
+  brcm,field-width:
+    description: Interrupt controller field width (the default is 4).
+    maxItems: 1
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+required:
+  - "#address-cells"
+  - compatible
+  - reg
+  - "#interrupt-cells"
+  - interrupt-controller
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    interrupt-controller@10000018 {
+      #address-cells = <0>;
+      compatible = "brcm,bcm6345-ext-intc";
+      reg = <0x10000018 0x4>;
+
+      interrupt-parent = <&periph_intc>;
+      #interrupt-cells = <2>;
+
+      interrupt-controller;
+      interrupts = <24>, <25>, <26>, <27>;
+    };
+
+  - |
+    interrupt-controller@fffe0014 {
+      #address-cells = <0>;
+      compatible = "brcm,bcm6345-ext-intc";
+      reg = <0xfffe0014 0x4>;
+
+      interrupt-controller;
+      #interrupt-cells = <2>;
+
+      interrupt-parent = <&cpu_intc>;
+      interrupts = <3>, <4>, <5>, <6>;
+
+      brcm,field-width = <5>;
+    };
-- 
2.20.1

Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: document BCM6345 external interrupt controller

[Rob Herring]

On Wed, Feb 24, 2021 at 08:56:39AM +0100, Álvaro Fernández Rojas wrote:
> Document the binding for the BCM6345 external interrupt controller.
> 
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
> ---
>  v3: pass dt_binding_check.
>  v2: fix title typo.
> 
>  .../brcm,bcm6345-ext-intc.yaml                | 78 +++++++++++++++++++
>  1 file changed, 78 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
> new file mode 100644
> index 000000000000..a691510e78b7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
> @@ -0,0 +1,78 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm6345-ext-intc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Broadcom BCM6345 external interrupt controller
> +
> +maintainers:
> +  - Álvaro Fernández Rojas <noltari@gmail.com>
> +  - Jonas Gorski <jonas.gorski@gmail.com>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - brcm,bcm6318-ext-intc
> +      - brcm,bcm6345-ext-intc
> +
> +  "#interrupt-cells":
> +    const: 2
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#address-cells":
> +    const: 0
> +
> +  interrupt-controller: true
> +
> +  interrupts:
> +    description: Specifies the interrupt line(s) in the interrupt-parent
> +      controller node. Valid values depend on the type of parent interrupt
> +      controller.
> +    maxItems: 4
> +
> +  brcm,field-width:
> +    description: Interrupt controller field width (the default is 4).

default: 4

> +    maxItems: 1

All uint32's are 1 item.

What's the set or range of values?

> +    $ref: /schemas/types.yaml#/definitions/uint32
> +
> +required:
> +  - "#address-cells"
> +  - compatible
> +  - reg
> +  - "#interrupt-cells"
> +  - interrupt-controller
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    interrupt-controller@10000018 {
> +      #address-cells = <0>;
> +      compatible = "brcm,bcm6345-ext-intc";
> +      reg = <0x10000018 0x4>;
> +
> +      interrupt-parent = <&periph_intc>;
> +      #interrupt-cells = <2>;
> +
> +      interrupt-controller;
> +      interrupts = <24>, <25>, <26>, <27>;
> +    };
> +
> +  - |
> +    interrupt-controller@fffe0014 {
> +      #address-cells = <0>;
> +      compatible = "brcm,bcm6345-ext-intc";
> +      reg = <0xfffe0014 0x4>;
> +
> +      interrupt-controller;
> +      #interrupt-cells = <2>;
> +
> +      interrupt-parent = <&cpu_intc>;
> +      interrupts = <3>, <4>, <5>, <6>;
> +
> +      brcm,field-width = <5>;
> +    };
> -- 
> 2.20.1
> 

Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: document BCM6345 external interrupt controller

[Álvaro Fernández Rojas]

Hi Rob,

El 06/03/2021 a las 21:14, Rob Herring escribió:
> On Wed, Feb 24, 2021 at 08:56:39AM +0100, Álvaro Fernández Rojas wrote:
>> Document the binding for the BCM6345 external interrupt controller.
>>
>> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
>> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
>> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
>> ---
>>   v3: pass dt_binding_check.
>>   v2: fix title typo.
>>
>>   .../brcm,bcm6345-ext-intc.yaml                | 78 +++++++++++++++++++
>>   1 file changed, 78 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
>> new file mode 100644
>> index 000000000000..a691510e78b7
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
>> @@ -0,0 +1,78 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm6345-ext-intc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Broadcom BCM6345 external interrupt controller
>> +
>> +maintainers:
>> +  - Álvaro Fernández Rojas <noltari@gmail.com>
>> +  - Jonas Gorski <jonas.gorski@gmail.com>
>> +
>> +properties:
>> +  compatible:
>> +    enum:
>> +      - brcm,bcm6318-ext-intc
>> +      - brcm,bcm6345-ext-intc
>> +
>> +  "#interrupt-cells":
>> +    const: 2
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  "#address-cells":
>> +    const: 0
>> +
>> +  interrupt-controller: true
>> +
>> +  interrupts:
>> +    description: Specifies the interrupt line(s) in the interrupt-parent
>> +      controller node. Valid values depend on the type of parent interrupt
>> +      controller.
>> +    maxItems: 4
>> +
>> +  brcm,field-width:
>> +    description: Interrupt controller field width (the default is 4).
> 
> default: 4
> 
>> +    maxItems: 1
> 
> All uint32's are 1 item.

Ok, so I should remove this :)

> 
> What's the set or range of values?

Only BCM6348 needs to set this value to 5, other BCM63xx use the default 
value of 4 (BCM3368, BCM6318, BCM6328, BCM6338, BCM6345, BCM6358, 
BCM6362, BCM6368, BCM63268).

> 
>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> +
>> +required:
>> +  - "#address-cells"
>> +  - compatible
>> +  - reg
>> +  - "#interrupt-cells"
>> +  - interrupt-controller
>> +  - interrupts
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    interrupt-controller@10000018 {
>> +      #address-cells = <0>;
>> +      compatible = "brcm,bcm6345-ext-intc";
>> +      reg = <0x10000018 0x4>;
>> +
>> +      interrupt-parent = <&periph_intc>;
>> +      #interrupt-cells = <2>;
>> +
>> +      interrupt-controller;
>> +      interrupts = <24>, <25>, <26>, <27>;
>> +    };
>> +
>> +  - |
>> +    interrupt-controller@fffe0014 {
>> +      #address-cells = <0>;
>> +      compatible = "brcm,bcm6345-ext-intc";
>> +      reg = <0xfffe0014 0x4>;
>> +
>> +      interrupt-controller;
>> +      #interrupt-cells = <2>;
>> +
>> +      interrupt-parent = <&cpu_intc>;
>> +      interrupts = <3>, <4>, <5>, <6>;
>> +
>> +      brcm,field-width = <5>;
>> +    };
>> -- 
>> 2.20.1
>>

Best regards,
Álvaro.

Re: [PATCH v2 1/2] dt-bindings: interrupt-controller: document BCM6345 external interrupt controller

[Rob Herring]

On Sun, Mar 7, 2021 at 3:12 AM Álvaro Fernández Rojas <noltari@gmail.com> wrote:
>
> Hi Rob,
>
> El 06/03/2021 a las 21:14, Rob Herring escribió:
> > On Wed, Feb 24, 2021 at 08:56:39AM +0100, Álvaro Fernández Rojas wrote:
> >> Document the binding for the BCM6345 external interrupt controller.
> >>
> >> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> >> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
> >> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
> >> ---
> >>   v3: pass dt_binding_check.
> >>   v2: fix title typo.
> >>
> >>   .../brcm,bcm6345-ext-intc.yaml                | 78 +++++++++++++++++++
> >>   1 file changed, 78 insertions(+)
> >>   create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
> >>
> >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
> >> new file mode 100644
> >> index 000000000000..a691510e78b7
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
> >> @@ -0,0 +1,78 @@
> >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> >> +%YAML 1.2
> >> +---
> >> +$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm6345-ext-intc.yaml#
> >> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >> +
> >> +title: Broadcom BCM6345 external interrupt controller
> >> +
> >> +maintainers:
> >> +  - Álvaro Fernández Rojas <noltari@gmail.com>
> >> +  - Jonas Gorski <jonas.gorski@gmail.com>
> >> +
> >> +properties:
> >> +  compatible:
> >> +    enum:
> >> +      - brcm,bcm6318-ext-intc
> >> +      - brcm,bcm6345-ext-intc
> >> +
> >> +  "#interrupt-cells":
> >> +    const: 2
> >> +
> >> +  reg:
> >> +    maxItems: 1
> >> +
> >> +  "#address-cells":
> >> +    const: 0
> >> +
> >> +  interrupt-controller: true
> >> +
> >> +  interrupts:
> >> +    description: Specifies the interrupt line(s) in the interrupt-parent
> >> +      controller node. Valid values depend on the type of parent interrupt
> >> +      controller.
> >> +    maxItems: 4
> >> +
> >> +  brcm,field-width:
> >> +    description: Interrupt controller field width (the default is 4).
> >
> > default: 4
> >
> >> +    maxItems: 1
> >
> > All uint32's are 1 item.
>
> Ok, so I should remove this :)
>
> >
> > What's the set or range of values?
>
> Only BCM6348 needs to set this value to 5, other BCM63xx use the default
> value of 4 (BCM3368, BCM6318, BCM6328, BCM6338, BCM6345, BCM6358,
> BCM6362, BCM6368, BCM63268).

So:

enum: [ 4, 5 ]

[PATCH v2 2/2] irqchip: add support for BCM6345 external interrupt controller

[Álvaro Fernández Rojas]

This interrupt controller is present on bcm63xx SoCs in order to generate
interrupts based on GPIO status changes.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
---
 v3: no changes.
 v2: no changes.

 drivers/irqchip/Kconfig           |   4 +
 drivers/irqchip/Makefile          |   1 +
 drivers/irqchip/irq-bcm6345-ext.c | 271 ++++++++++++++++++++++++++++++
 3 files changed, 276 insertions(+)
 create mode 100644 drivers/irqchip/irq-bcm6345-ext.c

diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index e74fa206240a..eaa101939a34 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -113,6 +113,10 @@ config I8259
 	bool
 	select IRQ_DOMAIN
 
+config BCM6345_EXT_IRQ
+	bool "BCM6345 External IRQ Controller"
+	select IRQ_DOMAIN
+
 config BCM6345_L1_IRQ
 	bool
 	select GENERIC_IRQ_CHIP
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index c59b95a0532c..3cba65bc0aa5 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -62,6 +62,7 @@ obj-$(CONFIG_XTENSA_MX)			+= irq-xtensa-mx.o
 obj-$(CONFIG_XILINX_INTC)		+= irq-xilinx-intc.o
 obj-$(CONFIG_IRQ_CROSSBAR)		+= irq-crossbar.o
 obj-$(CONFIG_SOC_VF610)			+= irq-vf610-mscm-ir.o
+obj-$(CONFIG_BCM6345_EXT_IRQ)		+= irq-bcm6345-ext.o
 obj-$(CONFIG_BCM6345_L1_IRQ)		+= irq-bcm6345-l1.o
 obj-$(CONFIG_BCM7038_L1_IRQ)		+= irq-bcm7038-l1.o
 obj-$(CONFIG_BCM7120_L2_IRQ)		+= irq-bcm7120-l2.o
diff --git a/drivers/irqchip/irq-bcm6345-ext.c b/drivers/irqchip/irq-bcm6345-ext.c
new file mode 100644
index 000000000000..5721ac8de295
--- /dev/null
+++ b/drivers/irqchip/irq-bcm6345-ext.c
@@ -0,0 +1,271 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Broadcom BCM6345 style external interrupt controller driver
+ *
+ * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
+ * Copyright (C) 2014 Jonas Gorski <jonas.gorski@gmail.com>
+ */
+
+#include <linux/ioport.h>
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/irqchip/chained_irq.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+
+#define MAX_IRQS		4
+
+#define EXTIRQ_CFG_SENSE	0
+#define EXTIRQ_CFG_STAT		1
+#define EXTIRQ_CFG_CLEAR	2
+#define EXTIRQ_CFG_MASK		3
+#define EXTIRQ_CFG_BOTHEDGE	4
+#define EXTIRQ_CFG_LEVELSENSE	5
+
+struct intc_data {
+	struct irq_chip chip;
+	struct irq_domain *domain;
+	raw_spinlock_t lock;
+
+	int parent_irq[MAX_IRQS];
+	void __iomem *reg;
+	int shift;
+	unsigned int toggle_clear_on_ack:1;
+};
+
+static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc)
+{
+	struct intc_data *data = irq_desc_get_handler_data(desc);
+	struct irq_chip *chip = irq_desc_get_chip(desc);
+	unsigned int irq = irq_desc_get_irq(desc);
+	unsigned int idx;
+
+	chained_irq_enter(chip, desc);
+
+	for (idx = 0; idx < MAX_IRQS; idx++) {
+		if (data->parent_irq[idx] != irq)
+			continue;
+
+		generic_handle_irq(irq_find_mapping(data->domain, idx));
+	}
+
+	chained_irq_exit(chip, desc);
+}
+
+static void bcm6345_ext_intc_irq_ack(struct irq_data *data)
+{
+	struct intc_data *priv = data->domain->host_data;
+	irq_hw_number_t hwirq = irqd_to_hwirq(data);
+	u32 reg;
+
+	raw_spin_lock(&priv->lock);
+	reg = __raw_readl(priv->reg);
+	__raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)),
+		     priv->reg);
+	if (priv->toggle_clear_on_ack)
+		__raw_writel(reg, priv->reg);
+	raw_spin_unlock(&priv->lock);
+}
+
+static void bcm6345_ext_intc_irq_mask(struct irq_data *data)
+{
+	struct intc_data *priv = data->domain->host_data;
+	irq_hw_number_t hwirq = irqd_to_hwirq(data);
+	u32 reg;
+
+	raw_spin_lock(&priv->lock);
+	reg = __raw_readl(priv->reg);
+	reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift));
+	__raw_writel(reg, priv->reg);
+	raw_spin_unlock(&priv->lock);
+}
+
+static void bcm6345_ext_intc_irq_unmask(struct irq_data *data)
+{
+	struct intc_data *priv = data->domain->host_data;
+	irq_hw_number_t hwirq = irqd_to_hwirq(data);
+	u32 reg;
+
+	raw_spin_lock(&priv->lock);
+	reg = __raw_readl(priv->reg);
+	reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift);
+	__raw_writel(reg, priv->reg);
+	raw_spin_unlock(&priv->lock);
+}
+
+static int bcm6345_ext_intc_set_type(struct irq_data *data,
+				     unsigned int flow_type)
+{
+	struct intc_data *priv = data->domain->host_data;
+	irq_hw_number_t hwirq = irqd_to_hwirq(data);
+	bool levelsense = 0, sense = 0, bothedge = 0;
+	u32 reg;
+
+	flow_type &= IRQ_TYPE_SENSE_MASK;
+
+	if (flow_type == IRQ_TYPE_NONE)
+		flow_type = IRQ_TYPE_LEVEL_LOW;
+
+	switch (flow_type) {
+	case IRQ_TYPE_EDGE_BOTH:
+		bothedge = 1;
+		break;
+
+	case IRQ_TYPE_EDGE_RISING:
+		sense = 1;
+		break;
+
+	case IRQ_TYPE_EDGE_FALLING:
+		break;
+
+	case IRQ_TYPE_LEVEL_HIGH:
+		levelsense = 1;
+		sense = 1;
+		break;
+
+	case IRQ_TYPE_LEVEL_LOW:
+		levelsense = 1;
+		break;
+
+	default:
+		pr_err("bogus flow type combination given!\n");
+		return -EINVAL;
+	}
+
+	raw_spin_lock(&priv->lock);
+	reg = __raw_readl(priv->reg);
+
+	if (levelsense)
+		reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift);
+	else
+		reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift));
+	if (sense)
+		reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift);
+	else
+		reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift));
+	if (bothedge)
+		reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift);
+	else
+		reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift));
+
+	__raw_writel(reg, priv->reg);
+	raw_spin_unlock(&priv->lock);
+
+	irqd_set_trigger_type(data, flow_type);
+	if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
+		irq_set_handler_locked(data, handle_level_irq);
+	else
+		irq_set_handler_locked(data, handle_edge_irq);
+
+	return 0;
+}
+
+static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq,
+				irq_hw_number_t hw)
+{
+	struct intc_data *priv = d->host_data;
+
+	irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
+
+	return 0;
+}
+
+static const struct irq_domain_ops bcm6345_ext_domain_ops = {
+	.xlate = irq_domain_xlate_twocell,
+	.map = bcm6345_ext_intc_map,
+};
+
+static int __init bcm6345_ext_intc_init(struct device_node *node,
+					int num_irqs, int *irqs,
+					void __iomem *reg, int shift,
+					bool toggle_clear_on_ack)
+{
+	struct intc_data *data;
+	unsigned int i;
+
+	data = kzalloc(sizeof(*data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	raw_spin_lock_init(&data->lock);
+
+	for (i = 0; i < num_irqs; i++) {
+		data->parent_irq[i] = irqs[i];
+
+		irq_set_handler_data(irqs[i], data);
+		irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle);
+	}
+
+	data->reg = reg;
+	data->shift = shift;
+	data->toggle_clear_on_ack = toggle_clear_on_ack;
+
+	data->chip.name = "bcm6345-ext-intc";
+	data->chip.irq_ack = bcm6345_ext_intc_irq_ack;
+	data->chip.irq_mask = bcm6345_ext_intc_irq_mask;
+	data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask;
+	data->chip.irq_set_type = bcm6345_ext_intc_set_type;
+
+	data->domain = irq_domain_add_simple(node, num_irqs, 0,
+					     &bcm6345_ext_domain_ops, data);
+	if (!data->domain) {
+		kfree(data);
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+static int __init bcm6345_ext_intc_of_init(struct device_node *node,
+					   struct device_node *parent)
+{
+	int num_irqs, ret = -EINVAL;
+	unsigned i;
+	void __iomem *base;
+	int irqs[MAX_IRQS] = { 0 };
+	u32 shift;
+	bool toggle_clear_on_ack = false;
+
+	num_irqs = of_irq_count(node);
+
+	if (!num_irqs || num_irqs > MAX_IRQS)
+		return -EINVAL;
+
+	if (of_property_read_u32(node, "brcm,field-width", &shift))
+		shift = 4;
+
+	/* On BCM6318 setting CLEAR seems to continuously mask interrupts */
+	if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc"))
+		toggle_clear_on_ack = true;
+
+	for (i = 0; i < num_irqs; i++) {
+		irqs[i] = irq_of_parse_and_map(node, i);
+		if (!irqs[i])
+			return -ENOMEM;
+	}
+
+	base = of_iomap(node, 0);
+	if (!base)
+		return -ENXIO;
+
+	ret = bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift,
+				    toggle_clear_on_ack);
+	if (!ret)
+		return 0;
+
+	iounmap(base);
+
+	for (i = 0; i < num_irqs; i++)
+		irq_dispose_mapping(irqs[i]);
+
+	return ret;
+}
+
+IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc",
+		bcm6345_ext_intc_of_init);
+IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc",
+		bcm6345_ext_intc_of_init);
-- 
2.20.1

Re: [PATCH v2 2/2] irqchip: add support for BCM6345 external interrupt controller

[Marc Zyngier]

On Wed, 24 Feb 2021 07:56:40 +0000,
Álvaro Fernández Rojas <noltari@gmail.com> wrote:
> 
> This interrupt controller is present on bcm63xx SoCs in order to generate
> interrupts based on GPIO status changes.
> 
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
> ---
>  v3: no changes.
>  v2: no changes.
> 
>  drivers/irqchip/Kconfig           |   4 +
>  drivers/irqchip/Makefile          |   1 +
>  drivers/irqchip/irq-bcm6345-ext.c | 271 ++++++++++++++++++++++++++++++
>  3 files changed, 276 insertions(+)
>  create mode 100644 drivers/irqchip/irq-bcm6345-ext.c
> 
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index e74fa206240a..eaa101939a34 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -113,6 +113,10 @@ config I8259
>  	bool
>  	select IRQ_DOMAIN
>  
> +config BCM6345_EXT_IRQ
> +	bool "BCM6345 External IRQ Controller"
> +	select IRQ_DOMAIN
> +
>  config BCM6345_L1_IRQ
>  	bool
>  	select GENERIC_IRQ_CHIP
> diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
> index c59b95a0532c..3cba65bc0aa5 100644
> --- a/drivers/irqchip/Makefile
> +++ b/drivers/irqchip/Makefile
> @@ -62,6 +62,7 @@ obj-$(CONFIG_XTENSA_MX)			+= irq-xtensa-mx.o
>  obj-$(CONFIG_XILINX_INTC)		+= irq-xilinx-intc.o
>  obj-$(CONFIG_IRQ_CROSSBAR)		+= irq-crossbar.o
>  obj-$(CONFIG_SOC_VF610)			+= irq-vf610-mscm-ir.o
> +obj-$(CONFIG_BCM6345_EXT_IRQ)		+= irq-bcm6345-ext.o
>  obj-$(CONFIG_BCM6345_L1_IRQ)		+= irq-bcm6345-l1.o
>  obj-$(CONFIG_BCM7038_L1_IRQ)		+= irq-bcm7038-l1.o
>  obj-$(CONFIG_BCM7120_L2_IRQ)		+= irq-bcm7120-l2.o
> diff --git a/drivers/irqchip/irq-bcm6345-ext.c b/drivers/irqchip/irq-bcm6345-ext.c
> new file mode 100644
> index 000000000000..5721ac8de295
> --- /dev/null
> +++ b/drivers/irqchip/irq-bcm6345-ext.c
> @@ -0,0 +1,271 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Broadcom BCM6345 style external interrupt controller driver
> + *
> + * Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
> + * Copyright (C) 2014 Jonas Gorski <jonas.gorski@gmail.com>
> + */
> +
> +#include <linux/ioport.h>
> +#include <linux/irq.h>
> +#include <linux/irqchip.h>
> +#include <linux/irqchip/chained_irq.h>
> +#include <linux/kernel.h>
> +#include <linux/of.h>
> +#include <linux/of_irq.h>
> +#include <linux/of_address.h>
> +#include <linux/slab.h>
> +#include <linux/spinlock.h>
> +
> +#define MAX_IRQS		4
> +
> +#define EXTIRQ_CFG_SENSE	0
> +#define EXTIRQ_CFG_STAT		1
> +#define EXTIRQ_CFG_CLEAR	2
> +#define EXTIRQ_CFG_MASK		3
> +#define EXTIRQ_CFG_BOTHEDGE	4
> +#define EXTIRQ_CFG_LEVELSENSE	5
> +
> +struct intc_data {
> +	struct irq_chip chip;
> +	struct irq_domain *domain;
> +	raw_spinlock_t lock;
> +
> +	int parent_irq[MAX_IRQS];
> +	void __iomem *reg;
> +	int shift;
> +	unsigned int toggle_clear_on_ack:1;

Please use the bool type.

> +};
> +
> +static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc)
> +{
> +	struct intc_data *data = irq_desc_get_handler_data(desc);
> +	struct irq_chip *chip = irq_desc_get_chip(desc);
> +	unsigned int irq = irq_desc_get_irq(desc);
> +	unsigned int idx;
> +
> +	chained_irq_enter(chip, desc);
> +
> +	for (idx = 0; idx < MAX_IRQS; idx++) {
> +		if (data->parent_irq[idx] != irq)
> +			continue;
> +
> +		generic_handle_irq(irq_find_mapping(data->domain, idx));

One parent IRQ per input? Why isn't this a hierarchical interrupt
controller? Even *if* this really has to be a chained interrupt
controller, I'm sure there are better ways to identify the input then
this loop (offset from a base, for example).

> +	}
> +
> +	chained_irq_exit(chip, desc);
> +}
> +
> +static void bcm6345_ext_intc_irq_ack(struct irq_data *data)
> +{
> +	struct intc_data *priv = data->domain->host_data;
> +	irq_hw_number_t hwirq = irqd_to_hwirq(data);
> +	u32 reg;
> +
> +	raw_spin_lock(&priv->lock);
> +	reg = __raw_readl(priv->reg);
> +	__raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)),
> +		     priv->reg);
> +	if (priv->toggle_clear_on_ack)

Under what condition do you need this?

> +		__raw_writel(reg, priv->reg);
> +	raw_spin_unlock(&priv->lock);
> +}
> +
> +static void bcm6345_ext_intc_irq_mask(struct irq_data *data)
> +{
> +	struct intc_data *priv = data->domain->host_data;
> +	irq_hw_number_t hwirq = irqd_to_hwirq(data);
> +	u32 reg;
> +
> +	raw_spin_lock(&priv->lock);
> +	reg = __raw_readl(priv->reg);
> +	reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift));
> +	__raw_writel(reg, priv->reg);
> +	raw_spin_unlock(&priv->lock);
> +}
> +
> +static void bcm6345_ext_intc_irq_unmask(struct irq_data *data)
> +{
> +	struct intc_data *priv = data->domain->host_data;
> +	irq_hw_number_t hwirq = irqd_to_hwirq(data);
> +	u32 reg;
> +
> +	raw_spin_lock(&priv->lock);
> +	reg = __raw_readl(priv->reg);
> +	reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift);
> +	__raw_writel(reg, priv->reg);
> +	raw_spin_unlock(&priv->lock);
> +}
> +
> +static int bcm6345_ext_intc_set_type(struct irq_data *data,
> +				     unsigned int flow_type)
> +{
> +	struct intc_data *priv = data->domain->host_data;
> +	irq_hw_number_t hwirq = irqd_to_hwirq(data);
> +	bool levelsense = 0, sense = 0, bothedge = 0;
> +	u32 reg;
> +
> +	flow_type &= IRQ_TYPE_SENSE_MASK;
> +
> +	if (flow_type == IRQ_TYPE_NONE)

You should never get NONE. If you have that value here, that's
probably a bug somewhere else.

> +		flow_type = IRQ_TYPE_LEVEL_LOW;
> +
> +	switch (flow_type) {
> +	case IRQ_TYPE_EDGE_BOTH:
> +		bothedge = 1;
> +		break;
> +
> +	case IRQ_TYPE_EDGE_RISING:
> +		sense = 1;
> +		break;
> +
> +	case IRQ_TYPE_EDGE_FALLING:
> +		break;
> +
> +	case IRQ_TYPE_LEVEL_HIGH:
> +		levelsense = 1;
> +		sense = 1;
> +		break;
> +
> +	case IRQ_TYPE_LEVEL_LOW:
> +		levelsense = 1;
> +		break;
> +
> +	default:
> +		pr_err("bogus flow type combination given!\n");
> +		return -EINVAL;

How can this happen?

> +	}
> +
> +	raw_spin_lock(&priv->lock);
> +	reg = __raw_readl(priv->reg);
> +
> +	if (levelsense)
> +		reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift);
> +	else
> +		reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift));
> +	if (sense)
> +		reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift);
> +	else
> +		reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift));
> +	if (bothedge)
> +		reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift);
> +	else
> +		reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift));

So all these levelsense, sense and bothedge variables are already
contained in flow_type. Why the need to reinvent the wheel?

> +
> +	__raw_writel(reg, priv->reg);
> +	raw_spin_unlock(&priv->lock);
> +
> +	irqd_set_trigger_type(data, flow_type);
> +	if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
> +		irq_set_handler_locked(data, handle_level_irq);
> +	else
> +		irq_set_handler_locked(data, handle_edge_irq);
> +
> +	return 0;
> +}
> +
> +static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq,
> +				irq_hw_number_t hw)
> +{
> +	struct intc_data *priv = d->host_data;
> +
> +	irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
> +
> +	return 0;
> +}
> +
> +static const struct irq_domain_ops bcm6345_ext_domain_ops = {
> +	.xlate = irq_domain_xlate_twocell,
> +	.map = bcm6345_ext_intc_map,
> +};
> +
> +static int __init bcm6345_ext_intc_init(struct device_node *node,
> +					int num_irqs, int *irqs,
> +					void __iomem *reg, int shift,
> +					bool toggle_clear_on_ack)
> +{
> +	struct intc_data *data;
> +	unsigned int i;
> +
> +	data = kzalloc(sizeof(*data), GFP_KERNEL);
> +	if (!data)
> +		return -ENOMEM;
> +
> +	raw_spin_lock_init(&data->lock);
> +
> +	for (i = 0; i < num_irqs; i++) {
> +		data->parent_irq[i] = irqs[i];
> +
> +		irq_set_handler_data(irqs[i], data);
> +		irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle);
> +	}
> +
> +	data->reg = reg;
> +	data->shift = shift;
> +	data->toggle_clear_on_ack = toggle_clear_on_ack;
> +
> +	data->chip.name = "bcm6345-ext-intc";
> +	data->chip.irq_ack = bcm6345_ext_intc_irq_ack;
> +	data->chip.irq_mask = bcm6345_ext_intc_irq_mask;
> +	data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask;
> +	data->chip.irq_set_type = bcm6345_ext_intc_set_type;
> +
> +	data->domain = irq_domain_add_simple(node, num_irqs, 0,
> +					     &bcm6345_ext_domain_ops, data);

Consider using irq_domain_add_linear(), given that you don't seem to
care about the first interrupt number.

> +	if (!data->domain) {
> +		kfree(data);
> +		return -ENOMEM;
> +	}

At this point, you have registered a bunch of chained handlers with
data structures that you have freed. What could possibly go wrong?

> +
> +	return 0;
> +}
> +
> +static int __init bcm6345_ext_intc_of_init(struct device_node *node,
> +					   struct device_node *parent)
> +{
> +	int num_irqs, ret = -EINVAL;
> +	unsigned i;
> +	void __iomem *base;
> +	int irqs[MAX_IRQS] = { 0 };
> +	u32 shift;
> +	bool toggle_clear_on_ack = false;
> +
> +	num_irqs = of_irq_count(node);
> +
> +	if (!num_irqs || num_irqs > MAX_IRQS)
> +		return -EINVAL;
> +
> +	if (of_property_read_u32(node, "brcm,field-width", &shift))
> +		shift = 4;

Why this default? Given that it is a new driver without any backward
compatibility requirement, either make the property mandatory or get
rid of it.

> +
> +	/* On BCM6318 setting CLEAR seems to continuously mask interrupts */
> +	if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc"))
> +		toggle_clear_on_ack = true;

Seems? What does the documentation says about this?

> +
> +	for (i = 0; i < num_irqs; i++) {
> +		irqs[i] = irq_of_parse_and_map(node, i);
> +		if (!irqs[i])
> +			return -ENOMEM;
> +	}
> +
> +	base = of_iomap(node, 0);
> +	if (!base)
> +		return -ENXIO;
> +
> +	ret = bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift,
> +				    toggle_clear_on_ack);
> +	if (!ret)
> +		return 0;
> +
> +	iounmap(base);
> +
> +	for (i = 0; i < num_irqs; i++)
> +		irq_dispose_mapping(irqs[i]);
> +
> +	return ret;
> +}
> +
> +IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc",
> +		bcm6345_ext_intc_of_init);
> +IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc",
> +		bcm6345_ext_intc_of_init);
> -- 
> 2.20.1
> 
> 

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

Re: [PATCH v2 0/2] irqchip: add support for BCM6345 interrupt controller

[Álvaro Fernández Rojas]

This is supposed to be v3…
Sorry for that. Should I resend?

> El 24 feb 2021, a las 8:56, Álvaro Fernández Rojas <noltari@gmail.com> escribió:
> 
> This interrupt controller is present on bcm63xx SoCs in order to generate
> interrupts based on GPIO status changes.
> 
> v3: pass dt_binding_check.
> v2: fix documentation title typo.
> 
> Álvaro Fernández Rojas (2):
>  dt-bindings: interrupt-controller: document BCM6345 external interrupt
>    controller
>  irqchip: add support for BCM6345 external interrupt controller
> 
> .../brcm,bcm6345-ext-intc.yaml                |  78 +++++
> drivers/irqchip/Kconfig                       |   4 +
> drivers/irqchip/Makefile                      |   1 +
> drivers/irqchip/irq-bcm6345-ext.c             | 271 ++++++++++++++++++
> 4 files changed, 354 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
> create mode 100644 drivers/irqchip/irq-bcm6345-ext.c
> 
> -- 
> 2.20.1
> 

Re: [PATCH v2 0/2] irqchip: add support for BCM6345 interrupt controller

[Marc Zyngier]

On Wed, 24 Feb 2021 07:58:44 +0000,
Álvaro Fernández Rojas <noltari@gmail.com> wrote:
> 
> This is supposed to be v3…
> Sorry for that. Should I resend?

No, please. 3 versions in less than 12 hours in the middle of a merge
window is bad enough.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

Re: [PATCH v2 0/2] irqchip: add support for BCM6345 interrupt controller

[Álvaro Fernández Rojas]

Hi all,

Apparently these patches were flagged as “Not Applicable” without an explanation. Why?
https://patchwork.kernel.org/project/linux-mips/patch/20210224075640.20465-2-noltari@gmail.com/
https://patchwork.kernel.org/project/linux-mips/patch/20210224075640.20465-3-noltari@gmail.com/

Best regards,
Álvaro.

> El 24 feb 2021, a las 8:56, Álvaro Fernández Rojas <noltari@gmail.com> escribió:
> 
> This interrupt controller is present on bcm63xx SoCs in order to generate
> interrupts based on GPIO status changes.
> 
> v3: pass dt_binding_check.
> v2: fix documentation title typo.
> 
> Álvaro Fernández Rojas (2):
>  dt-bindings: interrupt-controller: document BCM6345 external interrupt
>    controller
>  irqchip: add support for BCM6345 external interrupt controller
> 
> .../brcm,bcm6345-ext-intc.yaml                |  78 +++++
> drivers/irqchip/Kconfig                       |   4 +
> drivers/irqchip/Makefile                      |   1 +
> drivers/irqchip/irq-bcm6345-ext.c             | 271 ++++++++++++++++++
> 4 files changed, 354 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.yaml
> create mode 100644 drivers/irqchip/irq-bcm6345-ext.c
> 
> -- 
> 2.20.1
> 

Re: [PATCH v2 0/2] irqchip: add support for BCM6345 interrupt controller

[Rob Herring]

On Sat, Feb 27, 2021 at 07:49:09AM +0100, Álvaro Fernández Rojas wrote:
> Hi all,
> 
> Apparently these patches were flagged as “Not Applicable” without an explanation. Why?
> https://patchwork.kernel.org/project/linux-mips/patch/20210224075640.20465-2-noltari@gmail.com/
> https://patchwork.kernel.org/project/linux-mips/patch/20210224075640.20465-3-noltari@gmail.com/

They aren't applied by the MIPS maintainers would be my guess.