From: Thomas Gleixner <tglx@linutronix.de>
To: David Woodhouse <dwmw2@infradead.org>,
Kim Phillips <kim.phillips@amd.com>,
Usama Arif <usama.arif@bytedance.com>,
arjan@linux.intel.com
Cc: mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
hpa@zytor.com, x86@kernel.org, pbonzini@redhat.com,
paulmck@kernel.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, rcu@vger.kernel.org, mimoja@mimoja.de,
hewenliang4@huawei.com, thomas.lendacky@amd.com,
seanjc@google.com, pmenzel@molgen.mpg.de,
fam.zheng@bytedance.com, punit.agrawal@bytedance.com,
simon.evans@bytedance.com, liangma@liangbit.com,
Mario Limonciello <Mario.Limonciello@amd.com>
Subject: Re: [PATCH v6 07/11] x86/smpboot: Disable parallel boot for AMD CPUs
Date: Tue, 07 Feb 2023 15:44:11 +0100 [thread overview]
Message-ID: <87pmalv8lg.ffs@tglx> (raw)
In-Reply-To: <9acc229e3d4931fff9106d60b57e0f46941bfb50.camel@infradead.org>
David!
On Tue, Feb 07 2023 at 10:04, David Woodhouse wrote:
> On Tue, 2023-02-07 at 01:23 +0100, Thomas Gleixner wrote:
>> > When we're not in x2apic mode, we can use CPUID 0x1 because the 8 bits
>> > of APIC ID we find there are perfectly sufficient.
>>
>> Is that worth the trouble?
>
> Well, that's what was being debated. I think the conclusion that was
> bring reached was that it *is* worth the trouble, because there will be
> a number of physical and especially virtual machines which have a high
> CPU count but which don't actually use X2APIC mode. And which might not
> even *support* CPUID 0xb.
>
> So using CPUID 0x1 when there is no APIC ID greater than 254 does seem
> to make sense.
Fair enough.
>> > Even though we *can* support non-X2APIC processors, we *might* want to
>> > play it safe and not go back that far; only enabling parallel bringup
>> > on machines with X2APIC which roughly correlates with "lots of CPUs"
>> > since that's where the benefit is.
>>
>> The parallel bringup code is complex enough already, so please don't
>> optimize for the non-interesting case in the first place. When this has
>> stabilized then the CPUID 0x1 mechanism can be added if anyone thinks
>> it's interesting. KISS is still the best engineering principle.
>
> Actually it ends up being trivial. It probably makes sense to keep it
> in there even if it can only be exercised by a deliberate opt-in on
> older CPUs. I reworked the register usage from your original anyway,
> which helps a little.
>
> testl $STARTUP_APICID_CPUID_0B, %edx
> jnz .Luse_cpuid_0b
> testl $STARTUP_APICID_CPUID_01, %edx
> jnz .Luse_cpuid_01
> andl $0x0FFFFFFF, %edx
> jmp .Lsetup_AP
>
> .Luse_cpuid_01:
> mov $0x01, %eax
> cpuid
> mov %ebx, %edx
> shr $24, %edx
> jmp .Lsetup_AP
>
> .Luse_cpuid_0b:
> mov $0x0B, %eax
> xorl %ecx, %ecx
> cpuid
>
> .Lsetup_AP:
> /* EDX contains the APICID of the current CPU */
That looks trivial enough. So no objections from my side. Not sure
whether this needs a special opt-in though. We probably want an opt-out
for the parallel bringup mode for diagnosis purposes anyway and that
should be good enough for a start.
Thanks,
tglx
next prev parent reply other threads:[~2023-02-07 14:44 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-02 21:56 [PATCH v6 00/11] Parallel CPU bringup for x86_64 Usama Arif
2023-02-02 21:56 ` [PATCH v6 01/11] x86/apic/x2apic: Fix parallel handling of cluster_mask Usama Arif
2023-02-06 23:20 ` Thomas Gleixner
2023-02-07 10:57 ` David Woodhouse
2023-02-07 11:27 ` David Woodhouse
2023-02-07 14:24 ` Thomas Gleixner
2023-02-07 19:53 ` David Woodhouse
2023-02-07 20:58 ` Thomas Gleixner
2023-02-07 14:22 ` Thomas Gleixner
2023-02-02 21:56 ` [PATCH v6 02/11] cpu/hotplug: Move idle_thread_get() to <linux/smpboot.h> Usama Arif
2023-02-06 23:33 ` Thomas Gleixner
2023-02-07 1:24 ` Paul E. McKenney
2023-02-02 21:56 ` [PATCH v6 03/11] cpu/hotplug: Add dynamic parallel bringup states before CPUHP_BRINGUP_CPU Usama Arif
2023-02-06 23:43 ` Thomas Gleixner
2023-02-02 21:56 ` [PATCH v6 04/11] x86/smpboot: Reference count on smpboot_setup_warm_reset_vector() Usama Arif
2023-02-06 23:48 ` Thomas Gleixner
[not found] ` <57195f701f6d1d70ec440c9a28cbee4cfb81dc41.camel@amazon.co.uk>
2023-02-07 14:39 ` Thomas Gleixner
2023-02-07 16:50 ` Sean Christopherson
2023-02-07 19:48 ` [EXTERNAL][PATCH " David Woodhouse
2023-02-02 21:56 ` [PATCH v6 05/11] x86/smpboot: Split up native_cpu_up into separate phases and document them Usama Arif
2023-02-06 23:59 ` Thomas Gleixner
2023-02-02 21:56 ` [PATCH v6 06/11] x86/smpboot: Support parallel startup of secondary CPUs Usama Arif
2023-02-02 22:30 ` David Woodhouse
2023-02-02 22:50 ` [External] " Usama Arif
2023-02-03 8:14 ` David Woodhouse
2023-02-03 14:41 ` Arjan van de Ven
2023-02-03 18:17 ` Sean Christopherson
2023-02-07 0:07 ` Thomas Gleixner
2023-02-02 21:56 ` [PATCH v6 07/11] x86/smpboot: Disable parallel boot for AMD CPUs Usama Arif
2023-02-03 19:48 ` Kim Phillips
[not found] ` <d5ec64236ba75f0d3f3718fb69b2cb9169d8af0a.camel@amazon.co.uk>
2023-02-03 21:45 ` Kim Phillips
2023-02-03 22:25 ` [EXTERNAL][PATCH " David Woodhouse
2023-02-04 9:07 ` [PATCH " David Woodhouse
2023-02-04 10:09 ` David Woodhouse
2023-02-04 15:40 ` David Woodhouse
2023-02-04 18:18 ` Arjan van de Ven
2023-02-04 22:31 ` David Woodhouse
2023-02-05 22:13 ` [External] " Usama Arif
2023-02-06 8:05 ` David Woodhouse
2023-02-06 12:11 ` Usama Arif
2023-02-06 18:07 ` Sean Christopherson
2023-02-06 17:58 ` Kim Phillips
2023-02-07 16:27 ` Kim Phillips
2023-02-07 0:23 ` Thomas Gleixner
2023-02-07 10:04 ` David Woodhouse
2023-02-07 14:44 ` Thomas Gleixner [this message]
2023-02-07 0:09 ` Thomas Gleixner
[not found] ` <cbd9e88e738dc0c479e87121ca82431731905c73.camel@amazon.co.uk>
2023-02-07 14:46 ` Thomas Gleixner
2023-02-02 21:56 ` [PATCH v6 08/11] x86/smpboot: Send INIT/SIPI/SIPI to secondary CPUs in parallel Usama Arif
2023-02-07 0:28 ` Thomas Gleixner
2023-02-02 21:56 ` [PATCH v6 09/11] x86/mtrr: Avoid repeated save of MTRRs on boot-time CPU bringup Usama Arif
2023-02-02 21:56 ` [PATCH v6 10/11] x86/smpboot: Serialize topology updates for secondary bringup Usama Arif
2023-02-02 21:56 ` [PATCH v6 11/11] x86/smpboot: reuse timer calibration Usama Arif
2023-02-07 0:31 ` Thomas Gleixner
2023-02-07 23:16 ` Arjan van de Ven
2023-02-07 23:55 ` Thomas Gleixner
2023-02-05 19:17 ` [PATCH v6 00/11] Parallel CPU bringup for x86_64 Russ Anderson
2023-02-06 8:28 ` David Woodhouse
2023-02-06 12:18 ` [External] " Usama Arif
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