From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: James Clark <james.clark@arm.com>,
mathieu.poirier@linaro.org, coresight@lists.linaro.org
Cc: leo.yan@linaro.com, mike.leach@linaro.org,
Leo Yan <leo.yan@linaro.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 02/15] coresight: Make ETM4x TRCIDR2 register accesses consistent with sysreg.h
Date: Thu, 3 Feb 2022 14:27:29 +0000 [thread overview]
Message-ID: <8d2fc78e-f061-daa1-b266-ef84d5dd316f@arm.com> (raw)
In-Reply-To: <20220202160226.37858-3-james.clark@arm.com>
On 02/02/2022 16:02, James Clark wrote:
> This is a no-op change for style and consistency and has no effect on the
> binary produced by gcc-11.
>
> Signed-off-by: James Clark <james.clark@arm.com>
> ---
> drivers/hwtracing/coresight/coresight-etm4x-core.c | 6 +++---
> drivers/hwtracing/coresight/coresight-etm4x.h | 7 +++++++
> 2 files changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index 8aefee4e72fd..4abe5444234e 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -1111,11 +1111,11 @@ static void etm4_init_arch_data(void *info)
> /* maximum size of resources */
> etmidr2 = etm4x_relaxed_read32(csa, TRCIDR2);
> /* CIDSIZE, bits[9:5] Indicates the Context ID size */
> - drvdata->ctxid_size = BMVAL(etmidr2, 5, 9);
> + drvdata->ctxid_size = REG_VAL(etmidr2, TRCIDR2_CIDSIZE);
> /* VMIDSIZE, bits[14:10] Indicates the VMID size */
> - drvdata->vmid_size = BMVAL(etmidr2, 10, 14);
> + drvdata->vmid_size = REG_VAL(etmidr2, TRCIDR2_VMIDSIZE);
> /* CCSIZE, bits[28:25] size of the cycle counter in bits minus 12 */
> - drvdata->ccsize = BMVAL(etmidr2, 25, 28);
> + drvdata->ccsize = REG_VAL(etmidr2, TRCIDR2_CCSIZE);
>
> etmidr3 = etm4x_relaxed_read32(csa, TRCIDR3);
> /* CCITMIN, bits[11:0] minimum threshold value that can be programmed */
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h
> index 2bd8ad953b8e..a95df5686b4b 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x.h
> +++ b/drivers/hwtracing/coresight/coresight-etm4x.h
> @@ -147,6 +147,13 @@
> #define TRCIDR0_TSSIZE_SHIFT 24
> #define TRCIDR0_TSSIZE_MASK GENMASK(4, 0)
>
> +#define TRCIDR2_CIDSIZE_SHIFT 5
> +#define TRCIDR2_CIDSIZE_MASK GENMASK(4, 0)
> +#define TRCIDR2_VMIDSIZE_SHIFT 10
> +#define TRCIDR2_VMIDSIZE_MASK GENMASK(4, 0)
> +#define TRCIDR2_CCSIZE_SHIFT 25
> +#define TRCIDR2_CCSIZE_MASK GENMASK(3, 0)
> +
Looks good to me. I have confirmed the above changes matches the spec.
Suzuki
next prev parent reply other threads:[~2022-02-03 14:27 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-02 16:02 [PATCH 00/15] Make ETM register accesses consistent with sysreg.h James Clark
2022-02-02 16:02 ` [PATCH 01/15] coresight: Make ETM4x TRCIDR0 " James Clark
2022-02-02 17:05 ` Suzuki K Poulose
2022-02-03 10:40 ` James Clark
2022-02-03 10:54 ` Suzuki K Poulose
2022-02-03 12:08 ` James Clark
2022-02-02 16:02 ` [PATCH 02/15] coresight: Make ETM4x TRCIDR2 " James Clark
2022-02-03 13:58 ` Suzuki K Poulose
2022-02-03 14:27 ` Suzuki K Poulose [this message]
2022-02-02 16:02 ` [PATCH 03/15] coresight: Make ETM4x TRCIDR3 " James Clark
2022-02-02 16:02 ` [PATCH 04/15] coresight: Make ETM4x TRCIDR4 " James Clark
2022-02-02 16:02 ` [PATCH 05/15] coresight: Make ETM4x TRCIDR5 " James Clark
2022-02-02 16:02 ` [PATCH 06/15] coresight: Make ETM4x TRCCONFIGR " James Clark
2022-02-02 16:02 ` [PATCH 07/15] coresight: Make ETM4x TRCEVENTCTL1R " James Clark
2022-02-02 16:02 ` [PATCH 08/15] coresight: Make ETM4x TRCSTALLCTLR " James Clark
2022-02-02 16:02 ` [PATCH 09/15] coresight: Make ETM4x TRCVICTLR " James Clark
2022-02-02 16:02 ` [PATCH 10/15] coresight: Make ETM3x ETMTECR1 " James Clark
2022-02-02 16:02 ` [PATCH 11/15] coresight: Make ETM4x TRCACATRn " James Clark
2022-02-02 16:02 ` [PATCH 12/15] coresight: Make ETM4x TRCSSCCRn and TRCSSCSRn " James Clark
2022-02-02 16:02 ` [PATCH 13/15] coresight: Make ETM4x TRCSSPCICRn " James Clark
2022-02-02 16:02 ` [PATCH 14/15] coresight: Make ETM4x TRCBBCTLR " James Clark
2022-02-02 16:02 ` [PATCH 15/15] coresight: Make ETM4x TRCRSCTLRn " James Clark
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