* [PATCH v4 0/3] Add TDM audio on StarFive JH7110
@ 2023-05-11 9:15 Walker Chen
2023-05-11 9:15 ` [PATCH v4 1/3] ASoC: dt-bindings: Add TDM controller bindings for " Walker Chen
` (2 more replies)
0 siblings, 3 replies; 13+ messages in thread
From: Walker Chen @ 2023-05-11 9:15 UTC (permalink / raw)
To: Mark Brown, Liam Girdwood, Claudiu Beznea, Jaroslav Kysela,
Takashi Iwai, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Emil Renner Berthing, Walker Chen
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
This patchset adds TDM audio driver for the StarFive JH7110 SoC. The
first patch adds device tree binding for TDM module. The second patch
adds tdm driver support for JH7110 SoC. The last patch adds device tree
node and pins configuration of tdm to JH7110 dts.
The series has been tested on the VisionFive 2 board by plugging an
audio expansion board.
For more information of audio expansion board, you can take a look
at the following webpage:
https://wiki.seeedstudio.com/ReSpeaker_2_Mics_Pi_HAT/
Changes since v3:
- Modified the subject of patch [1/3] to reflect which subsystem it is.
- Use the set of functions with 'clk_bulk_' to get/enable/disable clocks.
- Dropped the overlay from patch [3/3].
- Dropped the redundant macro 'CONFIG_PM' and 'CONFIG_PM_SLEEP' around
suspend() and resume().
Changes since v2:
- Use dt-overlay to describe sound card because need to plug the audio
expansion board into the VisionFive2 board.
- Modified the coding style for driver.
- Moved assignment of stop_dma_first to startup function of dai_driver.
- Dropped some useless macro definition.
- Use loops to get/enable/disable clocks.
Changes since v1:
- Rebased on Linux 6.3-rc4.
- Added the dts file dedicated to describe audio card.
- Added the item for JH7110 audio board to the dt-binding of StarFive
SoC-based boards.
---
v3: https://lore.kernel.org/all/20230506090116.9206-1-walker.chen@starfivetech.com/
v2: https://lore.kernel.org/all/20230420024118.22677-1-walker.chen@starfivetech.com/
v1: https://lore.kernel.org/all/20230329153320.31390-1-walker.chen@starfivetech.com/
Walker Chen (3):
ASoC: dt-bindings: Add TDM controller bindings for StarFive JH7110
ASoC: starfive: Add JH7110 TDM driver
riscv: dts: starfive: add the node and pins configuration for tdm
.../bindings/sound/starfive,jh7110-tdm.yaml | 98 ++++
MAINTAINERS | 6 +
.../jh7110-starfive-visionfive-2.dtsi | 40 ++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 +
sound/soc/Kconfig | 1 +
sound/soc/Makefile | 1 +
sound/soc/starfive/Kconfig | 15 +
sound/soc/starfive/Makefile | 2 +
sound/soc/starfive/jh7110_tdm.c | 554 ++++++++++++++++++
sound/soc/starfive/jh7110_tdm.h | 138 +++++
10 files changed, 876 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
create mode 100644 sound/soc/starfive/Kconfig
create mode 100644 sound/soc/starfive/Makefile
create mode 100644 sound/soc/starfive/jh7110_tdm.c
create mode 100644 sound/soc/starfive/jh7110_tdm.h
base-commit: 197b6b60ae7bc51dd0814953c562833143b292aa
prerequisite-patch-id: 30bec4dba6f250a6edd0c2cbab2ce09442e50e8a
prerequisite-patch-id: bb939c0c7c26b08addfccd890f9d3974b6eaec53
prerequisite-patch-id: 8a6f135bcabdad4a4bfb21f0c6a0ffd2bb57efe7
prerequisite-patch-id: c2366f993a9d85e28c06d8d09f064dd5e8b29a61
prerequisite-patch-id: 50d53a21f91f4087fc80b6f1f72864adfb0002b9
prerequisite-patch-id: 0df3703af91c30f1ca2c47f5609012f2d7200028
prerequisite-patch-id: 89f049f951e5acf75aab92541992f816fd0acc0d
prerequisite-patch-id: 551fae54377090044c3612fca9740a9b359abdd2
prerequisite-patch-id: c7fdf904f398d478f0ed6d57eb878982bc73329d
prerequisite-patch-id: 1b2d0982b18da060c82134f05bf3ce16425bac8d
prerequisite-patch-id: 090ba4b78d47bc19204916e76fdbc70021785388
prerequisite-patch-id: a5d9e0f7d4f8163f566678894cf693015119f2d9
prerequisite-patch-id: 4637a8fa2334a45fa6b64351f4e9e28d3e2d60d3
prerequisite-patch-id: 32647ec60a3b614e1c59ec8e54cb511ae832c22f
prerequisite-patch-id: aa06658ecf89c92d0dfdd6a4ba6d9e6e67532971
prerequisite-patch-id: 1387a7e87b446329dfc21f3e575ceae7ebcf954c
prerequisite-patch-id: 258ea5f9b8bf41b6981345dcc81795f25865d38f
prerequisite-patch-id: 8b6f2c9660c0ac0ee4e73e4c21aca8e6b75e81b9
prerequisite-patch-id: dbb0c0151b8bdf093e6ce79fd2fe3f60791a6e0b
prerequisite-patch-id: 9007c8610fdcd387592475949864edde874c20a2
prerequisite-patch-id: d57e95d31686772abc4c4d5aa1cadc344dc293cd
prerequisite-patch-id: 9f911969d0a550648493952c99096d26e05d4d83
prerequisite-patch-id: 2ddada18ab6ea5cd1da14212aaf59632f5203d40
prerequisite-patch-id: 80042661ff6156ce577a72e9eb8c0b218b624829
prerequisite-patch-id: 398744c61913c76a35754de867c4f820ca7a8d99
prerequisite-patch-id: f59269382164b5d642a5e10443ca447f5caa595c
prerequisite-patch-id: 1babe83d6bf999bad17584dc595480f9070a5369
prerequisite-patch-id: 77be3d122d66df813f13088141ce27b21107a341
prerequisite-patch-id: 9fbb7ad1dd258bb8ff5946c4a0e59de4bfd82a04
prerequisite-patch-id: 6f6984916dffd0cc66aa733c9b6bd3a55495a50c
prerequisite-patch-id: 39e1be2a3d1593577ab997f55f59367cba665aa7
prerequisite-patch-id: 584c256c9acb52ee2773d0c81c3f4977fc18155a
prerequisite-patch-id: b37ac15032973e1fcd918f157c82a0606775c9e9
prerequisite-patch-id: 32deea16304859842af5c2151bc41d91cf6dfc9b
prerequisite-patch-id: 20ac2450fb93b3f69f83fc720fd4800a95e618a6
prerequisite-patch-id: 6abf359fa445f4104432ddee27044dfbfb128417
--
2.17.1
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v4 1/3] ASoC: dt-bindings: Add TDM controller bindings for StarFive JH7110
2023-05-11 9:15 [PATCH v4 0/3] Add TDM audio on StarFive JH7110 Walker Chen
@ 2023-05-11 9:15 ` Walker Chen
2023-05-11 9:15 ` [PATCH v4 2/3] ASoC: starfive: Add JH7110 TDM driver Walker Chen
2023-05-11 9:15 ` [PATCH v4 3/3] riscv: dts: starfive: add the node and pins configuration for tdm Walker Chen
2 siblings, 0 replies; 13+ messages in thread
From: Walker Chen @ 2023-05-11 9:15 UTC (permalink / raw)
To: Mark Brown, Liam Girdwood, Claudiu Beznea, Jaroslav Kysela,
Takashi Iwai, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Emil Renner Berthing, Walker Chen
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
Add bindings for TDM driver which supports multi-channel audio playback
and capture on JH7110 platform.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
---
.../bindings/sound/starfive,jh7110-tdm.yaml | 98 +++++++++++++++++++
1 file changed, 98 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
diff --git a/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml b/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
new file mode 100644
index 000000000000..abb373fbfa26
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
@@ -0,0 +1,98 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/starfive,jh7110-tdm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH7110 TDM Controller
+
+description: |
+ The TDM Controller is a Time Division Multiplexed audio interface
+ integrated in StarFive JH7110 SoC, allowing up to 8 channels of
+ audio over a serial interface. The TDM controller can operate both
+ in master and slave mode.
+
+maintainers:
+ - Walker Chen <walker.chen@starfivetech.com>
+
+allOf:
+ - $ref: dai-common.yaml#
+
+properties:
+ compatible:
+ enum:
+ - starfive,jh7110-tdm
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: TDM AHB Clock
+ - description: TDM APB Clock
+ - description: TDM Internal Clock
+ - description: TDM Clock
+ - description: Inner MCLK
+ - description: TDM External Clock
+
+ clock-names:
+ items:
+ - const: tdm_ahb
+ - const: tdm_apb
+ - const: tdm_internal
+ - const: tdm
+ - const: mclk_inner
+ - const: tdm_ext
+
+ resets:
+ items:
+ - description: tdm ahb reset line
+ - description: tdm apb reset line
+ - description: tdm core reset line
+
+ dmas:
+ items:
+ - description: RX DMA Channel
+ - description: TX DMA Channel
+
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
+
+ "#sound-dai-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - resets
+ - dmas
+ - dma-names
+ - "#sound-dai-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ tdm@10090000 {
+ compatible = "starfive,jh7110-tdm";
+ reg = <0x10090000 0x1000>;
+ clocks = <&syscrg 184>,
+ <&syscrg 185>,
+ <&syscrg 186>,
+ <&syscrg 187>,
+ <&syscrg 17>,
+ <&tdm_ext>;
+ clock-names = "tdm_ahb", "tdm_apb",
+ "tdm_internal", "tdm",
+ "mclk_inner", "tdm_ext";
+ resets = <&syscrg 105>,
+ <&syscrg 107>,
+ <&syscrg 106>;
+ dmas = <&dma 20>, <&dma 21>;
+ dma-names = "rx","tx";
+ #sound-dai-cells = <0>;
+ };
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v4 2/3] ASoC: starfive: Add JH7110 TDM driver
2023-05-11 9:15 [PATCH v4 0/3] Add TDM audio on StarFive JH7110 Walker Chen
2023-05-11 9:15 ` [PATCH v4 1/3] ASoC: dt-bindings: Add TDM controller bindings for " Walker Chen
@ 2023-05-11 9:15 ` Walker Chen
2023-05-15 8:29 ` Walker Chen
2023-05-17 8:35 ` Claudiu.Beznea
2023-05-11 9:15 ` [PATCH v4 3/3] riscv: dts: starfive: add the node and pins configuration for tdm Walker Chen
2 siblings, 2 replies; 13+ messages in thread
From: Walker Chen @ 2023-05-11 9:15 UTC (permalink / raw)
To: Mark Brown, Liam Girdwood, Claudiu Beznea, Jaroslav Kysela,
Takashi Iwai, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Emil Renner Berthing, Walker Chen
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
Add tdm driver support for the StarFive JH7110 SoC.
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
---
MAINTAINERS | 6 +
sound/soc/Kconfig | 1 +
sound/soc/Makefile | 1 +
sound/soc/starfive/Kconfig | 15 +
sound/soc/starfive/Makefile | 2 +
sound/soc/starfive/jh7110_tdm.c | 554 ++++++++++++++++++++++++++++++++
sound/soc/starfive/jh7110_tdm.h | 138 ++++++++
7 files changed, 717 insertions(+)
create mode 100644 sound/soc/starfive/Kconfig
create mode 100644 sound/soc/starfive/Makefile
create mode 100644 sound/soc/starfive/jh7110_tdm.c
create mode 100644 sound/soc/starfive/jh7110_tdm.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 5f9c544bc189..add89615d327 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -19945,6 +19945,12 @@ F: Documentation/devicetree/bindings/power/starfive*
F: drivers/soc/starfive/jh71xx_pmu.c
F: include/dt-bindings/power/starfive,jh7110-pmu.h
+STARFIVE JH7110 TDM DRIVERS
+M: Walker Chen <walker.chen@starfivetech.com>
+S: Maintained
+F: Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
+F: sound/soc/starfive/jh7110-tdm.*
+
STARFIVE SOC DRIVERS
M: Conor Dooley <conor@kernel.org>
S: Maintained
diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
index 848fbae26c3b..8d1d9401ecf2 100644
--- a/sound/soc/Kconfig
+++ b/sound/soc/Kconfig
@@ -91,6 +91,7 @@ source "sound/soc/sh/Kconfig"
source "sound/soc/sof/Kconfig"
source "sound/soc/spear/Kconfig"
source "sound/soc/sprd/Kconfig"
+source "sound/soc/starfive/Kconfig"
source "sound/soc/sti/Kconfig"
source "sound/soc/stm/Kconfig"
source "sound/soc/sunxi/Kconfig"
diff --git a/sound/soc/Makefile b/sound/soc/Makefile
index 507eaed1d6a1..65aeb4ef4068 100644
--- a/sound/soc/Makefile
+++ b/sound/soc/Makefile
@@ -59,6 +59,7 @@ obj-$(CONFIG_SND_SOC) += sh/
obj-$(CONFIG_SND_SOC) += sof/
obj-$(CONFIG_SND_SOC) += spear/
obj-$(CONFIG_SND_SOC) += sprd/
+obj-$(CONFIG_SND_SOC) += starfive/
obj-$(CONFIG_SND_SOC) += sti/
obj-$(CONFIG_SND_SOC) += stm/
obj-$(CONFIG_SND_SOC) += sunxi/
diff --git a/sound/soc/starfive/Kconfig b/sound/soc/starfive/Kconfig
new file mode 100644
index 000000000000..fafb681f8c0a
--- /dev/null
+++ b/sound/soc/starfive/Kconfig
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0-only
+config SND_SOC_STARFIVE
+ tristate "Audio support for StarFive SoC"
+ depends on COMPILE_TEST || ARCH_STARFIVE
+ help
+ Say Y or M if you want to add support for codecs attached to
+ the Starfive SoCs' Audio interfaces. You will also need to
+ select the audio interfaces to support below.
+
+config SND_SOC_JH7110_TDM
+ tristate "JH7110 TDM device driver"
+ depends on HAVE_CLK && SND_SOC_STARFIVE
+ select SND_SOC_GENERIC_DMAENGINE_PCM
+ help
+ Say Y or M if you want to add support for StarFive TDM driver.
diff --git a/sound/soc/starfive/Makefile b/sound/soc/starfive/Makefile
new file mode 100644
index 000000000000..f7d960211d72
--- /dev/null
+++ b/sound/soc/starfive/Makefile
@@ -0,0 +1,2 @@
+# StarFive Platform Support
+obj-$(CONFIG_SND_SOC_JH7110_TDM) += jh7110_tdm.o
diff --git a/sound/soc/starfive/jh7110_tdm.c b/sound/soc/starfive/jh7110_tdm.c
new file mode 100644
index 000000000000..1f94cc210140
--- /dev/null
+++ b/sound/soc/starfive/jh7110_tdm.c
@@ -0,0 +1,554 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * jh7110_tdm.c -- StarFive JH7110 TDM driver
+ *
+ * Copyright (C) 2023 StarFive Technology Co., Ltd.
+ *
+ * Author: Walker Chen <walker.chen@starfivetech.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
+#include <linux/reset.h>
+#include <sound/initval.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+#include <sound/soc-dai.h>
+#include "jh7110_tdm.h"
+
+static inline u32 jh7110_tdm_readl(struct jh7110_tdm_dev *tdm, u16 reg)
+{
+ return readl_relaxed(tdm->tdm_base + reg);
+}
+
+static inline void jh7110_tdm_writel(struct jh7110_tdm_dev *tdm, u16 reg, u32 val)
+{
+ writel_relaxed(val, tdm->tdm_base + reg);
+}
+
+static void jh7110_tdm_save_context(struct jh7110_tdm_dev *tdm,
+ struct snd_pcm_substream *substream)
+{
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ tdm->saved_pcmtxcr = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
+ else
+ tdm->saved_pcmrxcr = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
+}
+
+static void jh7110_tdm_start(struct jh7110_tdm_dev *tdm,
+ struct snd_pcm_substream *substream)
+{
+ u32 data;
+
+ data = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
+ jh7110_tdm_writel(tdm, TDM_PCMGBCR, data | PCMGBCR_ENABLE);
+
+ /* restore context */
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ jh7110_tdm_writel(tdm, TDM_PCMTXCR, tdm->saved_pcmtxcr | PCMTXCR_TXEN);
+ else
+ jh7110_tdm_writel(tdm, TDM_PCMRXCR, tdm->saved_pcmrxcr | PCMRXCR_RXEN);
+}
+
+static void jh7110_tdm_stop(struct jh7110_tdm_dev *tdm,
+ struct snd_pcm_substream *substream)
+{
+ unsigned int val;
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ val = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
+ val &= ~PCMTXCR_TXEN;
+ jh7110_tdm_writel(tdm, TDM_PCMTXCR, val);
+ } else {
+ val = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
+ val &= ~PCMRXCR_RXEN;
+ jh7110_tdm_writel(tdm, TDM_PCMRXCR, val);
+ }
+}
+
+static int jh7110_tdm_syncdiv(struct jh7110_tdm_dev *tdm)
+{
+ u32 sl, sscale, syncdiv;
+
+ if (tdm->rx.sl >= tdm->tx.sl)
+ sl = tdm->rx.sl;
+ else
+ sl = tdm->tx.sl;
+
+ if (tdm->rx.sscale >= tdm->tx.sscale)
+ sscale = tdm->rx.sscale;
+ else
+ sscale = tdm->tx.sscale;
+
+ syncdiv = tdm->pcmclk / tdm->samplerate - 1;
+
+ if ((syncdiv + 1) < (sl * sscale)) {
+ dev_err(tdm->dev, "Failed to set syncdiv!\n");
+ return -EINVAL;
+ }
+
+ if (tdm->syncm == TDM_SYNCM_LONG &&
+ (tdm->rx.sscale <= 1 || tdm->tx.sscale <= 1)) {
+ if ((syncdiv + 1) <= sl) {
+ dev_err(tdm->dev, "Wrong syncdiv! It must be (syncdiv+1) > max[tx.sl, rx.sl]\n");
+ return -EINVAL;
+ }
+ }
+
+ jh7110_tdm_writel(tdm, TDM_PCMDIV, syncdiv);
+ return 0;
+}
+
+static int jh7110_tdm_config(struct jh7110_tdm_dev *tdm,
+ struct snd_pcm_substream *substream)
+{
+ u32 datarx, datatx;
+ int ret;
+
+ ret = jh7110_tdm_syncdiv(tdm);
+ if (ret)
+ return ret;
+
+ datarx = (tdm->rx.ifl << IFL_BIT) |
+ (tdm->rx.wl << WL_BIT) |
+ (tdm->rx.sscale << SSCALE_BIT) |
+ (tdm->rx.sl << SL_BIT) |
+ (tdm->rx.lrj << LRJ_BIT);
+
+ datatx = (tdm->tx.ifl << IFL_BIT) |
+ (tdm->tx.wl << WL_BIT) |
+ (tdm->tx.sscale << SSCALE_BIT) |
+ (tdm->tx.sl << SL_BIT) |
+ (tdm->tx.lrj << LRJ_BIT);
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ jh7110_tdm_writel(tdm, TDM_PCMTXCR, datatx);
+ else
+ jh7110_tdm_writel(tdm, TDM_PCMRXCR, datarx);
+
+ return 0;
+}
+
+static void jh7110_tdm_clk_disable(struct jh7110_tdm_dev *tdm)
+{
+ clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
+}
+
+static int jh7110_tdm_clk_enable(struct jh7110_tdm_dev *tdm)
+{
+ int ret;
+
+ ret = clk_bulk_prepare_enable(ARRAY_SIZE(tdm->clks), tdm->clks);
+ if (ret) {
+ dev_err(tdm->dev, "Failed to enable tdm clocks\n");
+ return ret;
+ }
+
+ ret = reset_control_deassert(tdm->resets);
+ if (ret) {
+ dev_err(tdm->dev, "Failed to deassert tdm resets\n");
+ goto dis_tdm_clk;
+ }
+
+ /* select tdm_ext clock as the clock source for tdm */
+ ret = clk_set_parent(tdm->clks[5].clk, tdm->clks[4].clk);
+ if (ret) {
+ dev_err(tdm->dev, "Can't set clock source for clk_tdm: %d\n", ret);
+ goto dis_tdm_clk;
+ }
+ return 0;
+
+dis_tdm_clk:
+ clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
+
+ return ret;
+}
+
+static int jh7110_tdm_runtime_suspend(struct device *dev)
+{
+ struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
+
+ jh7110_tdm_clk_disable(tdm);
+ return 0;
+}
+
+static int jh7110_tdm_runtime_resume(struct device *dev)
+{
+ struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
+
+ return jh7110_tdm_clk_enable(tdm);
+}
+
+static int __maybe_unused jh7110_tdm_system_suspend(struct device *dev)
+{
+ struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
+
+ /* save context */
+ tdm->saved_pcmgbcr = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
+ tdm->saved_pcmdiv = jh7110_tdm_readl(tdm, TDM_PCMDIV);
+
+ return pm_runtime_force_suspend(dev);
+}
+
+static int __maybe_unused jh7110_tdm_system_resume(struct device *dev)
+{
+ struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
+
+ /* restore context */
+ jh7110_tdm_writel(tdm, TDM_PCMGBCR, tdm->saved_pcmgbcr);
+ jh7110_tdm_writel(tdm, TDM_PCMDIV, tdm->saved_pcmdiv);
+
+ return pm_runtime_force_resume(dev);
+}
+
+static const struct snd_soc_component_driver jh7110_tdm_component = {
+ .name = "jh7110-tdm",
+};
+
+static int jh7110_tdm_startup(struct snd_pcm_substream *substream,
+ struct snd_soc_dai *cpu_dai)
+{
+ struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
+ struct snd_soc_dai_link *dai_link = rtd->dai_link;
+
+ dai_link->stop_dma_first = 1;
+
+ return 0;
+}
+
+static int jh7110_tdm_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params,
+ struct snd_soc_dai *dai)
+{
+ struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
+ int chan_wl, chan_sl, chan_nr;
+ unsigned int data_width;
+ unsigned int dma_bus_width;
+ struct snd_dmaengine_dai_dma_data *dma_data = NULL;
+ int ret = 0;
+
+ data_width = params_width(params);
+
+ tdm->samplerate = params_rate(params);
+ tdm->pcmclk = params_channels(params) * tdm->samplerate * data_width;
+
+ switch (params_format(params)) {
+ case SNDRV_PCM_FORMAT_S16_LE:
+ chan_wl = TDM_16BIT_WORD_LEN;
+ chan_sl = TDM_16BIT_SLOT_LEN;
+ dma_bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+ break;
+
+ case SNDRV_PCM_FORMAT_S32_LE:
+ chan_wl = TDM_32BIT_WORD_LEN;
+ chan_sl = TDM_32BIT_SLOT_LEN;
+ dma_bus_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+ break;
+
+ default:
+ dev_err(tdm->dev, "tdm: unsupported PCM fmt");
+ return -EINVAL;
+ }
+
+ chan_nr = params_channels(params);
+ switch (chan_nr) {
+ case 1:
+ case 2:
+ case 4:
+ case 6:
+ case 8:
+ break;
+ default:
+ dev_err(tdm->dev, "channel not supported\n");
+ return -EINVAL;
+ }
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ tdm->tx.wl = chan_wl;
+ tdm->tx.sl = chan_sl;
+ tdm->tx.sscale = chan_nr;
+ tdm->play_dma_data.addr_width = dma_bus_width;
+ dma_data = &tdm->play_dma_data;
+ } else {
+ tdm->rx.wl = chan_wl;
+ tdm->rx.sl = chan_sl;
+ tdm->rx.sscale = chan_nr;
+ tdm->capture_dma_data.addr_width = dma_bus_width;
+ dma_data = &tdm->capture_dma_data;
+ }
+
+ snd_soc_dai_set_dma_data(dai, substream, dma_data);
+
+ ret = jh7110_tdm_config(tdm, substream);
+ if (ret)
+ return ret;
+
+ jh7110_tdm_save_context(tdm, substream);
+ return 0;
+}
+
+static int jh7110_tdm_trigger(struct snd_pcm_substream *substream,
+ int cmd, struct snd_soc_dai *dai)
+{
+ struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
+ int ret = 0;
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_RESUME:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ jh7110_tdm_start(tdm, substream);
+ break;
+
+ case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ jh7110_tdm_stop(tdm, substream);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+ return ret;
+}
+
+static int jh7110_tdm_set_dai_fmt(struct snd_soc_dai *cpu_dai,
+ unsigned int fmt)
+{
+ struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(cpu_dai);
+ unsigned int gbcr;
+ int ret = 0;
+
+ /* set master/slave audio interface */
+ switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
+ case SND_SOC_DAIFMT_BP_FP:
+ /* cpu is master */
+ tdm->ms_mode = TDM_AS_MASTER;
+ break;
+ case SND_SOC_DAIFMT_BC_FC:
+ /* codec is master */
+ tdm->ms_mode = TDM_AS_SLAVE;
+ break;
+ case SND_SOC_DAIFMT_BC_FP:
+ case SND_SOC_DAIFMT_BP_FC:
+ ret = -EINVAL;
+ break;
+ default:
+ dev_dbg(tdm->dev, "dwc : Invalid clock provider format\n");
+ ret = -EINVAL;
+ break;
+ }
+
+ gbcr = (tdm->clkpolity << CLKPOL_BIT) |
+ (tdm->elm << ELM_BIT) |
+ (tdm->syncm << SYNCM_BIT) |
+ (tdm->ms_mode << MS_BIT);
+ jh7110_tdm_writel(tdm, TDM_PCMGBCR, gbcr);
+
+ return ret;
+}
+
+static const struct snd_soc_dai_ops jh7110_tdm_dai_ops = {
+ .startup = jh7110_tdm_startup,
+ .hw_params = jh7110_tdm_hw_params,
+ .trigger = jh7110_tdm_trigger,
+ .set_fmt = jh7110_tdm_set_dai_fmt,
+};
+
+static int jh7110_tdm_dai_probe(struct snd_soc_dai *dai)
+{
+ struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
+
+ snd_soc_dai_init_dma_data(dai, &tdm->play_dma_data, &tdm->capture_dma_data);
+ snd_soc_dai_set_drvdata(dai, tdm);
+ return 0;
+}
+
+#define JH7110_TDM_RATES SNDRV_PCM_RATE_8000_48000
+
+#define JH7110_TDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S32_LE)
+
+static struct snd_soc_dai_driver jh7110_tdm_dai = {
+ .name = "sf_tdm",
+ .id = 0,
+ .playback = {
+ .stream_name = "Playback",
+ .channels_min = 1,
+ .channels_max = 8,
+ .rates = JH7110_TDM_RATES,
+ .formats = JH7110_TDM_FORMATS,
+ },
+ .capture = {
+ .stream_name = "Capture",
+ .channels_min = 1,
+ .channels_max = 8,
+ .rates = JH7110_TDM_RATES,
+ .formats = JH7110_TDM_FORMATS,
+ },
+ .ops = &jh7110_tdm_dai_ops,
+ .probe = jh7110_tdm_dai_probe,
+ .symmetric_rate = 1,
+};
+
+static const struct snd_pcm_hardware jh7110_pcm_hardware = {
+ .info = (SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_PAUSE |
+ SNDRV_PCM_INFO_RESUME |
+ SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER),
+ .buffer_bytes_max = 192512,
+ .period_bytes_min = 4096,
+ .period_bytes_max = 32768,
+ .periods_min = 1,
+ .periods_max = 48,
+ .fifo_size = 16,
+};
+
+static const struct snd_dmaengine_pcm_config jh7110_dmaengine_pcm_config = {
+ .pcm_hardware = &jh7110_pcm_hardware,
+ .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
+ .prealloc_buffer_size = 192512,
+};
+
+static void jh7110_tdm_init_params(struct jh7110_tdm_dev *tdm)
+{
+ tdm->clkpolity = TDM_TX_RASING_RX_FALLING;
+ tdm->elm = TDM_ELM_LATE;
+ tdm->syncm = TDM_SYNCM_SHORT;
+
+ tdm->rx.ifl = TDM_FIFO_HALF;
+ tdm->tx.ifl = TDM_FIFO_HALF;
+ tdm->rx.wl = TDM_16BIT_WORD_LEN;
+ tdm->tx.wl = TDM_16BIT_WORD_LEN;
+ tdm->rx.sscale = 2;
+ tdm->tx.sscale = 2;
+ tdm->rx.lrj = TDM_LEFT_JUSTIFT;
+ tdm->tx.lrj = TDM_LEFT_JUSTIFT;
+
+ tdm->play_dma_data.addr = JH7110_TDM_FIFO;
+ tdm->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+ tdm->play_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
+ tdm->play_dma_data.maxburst = 16;
+
+ tdm->capture_dma_data.addr = JH7110_TDM_FIFO;
+ tdm->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
+ tdm->capture_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
+ tdm->capture_dma_data.maxburst = 8;
+}
+
+static int jh7110_tdm_clk_reset_init(struct platform_device *pdev,
+ struct jh7110_tdm_dev *tdm)
+{
+ int ret;
+
+ tdm->clks[0].id = "mclk_inner";
+ tdm->clks[1].id = "tdm_ahb";
+ tdm->clks[2].id = "tdm_apb";
+ tdm->clks[3].id = "tdm_internal";
+ tdm->clks[4].id = "tdm_ext";
+ tdm->clks[5].id = "tdm";
+
+ ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(tdm->clks), tdm->clks);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to get tdm clocks\n");
+ return ret;
+ }
+
+ tdm->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
+ if (IS_ERR(tdm->resets)) {
+ ret = PTR_ERR(tdm->resets);
+ dev_err(&pdev->dev, "Failed to get tdm resets");
+ return ret;
+ }
+
+ return jh7110_tdm_clk_enable(tdm);
+}
+
+static int jh7110_tdm_probe(struct platform_device *pdev)
+{
+ struct jh7110_tdm_dev *tdm;
+ int ret;
+
+ tdm = devm_kzalloc(&pdev->dev, sizeof(*tdm), GFP_KERNEL);
+ if (!tdm)
+ return -ENOMEM;
+
+ tdm->tdm_base = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(tdm->tdm_base))
+ return PTR_ERR(tdm->tdm_base);
+
+ tdm->dev = &pdev->dev;
+
+ ret = jh7110_tdm_clk_reset_init(pdev, tdm);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to enable audio-tdm clock\n");
+ return ret;
+ }
+
+ jh7110_tdm_init_params(tdm);
+
+ dev_set_drvdata(&pdev->dev, tdm);
+ ret = devm_snd_soc_register_component(&pdev->dev, &jh7110_tdm_component,
+ &jh7110_tdm_dai, 1);
+ if (ret) {
+ dev_err(&pdev->dev, "Failed to register dai\n");
+ return ret;
+ }
+
+ ret = devm_snd_dmaengine_pcm_register(&pdev->dev,
+ &jh7110_dmaengine_pcm_config,
+ SND_DMAENGINE_PCM_FLAG_COMPAT);
+ if (ret) {
+ dev_err(&pdev->dev, "Could not register pcm: %d\n", ret);
+ return ret;
+ }
+
+ pm_runtime_enable(&pdev->dev);
+#ifdef CONFIG_PM
+ jh7110_tdm_clk_disable(tdm);
+#endif
+
+ return 0;
+}
+
+static int jh7110_tdm_dev_remove(struct platform_device *pdev)
+{
+ pm_runtime_disable(&pdev->dev);
+ return 0;
+}
+
+static const struct of_device_id jh7110_tdm_of_match[] = {
+ { .compatible = "starfive,jh7110-tdm", },
+ {}
+};
+
+MODULE_DEVICE_TABLE(of, jh7110_tdm_of_match);
+
+static const struct dev_pm_ops jh7110_tdm_pm_ops = {
+ SET_RUNTIME_PM_OPS(jh7110_tdm_runtime_suspend,
+ jh7110_tdm_runtime_resume, NULL)
+ SET_SYSTEM_SLEEP_PM_OPS(jh7110_tdm_system_suspend,
+ jh7110_tdm_system_resume)
+};
+
+static struct platform_driver jh7110_tdm_driver = {
+ .driver = {
+ .name = "jh7110-tdm",
+ .of_match_table = jh7110_tdm_of_match,
+ .pm = &jh7110_tdm_pm_ops,
+ },
+ .probe = jh7110_tdm_probe,
+ .remove = jh7110_tdm_dev_remove,
+};
+module_platform_driver(jh7110_tdm_driver);
+
+MODULE_DESCRIPTION("StarFive JH7110 TDM ASoC Driver");
+MODULE_AUTHOR("Walker Chen <walker.chen@starfivetech.com>");
+MODULE_LICENSE("GPL");
diff --git a/sound/soc/starfive/jh7110_tdm.h b/sound/soc/starfive/jh7110_tdm.h
new file mode 100644
index 000000000000..0b7e6d6543c5
--- /dev/null
+++ b/sound/soc/starfive/jh7110_tdm.h
@@ -0,0 +1,138 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * TDM driver for the StarFive JH7110 SoC
+ *
+ * Copyright (C) 2023 StarFive Technology Co., Ltd.
+ *
+ * Author: Walker Chen <walker.chen@starfivetech.com>
+ */
+
+#ifndef __SND_SOC_STARFIVE_TDM_H
+#define __SND_SOC_STARFIVE_TDM_H
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/types.h>
+#include <sound/dmaengine_pcm.h>
+#include <sound/pcm.h>
+#include <linux/dmaengine.h>
+#include <linux/types.h>
+
+#define TDM_PCMGBCR 0x00
+ #define PCMGBCR_MASK 0x1e
+ #define PCMGBCR_ENABLE BIT(0)
+ #define PCMGBCR_TRITXEN BIT(4)
+ #define CLKPOL_BIT 5
+ #define TRITXEN_BIT 4
+ #define ELM_BIT 3
+ #define SYNCM_BIT 2
+ #define MS_BIT 1
+#define TDM_PCMTXCR 0x04
+ #define PCMTXCR_TXEN BIT(0)
+ #define IFL_BIT 11
+ #define WL_BIT 8
+ #define SSCALE_BIT 4
+ #define SL_BIT 2
+ #define LRJ_BIT 1
+#define TDM_PCMRXCR 0x08
+ #define PCMRXCR_RXEN BIT(0)
+ #define PCMRXCR_RXSL_MASK 0xc
+ #define PCMRXCR_RXSL_16BIT 0x4
+ #define PCMRXCR_RXSL_32BIT 0x8
+ #define PCMRXCR_SCALE_MASK 0xf0
+ #define PCMRXCR_SCALE_1CH 0x10
+#define TDM_PCMDIV 0x0c
+
+#define JH7110_TDM_FIFO 0x170c0000
+#define JH7110_TDM_FIFO_DEPTH 32
+
+enum TDM_MASTER_SLAVE_MODE {
+ TDM_AS_MASTER = 0,
+ TDM_AS_SLAVE,
+};
+
+enum TDM_CLKPOL {
+ /* tx raising and rx falling */
+ TDM_TX_RASING_RX_FALLING = 0,
+ /* tx falling and rx raising */
+ TDM_TX_FALLING_RX_RASING,
+};
+
+enum TDM_ELM {
+ /* only work while SYNCM=0 */
+ TDM_ELM_LATE = 0,
+ TDM_ELM_EARLY,
+};
+
+enum TDM_SYNCM {
+ /* short frame sync */
+ TDM_SYNCM_SHORT = 0,
+ /* long frame sync */
+ TDM_SYNCM_LONG,
+};
+
+enum TDM_IFL {
+ /* FIFO to send or received : half-1/2, Quarter-1/4 */
+ TDM_FIFO_HALF = 0,
+ TDM_FIFO_QUARTER,
+};
+
+enum TDM_WL {
+ /* send or received word length */
+ TDM_8BIT_WORD_LEN = 0,
+ TDM_16BIT_WORD_LEN,
+ TDM_20BIT_WORD_LEN,
+ TDM_24BIT_WORD_LEN,
+ TDM_32BIT_WORD_LEN,
+};
+
+enum TDM_SL {
+ /* send or received slot length */
+ TDM_8BIT_SLOT_LEN = 0,
+ TDM_16BIT_SLOT_LEN,
+ TDM_32BIT_SLOT_LEN,
+};
+
+enum TDM_LRJ {
+ /* left-justify or right-justify */
+ TDM_RIGHT_JUSTIFY = 0,
+ TDM_LEFT_JUSTIFT,
+};
+
+struct tdm_chan_cfg {
+ enum TDM_IFL ifl;
+ enum TDM_WL wl;
+ unsigned char sscale;
+ enum TDM_SL sl;
+ enum TDM_LRJ lrj;
+ unsigned char enable;
+};
+
+struct jh7110_tdm_dev {
+ void __iomem *tdm_base;
+ struct device *dev;
+ struct clk_bulk_data clks[6];
+ struct reset_control *resets;
+
+ enum TDM_CLKPOL clkpolity;
+ enum TDM_ELM elm;
+ enum TDM_SYNCM syncm;
+ enum TDM_MASTER_SLAVE_MODE ms_mode;
+
+ struct tdm_chan_cfg tx;
+ struct tdm_chan_cfg rx;
+
+ u16 syncdiv;
+ u32 samplerate;
+ u32 pcmclk;
+
+ /* data related to DMA transfers b/w tdm and DMAC */
+ struct snd_dmaengine_dai_dma_data play_dma_data;
+ struct snd_dmaengine_dai_dma_data capture_dma_data;
+ u32 saved_pcmgbcr;
+ u32 saved_pcmtxcr;
+ u32 saved_pcmrxcr;
+ u32 saved_pcmdiv;
+};
+
+#endif /* __SND_SOC_STARFIVE_TDM_H */
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v4 3/3] riscv: dts: starfive: add the node and pins configuration for tdm
2023-05-11 9:15 [PATCH v4 0/3] Add TDM audio on StarFive JH7110 Walker Chen
2023-05-11 9:15 ` [PATCH v4 1/3] ASoC: dt-bindings: Add TDM controller bindings for " Walker Chen
2023-05-11 9:15 ` [PATCH v4 2/3] ASoC: starfive: Add JH7110 TDM driver Walker Chen
@ 2023-05-11 9:15 ` Walker Chen
2023-05-15 8:44 ` Walker Chen
2 siblings, 1 reply; 13+ messages in thread
From: Walker Chen @ 2023-05-11 9:15 UTC (permalink / raw)
To: Mark Brown, Liam Girdwood, Claudiu Beznea, Jaroslav Kysela,
Takashi Iwai, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Emil Renner Berthing, Walker Chen
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
Add the tdm controller node and pins configuration of tdm for the
StarFive JH7110 SoC.
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
---
.../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++++++++++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 ++++++++++
2 files changed, 61 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 1155b97b593d..19b5954ee72d 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -214,6 +214,40 @@
slew-rate = <0>;
};
};
+
+ tdm0_pins: tdm0-pins {
+ tdm0-pins-tx {
+ pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
+ GPOEN_ENABLE,
+ GPI_NONE)>;
+ bias-pull-up;
+ drive-strength = <2>;
+ input-disable;
+ input-schmitt-disable;
+ slew-rate = <0>;
+ };
+
+ tdm0-pins-rx {
+ pinmux = <GPIOMUX(61, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_RXD)>;
+ input-enable;
+ };
+
+ tdm0-pins-sync {
+ pinmux = <GPIOMUX(63, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_SYNC)>;
+ input-enable;
+ };
+
+ tdm0-pins-pcmclk {
+ pinmux = <GPIOMUX(38, GPOUT_HIGH,
+ GPOEN_DISABLE,
+ GPI_SYS_TDM_CLK)>;
+ input-enable;
+ };
+ };
};
&uart0 {
@@ -221,3 +255,9 @@
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
+
+&tdm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&tdm0_pins>;
+ status = "okay";
+};
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 866313570a7e..cfda6fb0d91b 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -366,6 +366,27 @@
status = "disabled";
};
+ tdm: tdm@10090000 {
+ compatible = "starfive,jh7110-tdm";
+ reg = <0x0 0x10090000 0x0 0x1000>;
+ clocks = <&syscrg JH7110_SYSCLK_TDM_AHB>,
+ <&syscrg JH7110_SYSCLK_TDM_APB>,
+ <&syscrg JH7110_SYSCLK_TDM_INTERNAL>,
+ <&syscrg JH7110_SYSCLK_TDM_TDM>,
+ <&syscrg JH7110_SYSCLK_MCLK_INNER>,
+ <&tdm_ext>;
+ clock-names = "tdm_ahb", "tdm_apb",
+ "tdm_internal", "tdm",
+ "mclk_inner", "tdm_ext";
+ resets = <&syscrg JH7110_SYSRST_TDM_AHB>,
+ <&syscrg JH7110_SYSRST_TDM_APB>,
+ <&syscrg JH7110_SYSRST_TDM_CORE>;
+ dmas = <&dma 20>, <&dma 21>;
+ dma-names = "rx","tx";
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
stgcrg: clock-controller@10230000 {
compatible = "starfive,jh7110-stgcrg";
reg = <0x0 0x10230000 0x0 0x10000>;
--
2.17.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/3] ASoC: starfive: Add JH7110 TDM driver
2023-05-11 9:15 ` [PATCH v4 2/3] ASoC: starfive: Add JH7110 TDM driver Walker Chen
@ 2023-05-15 8:29 ` Walker Chen
2023-05-15 10:51 ` Mark Brown
2023-05-17 8:35 ` Claudiu.Beznea
1 sibling, 1 reply; 13+ messages in thread
From: Walker Chen @ 2023-05-15 8:29 UTC (permalink / raw)
To: Mark Brown, Liam Girdwood, Claudiu Beznea, Jaroslav Kysela,
Takashi Iwai, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Emil Renner Berthing
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
On 2023/5/11 17:15, Walker Chen wrote:
> Add tdm driver support for the StarFive JH7110 SoC.
>
> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
> ---
> MAINTAINERS | 6 +
> sound/soc/Kconfig | 1 +
> sound/soc/Makefile | 1 +
> sound/soc/starfive/Kconfig | 15 +
> sound/soc/starfive/Makefile | 2 +
> sound/soc/starfive/jh7110_tdm.c | 554 ++++++++++++++++++++++++++++++++
> sound/soc/starfive/jh7110_tdm.h | 138 ++++++++
> 7 files changed, 717 insertions(+)
> create mode 100644 sound/soc/starfive/Kconfig
> create mode 100644 sound/soc/starfive/Makefile
> create mode 100644 sound/soc/starfive/jh7110_tdm.c
> create mode 100644 sound/soc/starfive/jh7110_tdm.h
>
Hi Mark / Claudiu,
I have submitted new version of patch for TDM driver. Could you please help to review and give your comments?
Thanks a lot!
Best regards,
Walker
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 3/3] riscv: dts: starfive: add the node and pins configuration for tdm
2023-05-11 9:15 ` [PATCH v4 3/3] riscv: dts: starfive: add the node and pins configuration for tdm Walker Chen
@ 2023-05-15 8:44 ` Walker Chen
2023-05-15 8:58 ` Conor Dooley
0 siblings, 1 reply; 13+ messages in thread
From: Walker Chen @ 2023-05-15 8:44 UTC (permalink / raw)
To: Mark Brown, Liam Girdwood, Claudiu Beznea, Jaroslav Kysela,
Takashi Iwai, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Emil Renner Berthing
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
On 2023/5/11 17:15, Walker Chen wrote:
> Add the tdm controller node and pins configuration of tdm for the
> StarFive JH7110 SoC.
>
> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
> ---
> .../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++++++++++
> arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 ++++++++++
> 2 files changed, 61 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> index 1155b97b593d..19b5954ee72d 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> @@ -214,6 +214,40 @@
> slew-rate = <0>;
> };
> };
> +
> + tdm0_pins: tdm0-pins {
> + tdm0-pins-tx {
> + pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
> + GPOEN_ENABLE,
> + GPI_NONE)>;
> + bias-pull-up;
> + drive-strength = <2>;
> + input-disable;
> + input-schmitt-disable;
> + slew-rate = <0>;
> + };
> +
> + tdm0-pins-rx {
> + pinmux = <GPIOMUX(61, GPOUT_HIGH,
> + GPOEN_DISABLE,
> + GPI_SYS_TDM_RXD)>;
> + input-enable;
> + };
> +
> + tdm0-pins-sync {
> + pinmux = <GPIOMUX(63, GPOUT_HIGH,
> + GPOEN_DISABLE,
> + GPI_SYS_TDM_SYNC)>;
> + input-enable;
> + };
> +
> + tdm0-pins-pcmclk {
> + pinmux = <GPIOMUX(38, GPOUT_HIGH,
> + GPOEN_DISABLE,
> + GPI_SYS_TDM_CLK)>;
> + input-enable;
> + };
> + };
> };
>
> &uart0 {
> @@ -221,3 +255,9 @@
> pinctrl-0 = <&uart0_pins>;
> status = "okay";
> };
> +
> +&tdm {
> + pinctrl-names = "default";
> + pinctrl-0 = <&tdm0_pins>;
> + status = "okay";
> +};
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 866313570a7e..cfda6fb0d91b 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -366,6 +366,27 @@
> status = "disabled";
> };
>
> + tdm: tdm@10090000 {
> + compatible = "starfive,jh7110-tdm";
> + reg = <0x0 0x10090000 0x0 0x1000>;
> + clocks = <&syscrg JH7110_SYSCLK_TDM_AHB>,
> + <&syscrg JH7110_SYSCLK_TDM_APB>,
> + <&syscrg JH7110_SYSCLK_TDM_INTERNAL>,
> + <&syscrg JH7110_SYSCLK_TDM_TDM>,
> + <&syscrg JH7110_SYSCLK_MCLK_INNER>,
> + <&tdm_ext>;
> + clock-names = "tdm_ahb", "tdm_apb",
> + "tdm_internal", "tdm",
> + "mclk_inner", "tdm_ext";
> + resets = <&syscrg JH7110_SYSRST_TDM_AHB>,
> + <&syscrg JH7110_SYSRST_TDM_APB>,
> + <&syscrg JH7110_SYSRST_TDM_CORE>;
> + dmas = <&dma 20>, <&dma 21>;
> + dma-names = "rx","tx";
> + #sound-dai-cells = <0>;
> + status = "disabled";
> + };
> +
> stgcrg: clock-controller@10230000 {
> compatible = "starfive,jh7110-stgcrg";
> reg = <0x0 0x10230000 0x0 0x10000>;
Hi Conor / Emil,
Based on our discussion a few days ago, the new version of patch for dts looks like this,
Please help to review and provide your comments if you feel free.
Thank you very much!
Best regards,
Walker
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 3/3] riscv: dts: starfive: add the node and pins configuration for tdm
2023-05-15 8:44 ` Walker Chen
@ 2023-05-15 8:58 ` Conor Dooley
2023-05-15 11:20 ` Mark Brown
2023-05-15 12:36 ` Walker Chen
0 siblings, 2 replies; 13+ messages in thread
From: Conor Dooley @ 2023-05-15 8:58 UTC (permalink / raw)
To: Walker Chen
Cc: Mark Brown, Liam Girdwood, Claudiu Beznea, Jaroslav Kysela,
Takashi Iwai, Rob Herring, Krzysztof Kozlowski,
Emil Renner Berthing, alsa-devel, devicetree, linux-kernel,
linux-riscv
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On Mon, May 15, 2023 at 04:44:54PM +0800, Walker Chen wrote:
> Hi Conor / Emil,
>
> Based on our discussion a few days ago, the new version of patch for dts looks like this,
> Please help to review and provide your comments if you feel free.
> On 2023/5/11 17:15, Walker Chen wrote:
It's only been 4 days chief, of which 2 were the weekend, you don't need
to bump it yet! You'd be better off asking one of your co-workers to
review the content, instead of me. I'll happily apply the patch, with
appropriate review, once the dt-binding has been applied by Mark. I do
not have the capacity to review the detail of individual patches adding
peripherals unfortunately.
Getting your co-workers to look at your patches, and doing the same for
theirs, is almost always a good idea for speeding up the process
Thanks for dropping the overlay though,
Conor.
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^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/3] ASoC: starfive: Add JH7110 TDM driver
2023-05-15 8:29 ` Walker Chen
@ 2023-05-15 10:51 ` Mark Brown
2023-05-15 12:47 ` Walker Chen
0 siblings, 1 reply; 13+ messages in thread
From: Mark Brown @ 2023-05-15 10:51 UTC (permalink / raw)
To: Walker Chen
Cc: Liam Girdwood, Claudiu Beznea, Jaroslav Kysela, Takashi Iwai,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Emil Renner Berthing, alsa-devel, devicetree, linux-kernel,
linux-riscv
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On Mon, May 15, 2023 at 04:29:07PM +0800, Walker Chen wrote:
> I have submitted new version of patch for TDM driver. Could you please help to review and give your comments?
Please don't send content free pings and please allow a reasonable time
for review. People get busy, go on holiday, attend conferences and so
on so unless there is some reason for urgency (like critical bug fixes)
please allow at least a couple of weeks for review. If there have been
review comments then people may be waiting for those to be addressed.
Sending content free pings adds to the mail volume (if they are seen at
all) which is often the problem and since they can't be reviewed
directly if something has gone wrong you'll have to resend the patches
anyway, so sending again is generally a better approach though there are
some other maintainers who like them - if in doubt look at how patches
for the subsystem are normally handled.
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^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 3/3] riscv: dts: starfive: add the node and pins configuration for tdm
2023-05-15 8:58 ` Conor Dooley
@ 2023-05-15 11:20 ` Mark Brown
2023-05-15 12:36 ` Walker Chen
1 sibling, 0 replies; 13+ messages in thread
From: Mark Brown @ 2023-05-15 11:20 UTC (permalink / raw)
To: Conor Dooley
Cc: Walker Chen, Liam Girdwood, Claudiu Beznea, Jaroslav Kysela,
Takashi Iwai, Rob Herring, Krzysztof Kozlowski,
Emil Renner Berthing, alsa-devel, devicetree, linux-kernel,
linux-riscv
[-- Attachment #1: Type: text/plain, Size: 281 bytes --]
On Mon, May 15, 2023 at 09:58:12AM +0100, Conor Dooley wrote:
> It's only been 4 days chief, of which 2 were the weekend, you don't need
> to bump it yet! You'd be better off asking one of your co-workers to
4 days, 2 of which were the weekend and 4 of which I was on holiday...
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 3/3] riscv: dts: starfive: add the node and pins configuration for tdm
2023-05-15 8:58 ` Conor Dooley
2023-05-15 11:20 ` Mark Brown
@ 2023-05-15 12:36 ` Walker Chen
1 sibling, 0 replies; 13+ messages in thread
From: Walker Chen @ 2023-05-15 12:36 UTC (permalink / raw)
To: Conor Dooley
Cc: Mark Brown, Liam Girdwood, Claudiu Beznea, Jaroslav Kysela,
Takashi Iwai, Rob Herring, Krzysztof Kozlowski,
Emil Renner Berthing, alsa-devel, devicetree, linux-kernel,
linux-riscv
On 2023/5/15 16:58, Conor Dooley wrote:
> On Mon, May 15, 2023 at 04:44:54PM +0800, Walker Chen wrote:
>
>> Hi Conor / Emil,
>>
>> Based on our discussion a few days ago, the new version of patch for dts looks like this,
>> Please help to review and provide your comments if you feel free.
>
>> On 2023/5/11 17:15, Walker Chen wrote:
>
> It's only been 4 days chief, of which 2 were the weekend, you don't need
> to bump it yet! You'd be better off asking one of your co-workers to
> review the content, instead of me. I'll happily apply the patch, with
> appropriate review, once the dt-binding has been applied by Mark. I do
> not have the capacity to review the detail of individual patches adding
> peripherals unfortunately.
> Getting your co-workers to look at your patches, and doing the same for
> theirs, is almost always a good idea for speeding up the process
Oh, Conor, perhaps I was too eager to finish the work quickly. Sorry for that!
Maybe I need to ask my co-worker to review firstly as you said.
Best regards,
Walker
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/3] ASoC: starfive: Add JH7110 TDM driver
2023-05-15 10:51 ` Mark Brown
@ 2023-05-15 12:47 ` Walker Chen
0 siblings, 0 replies; 13+ messages in thread
From: Walker Chen @ 2023-05-15 12:47 UTC (permalink / raw)
To: Mark Brown
Cc: Liam Girdwood, Claudiu Beznea, Jaroslav Kysela, Takashi Iwai,
Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Emil Renner Berthing, alsa-devel, devicetree, linux-kernel,
linux-riscv
On 2023/5/15 18:51, Mark Brown wrote:
> On Mon, May 15, 2023 at 04:29:07PM +0800, Walker Chen wrote:
>
>> I have submitted new version of patch for TDM driver. Could you please help to review and give your comments?
>
> Please don't send content free pings and please allow a reasonable time
> for review. People get busy, go on holiday, attend conferences and so
> on so unless there is some reason for urgency (like critical bug fixes)
> please allow at least a couple of weeks for review. If there have been
> review comments then people may be waiting for those to be addressed.
>
> Sending content free pings adds to the mail volume (if they are seen at
> all) which is often the problem and since they can't be reviewed
> directly if something has gone wrong you'll have to resend the patches
> anyway, so sending again is generally a better approach though there are
> some other maintainers who like them - if in doubt look at how patches
> for the subsystem are normally handled.
Hi Mark,
Sorry for that! Please forgive me for asking so eagerly.
I will pay attention to this in the future.
Best regards,
Walker
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/3] ASoC: starfive: Add JH7110 TDM driver
2023-05-11 9:15 ` [PATCH v4 2/3] ASoC: starfive: Add JH7110 TDM driver Walker Chen
2023-05-15 8:29 ` Walker Chen
@ 2023-05-17 8:35 ` Claudiu.Beznea
2023-05-24 8:20 ` Walker Chen
1 sibling, 1 reply; 13+ messages in thread
From: Claudiu.Beznea @ 2023-05-17 8:35 UTC (permalink / raw)
To: walker.chen, broonie, lgirdwood, perex, tiwai, robh+dt,
krzysztof.kozlowski+dt, Conor.Dooley, emil.renner.berthing
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
On 11.05.2023 12:15, Walker Chen wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Add tdm driver support for the StarFive JH7110 SoC.
>
> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
> ---
> MAINTAINERS | 6 +
> sound/soc/Kconfig | 1 +
> sound/soc/Makefile | 1 +
> sound/soc/starfive/Kconfig | 15 +
> sound/soc/starfive/Makefile | 2 +
> sound/soc/starfive/jh7110_tdm.c | 554 ++++++++++++++++++++++++++++++++
> sound/soc/starfive/jh7110_tdm.h | 138 ++++++++
> 7 files changed, 717 insertions(+)
> create mode 100644 sound/soc/starfive/Kconfig
> create mode 100644 sound/soc/starfive/Makefile
> create mode 100644 sound/soc/starfive/jh7110_tdm.c
> create mode 100644 sound/soc/starfive/jh7110_tdm.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 5f9c544bc189..add89615d327 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -19945,6 +19945,12 @@ F: Documentation/devicetree/bindings/power/starfive*
> F: drivers/soc/starfive/jh71xx_pmu.c
> F: include/dt-bindings/power/starfive,jh7110-pmu.h
>
> +STARFIVE JH7110 TDM DRIVERS
> +M: Walker Chen <walker.chen@starfivetech.com>
> +S: Maintained
> +F: Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
> +F: sound/soc/starfive/jh7110-tdm.*
> +
> STARFIVE SOC DRIVERS
> M: Conor Dooley <conor@kernel.org>
> S: Maintained
> diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
> index 848fbae26c3b..8d1d9401ecf2 100644
> --- a/sound/soc/Kconfig
> +++ b/sound/soc/Kconfig
> @@ -91,6 +91,7 @@ source "sound/soc/sh/Kconfig"
> source "sound/soc/sof/Kconfig"
> source "sound/soc/spear/Kconfig"
> source "sound/soc/sprd/Kconfig"
> +source "sound/soc/starfive/Kconfig"
> source "sound/soc/sti/Kconfig"
> source "sound/soc/stm/Kconfig"
> source "sound/soc/sunxi/Kconfig"
> diff --git a/sound/soc/Makefile b/sound/soc/Makefile
> index 507eaed1d6a1..65aeb4ef4068 100644
> --- a/sound/soc/Makefile
> +++ b/sound/soc/Makefile
> @@ -59,6 +59,7 @@ obj-$(CONFIG_SND_SOC) += sh/
> obj-$(CONFIG_SND_SOC) += sof/
> obj-$(CONFIG_SND_SOC) += spear/
> obj-$(CONFIG_SND_SOC) += sprd/
> +obj-$(CONFIG_SND_SOC) += starfive/
> obj-$(CONFIG_SND_SOC) += sti/
> obj-$(CONFIG_SND_SOC) += stm/
> obj-$(CONFIG_SND_SOC) += sunxi/
> diff --git a/sound/soc/starfive/Kconfig b/sound/soc/starfive/Kconfig
> new file mode 100644
> index 000000000000..fafb681f8c0a
> --- /dev/null
> +++ b/sound/soc/starfive/Kconfig
> @@ -0,0 +1,15 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +config SND_SOC_STARFIVE
> + tristate "Audio support for StarFive SoC"
> + depends on COMPILE_TEST || ARCH_STARFIVE
> + help
> + Say Y or M if you want to add support for codecs attached to
> + the Starfive SoCs' Audio interfaces. You will also need to
> + select the audio interfaces to support below.
> +
> +config SND_SOC_JH7110_TDM
> + tristate "JH7110 TDM device driver"
> + depends on HAVE_CLK && SND_SOC_STARFIVE
> + select SND_SOC_GENERIC_DMAENGINE_PCM
> + help
> + Say Y or M if you want to add support for StarFive TDM driver.
> diff --git a/sound/soc/starfive/Makefile b/sound/soc/starfive/Makefile
> new file mode 100644
> index 000000000000..f7d960211d72
> --- /dev/null
> +++ b/sound/soc/starfive/Makefile
> @@ -0,0 +1,2 @@
> +# StarFive Platform Support
> +obj-$(CONFIG_SND_SOC_JH7110_TDM) += jh7110_tdm.o
> diff --git a/sound/soc/starfive/jh7110_tdm.c b/sound/soc/starfive/jh7110_tdm.c
> new file mode 100644
> index 000000000000..1f94cc210140
> --- /dev/null
> +++ b/sound/soc/starfive/jh7110_tdm.c
> @@ -0,0 +1,554 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * jh7110_tdm.c -- StarFive JH7110 TDM driver
> + *
> + * Copyright (C) 2023 StarFive Technology Co., Ltd.
> + *
> + * Author: Walker Chen <walker.chen@starfivetech.com>
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/device.h>
> +#include <linux/module.h>
> +#include <linux/of_irq.h>
> +#include <linux/of_platform.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/regmap.h>
> +#include <linux/reset.h>
> +#include <sound/initval.h>
> +#include <sound/pcm_params.h>
> +#include <sound/soc.h>
> +#include <sound/soc-dai.h>
> +#include "jh7110_tdm.h"
> +
> +static inline u32 jh7110_tdm_readl(struct jh7110_tdm_dev *tdm, u16 reg)
> +{
> + return readl_relaxed(tdm->tdm_base + reg);
> +}
> +
> +static inline void jh7110_tdm_writel(struct jh7110_tdm_dev *tdm, u16 reg, u32 val)
> +{
> + writel_relaxed(val, tdm->tdm_base + reg);
> +}
> +
> +static void jh7110_tdm_save_context(struct jh7110_tdm_dev *tdm,
> + struct snd_pcm_substream *substream)
> +{
> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
> + tdm->saved_pcmtxcr = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
> + else
> + tdm->saved_pcmrxcr = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
> +}
> +
> +static void jh7110_tdm_start(struct jh7110_tdm_dev *tdm,
> + struct snd_pcm_substream *substream)
> +{
> + u32 data;
> +
> + data = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
> + jh7110_tdm_writel(tdm, TDM_PCMGBCR, data | PCMGBCR_ENABLE);
> +
> + /* restore context */
> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
> + jh7110_tdm_writel(tdm, TDM_PCMTXCR, tdm->saved_pcmtxcr | PCMTXCR_TXEN);
> + else
> + jh7110_tdm_writel(tdm, TDM_PCMRXCR, tdm->saved_pcmrxcr | PCMRXCR_RXEN);
> +}
> +
> +static void jh7110_tdm_stop(struct jh7110_tdm_dev *tdm,
> + struct snd_pcm_substream *substream)
> +{
> + unsigned int val;
> +
> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
> + val = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
> + val &= ~PCMTXCR_TXEN;
> + jh7110_tdm_writel(tdm, TDM_PCMTXCR, val);
> + } else {
> + val = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
> + val &= ~PCMRXCR_RXEN;
> + jh7110_tdm_writel(tdm, TDM_PCMRXCR, val);
> + }
> +}
> +
> +static int jh7110_tdm_syncdiv(struct jh7110_tdm_dev *tdm)
> +{
> + u32 sl, sscale, syncdiv;
> +
> + if (tdm->rx.sl >= tdm->tx.sl)
> + sl = tdm->rx.sl;
> + else
> + sl = tdm->tx.sl;
> +
> + if (tdm->rx.sscale >= tdm->tx.sscale)
> + sscale = tdm->rx.sscale;
> + else
> + sscale = tdm->tx.sscale;
> +
> + syncdiv = tdm->pcmclk / tdm->samplerate - 1;
> +
> + if ((syncdiv + 1) < (sl * sscale)) {
> + dev_err(tdm->dev, "Failed to set syncdiv!\n");
> + return -EINVAL;
> + }
> +
> + if (tdm->syncm == TDM_SYNCM_LONG &&
> + (tdm->rx.sscale <= 1 || tdm->tx.sscale <= 1)) {
You can add the below condition to the above if to avoid extra indentation.
> + if ((syncdiv + 1) <= sl) {
> + dev_err(tdm->dev, "Wrong syncdiv! It must be (syncdiv+1) > max[tx.sl, rx.sl]\n");
> + return -EINVAL;
> + }
> + }
> +
> + jh7110_tdm_writel(tdm, TDM_PCMDIV, syncdiv);
> + return 0;
> +}
> +
> +static int jh7110_tdm_config(struct jh7110_tdm_dev *tdm,
> + struct snd_pcm_substream *substream)
> +{
> + u32 datarx, datatx;
> + int ret;
> +
> + ret = jh7110_tdm_syncdiv(tdm);
> + if (ret)
> + return ret;
> +
> + datarx = (tdm->rx.ifl << IFL_BIT) |
> + (tdm->rx.wl << WL_BIT) |
> + (tdm->rx.sscale << SSCALE_BIT) |
> + (tdm->rx.sl << SL_BIT) |
> + (tdm->rx.lrj << LRJ_BIT);
> +
> + datatx = (tdm->tx.ifl << IFL_BIT) |
> + (tdm->tx.wl << WL_BIT) |
> + (tdm->tx.sscale << SSCALE_BIT) |
> + (tdm->tx.sl << SL_BIT) |
> + (tdm->tx.lrj << LRJ_BIT);
> +
> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
> + jh7110_tdm_writel(tdm, TDM_PCMTXCR, datatx);
> + else
> + jh7110_tdm_writel(tdm, TDM_PCMRXCR, datarx);
> +
> + return 0;
> +}
> +
> +static void jh7110_tdm_clk_disable(struct jh7110_tdm_dev *tdm)
> +{
> + clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
> +}
> +
> +static int jh7110_tdm_clk_enable(struct jh7110_tdm_dev *tdm)
> +{
> + int ret;
> +
> + ret = clk_bulk_prepare_enable(ARRAY_SIZE(tdm->clks), tdm->clks);
> + if (ret) {
> + dev_err(tdm->dev, "Failed to enable tdm clocks\n");
> + return ret;
> + }
> +
> + ret = reset_control_deassert(tdm->resets);
> + if (ret) {
> + dev_err(tdm->dev, "Failed to deassert tdm resets\n");
> + goto dis_tdm_clk;
> + }
> +
> + /* select tdm_ext clock as the clock source for tdm */
> + ret = clk_set_parent(tdm->clks[5].clk, tdm->clks[4].clk);
Maybe not valid for your clocks but, if clocks are not HW implemented for
this, changing parent at runtime could lead to glitches and thus to
unexpected behavior. You to check if this could be valid on your hardware.
> + if (ret) {
> + dev_err(tdm->dev, "Can't set clock source for clk_tdm: %d\n", ret);
> + goto dis_tdm_clk;
> + }
> + return 0;
> +
> +dis_tdm_clk:
> + clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
> +
> + return ret;
> +}
> +
> +static int jh7110_tdm_runtime_suspend(struct device *dev)
> +{
> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
> +
> + jh7110_tdm_clk_disable(tdm);
> + return 0;
> +}
> +
> +static int jh7110_tdm_runtime_resume(struct device *dev)
> +{
> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
> +
> + return jh7110_tdm_clk_enable(tdm);
> +}
> +
> +static int __maybe_unused jh7110_tdm_system_suspend(struct device *dev)
__maybe_unused could be removed if SYSTEM_SLEEP_PM_OPS() is used in the
definition of jh7110_tdm_pm_ops.
> +{
> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
> +
> + /* save context */
> + tdm->saved_pcmgbcr = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
> + tdm->saved_pcmdiv = jh7110_tdm_readl(tdm, TDM_PCMDIV);
> +
> + return pm_runtime_force_suspend(dev);
> +}
> +
> +static int __maybe_unused jh7110_tdm_system_resume(struct device *dev)
same
> +{
> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
> +
> + /* restore context */
> + jh7110_tdm_writel(tdm, TDM_PCMGBCR, tdm->saved_pcmgbcr);
> + jh7110_tdm_writel(tdm, TDM_PCMDIV, tdm->saved_pcmdiv);
> +
> + return pm_runtime_force_resume(dev);
> +}
> +
> +static const struct snd_soc_component_driver jh7110_tdm_component = {
> + .name = "jh7110-tdm",
> +};
> +
> +static int jh7110_tdm_startup(struct snd_pcm_substream *substream,
> + struct snd_soc_dai *cpu_dai)
> +{
> + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
> + struct snd_soc_dai_link *dai_link = rtd->dai_link;
> +
> + dai_link->stop_dma_first = 1;
> +
> + return 0;
> +}
> +
> +static int jh7110_tdm_hw_params(struct snd_pcm_substream *substream,
> + struct snd_pcm_hw_params *params,
> + struct snd_soc_dai *dai)
> +{
> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
> + int chan_wl, chan_sl, chan_nr;
> + unsigned int data_width;
> + unsigned int dma_bus_width;
> + struct snd_dmaengine_dai_dma_data *dma_data = NULL;
> + int ret = 0;
No need for initialization.
> +
> + data_width = params_width(params);
> +
> + tdm->samplerate = params_rate(params);
> + tdm->pcmclk = params_channels(params) * tdm->samplerate * data_width;
> +
> + switch (params_format(params)) {
> + case SNDRV_PCM_FORMAT_S16_LE:
> + chan_wl = TDM_16BIT_WORD_LEN;
> + chan_sl = TDM_16BIT_SLOT_LEN;
> + dma_bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> + break;
> +
> + case SNDRV_PCM_FORMAT_S32_LE:
> + chan_wl = TDM_32BIT_WORD_LEN;
> + chan_sl = TDM_32BIT_SLOT_LEN;
> + dma_bus_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
> + break;
> +
> + default:
> + dev_err(tdm->dev, "tdm: unsupported PCM fmt");
> + return -EINVAL;
> + }
> +
> + chan_nr = params_channels(params);
> + switch (chan_nr) {
> + case 1:
> + case 2:
> + case 4:
> + case 6:
> + case 8:
> + break;
> + default:
> + dev_err(tdm->dev, "channel not supported\n");
> + return -EINVAL;
> + }
> +
> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
> + tdm->tx.wl = chan_wl;
> + tdm->tx.sl = chan_sl;
> + tdm->tx.sscale = chan_nr;
> + tdm->play_dma_data.addr_width = dma_bus_width;
> + dma_data = &tdm->play_dma_data;
> + } else {
> + tdm->rx.wl = chan_wl;
> + tdm->rx.sl = chan_sl;
> + tdm->rx.sscale = chan_nr;
> + tdm->capture_dma_data.addr_width = dma_bus_width;
> + dma_data = &tdm->capture_dma_data;
> + }
> +
> + snd_soc_dai_set_dma_data(dai, substream, dma_data);
> +
> + ret = jh7110_tdm_config(tdm, substream);
> + if (ret)
> + return ret;
> +
> + jh7110_tdm_save_context(tdm, substream);
> + return 0;
> +}
> +
> +static int jh7110_tdm_trigger(struct snd_pcm_substream *substream,
> + int cmd, struct snd_soc_dai *dai)
> +{
> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
> + int ret = 0;
> +
> + switch (cmd) {
> + case SNDRV_PCM_TRIGGER_START:
> + case SNDRV_PCM_TRIGGER_RESUME:
> + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
> + jh7110_tdm_start(tdm, substream);
> + break;
> +
> + case SNDRV_PCM_TRIGGER_STOP:
> + case SNDRV_PCM_TRIGGER_SUSPEND:
> + case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
> + jh7110_tdm_stop(tdm, substream);
> + break;
> + default:
> + ret = -EINVAL;
> + break;
> + }
> + return ret;
> +}
> +
> +static int jh7110_tdm_set_dai_fmt(struct snd_soc_dai *cpu_dai,
> + unsigned int fmt)
> +{
> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(cpu_dai);
> + unsigned int gbcr;
> + int ret = 0;
> +
> + /* set master/slave audio interface */
> + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
> + case SND_SOC_DAIFMT_BP_FP:
> + /* cpu is master */
> + tdm->ms_mode = TDM_AS_MASTER;
> + break;
> + case SND_SOC_DAIFMT_BC_FC:
> + /* codec is master */
> + tdm->ms_mode = TDM_AS_SLAVE;
> + break;
> + case SND_SOC_DAIFMT_BC_FP:
> + case SND_SOC_DAIFMT_BP_FC:
> + ret = -EINVAL;
Probably you should return here to avoid updating register with invalid values.
> + break;
> + default:
> + dev_dbg(tdm->dev, "dwc : Invalid clock provider format\n");
> + ret = -EINVAL;
ditto
> + break;
> + }
> +
> + gbcr = (tdm->clkpolity << CLKPOL_BIT) |
> + (tdm->elm << ELM_BIT) |
> + (tdm->syncm << SYNCM_BIT) |
> + (tdm->ms_mode << MS_BIT);
> + jh7110_tdm_writel(tdm, TDM_PCMGBCR, gbcr);
> +
> + return ret;
> +}
> +
> +static const struct snd_soc_dai_ops jh7110_tdm_dai_ops = {
> + .startup = jh7110_tdm_startup,
> + .hw_params = jh7110_tdm_hw_params,
> + .trigger = jh7110_tdm_trigger,
> + .set_fmt = jh7110_tdm_set_dai_fmt,
> +};
> +
> +static int jh7110_tdm_dai_probe(struct snd_soc_dai *dai)
> +{
> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
> +
> + snd_soc_dai_init_dma_data(dai, &tdm->play_dma_data, &tdm->capture_dma_data);
> + snd_soc_dai_set_drvdata(dai, tdm);
> + return 0;
> +}
> +
> +#define JH7110_TDM_RATES SNDRV_PCM_RATE_8000_48000
> +
> +#define JH7110_TDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
> + SNDRV_PCM_FMTBIT_S32_LE)
> +
> +static struct snd_soc_dai_driver jh7110_tdm_dai = {
> + .name = "sf_tdm",
> + .id = 0,
> + .playback = {
> + .stream_name = "Playback",
> + .channels_min = 1,
> + .channels_max = 8,
> + .rates = JH7110_TDM_RATES,
> + .formats = JH7110_TDM_FORMATS,
> + },
> + .capture = {
> + .stream_name = "Capture",
> + .channels_min = 1,
> + .channels_max = 8,
> + .rates = JH7110_TDM_RATES,
> + .formats = JH7110_TDM_FORMATS,
> + },
> + .ops = &jh7110_tdm_dai_ops,
> + .probe = jh7110_tdm_dai_probe,
> + .symmetric_rate = 1,
> +};
> +
> +static const struct snd_pcm_hardware jh7110_pcm_hardware = {
> + .info = (SNDRV_PCM_INFO_MMAP |
> + SNDRV_PCM_INFO_MMAP_VALID |
> + SNDRV_PCM_INFO_PAUSE |
> + SNDRV_PCM_INFO_RESUME |
> + SNDRV_PCM_INFO_INTERLEAVED |
> + SNDRV_PCM_INFO_BLOCK_TRANSFER),
> + .buffer_bytes_max = 192512,
> + .period_bytes_min = 4096,
> + .period_bytes_max = 32768,
> + .periods_min = 1,
> + .periods_max = 48,
> + .fifo_size = 16,
> +};
> +
> +static const struct snd_dmaengine_pcm_config jh7110_dmaengine_pcm_config = {
> + .pcm_hardware = &jh7110_pcm_hardware,
> + .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
> + .prealloc_buffer_size = 192512,
> +};
> +
> +static void jh7110_tdm_init_params(struct jh7110_tdm_dev *tdm)
> +{
> + tdm->clkpolity = TDM_TX_RASING_RX_FALLING;
> + tdm->elm = TDM_ELM_LATE;
> + tdm->syncm = TDM_SYNCM_SHORT;
> +
> + tdm->rx.ifl = TDM_FIFO_HALF;
> + tdm->tx.ifl = TDM_FIFO_HALF;
> + tdm->rx.wl = TDM_16BIT_WORD_LEN;
> + tdm->tx.wl = TDM_16BIT_WORD_LEN;
> + tdm->rx.sscale = 2;
> + tdm->tx.sscale = 2;
> + tdm->rx.lrj = TDM_LEFT_JUSTIFT;
> + tdm->tx.lrj = TDM_LEFT_JUSTIFT;
> +
> + tdm->play_dma_data.addr = JH7110_TDM_FIFO;
> + tdm->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> + tdm->play_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
> + tdm->play_dma_data.maxburst = 16;
> +
> + tdm->capture_dma_data.addr = JH7110_TDM_FIFO;
> + tdm->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
> + tdm->capture_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
> + tdm->capture_dma_data.maxburst = 8;
> +}
> +
> +static int jh7110_tdm_clk_reset_init(struct platform_device *pdev,
> + struct jh7110_tdm_dev *tdm)
> +{
> + int ret;
> +
> + tdm->clks[0].id = "mclk_inner";
> + tdm->clks[1].id = "tdm_ahb";
> + tdm->clks[2].id = "tdm_apb";
> + tdm->clks[3].id = "tdm_internal";
> + tdm->clks[4].id = "tdm_ext";
> + tdm->clks[5].id = "tdm";
> +
> + ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(tdm->clks), tdm->clks);
> + if (ret) {
> + dev_err(&pdev->dev, "Failed to get tdm clocks\n");
> + return ret;
> + }
> +
> + tdm->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
> + if (IS_ERR(tdm->resets)) {
of_reset_control_array_get() called by devm_reset_control_array_get()
called by devm_reset_control_array_get_exclusive() could return
IS_ERR_OR_NULL() and propagates the NULL also here. Thus you should check
the return value with IS_ERR_OR_NULL()
> + ret = PTR_ERR(tdm->resets);
> + dev_err(&pdev->dev, "Failed to get tdm resets");
> + return ret;
> + }
> +
> + return jh7110_tdm_clk_enable(tdm);
AFAICT there is no need to enable clocks in probe. Thus you can remove this
here and rely on runtime PM when CONFIG_PM is enabled (and for !CONFIG_PM
see below comment in probe).
> +}
> +
> +static int jh7110_tdm_probe(struct platform_device *pdev)
> +{
> + struct jh7110_tdm_dev *tdm;
> + int ret;
> +
> + tdm = devm_kzalloc(&pdev->dev, sizeof(*tdm), GFP_KERNEL);
> + if (!tdm)
> + return -ENOMEM;
> +
> + tdm->tdm_base = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(tdm->tdm_base))
> + return PTR_ERR(tdm->tdm_base);
> +
> + tdm->dev = &pdev->dev;
> +
> + ret = jh7110_tdm_clk_reset_init(pdev, tdm);
> + if (ret) {
> + dev_err(&pdev->dev, "Failed to enable audio-tdm clock\n");
> + return ret;
> + }
> +
> + jh7110_tdm_init_params(tdm);
> +
> + dev_set_drvdata(&pdev->dev, tdm);
> + ret = devm_snd_soc_register_component(&pdev->dev, &jh7110_tdm_component,
> + &jh7110_tdm_dai, 1);
> + if (ret) {
> + dev_err(&pdev->dev, "Failed to register dai\n");
> + return ret;
> + }
> +
> + ret = devm_snd_dmaengine_pcm_register(&pdev->dev,
> + &jh7110_dmaengine_pcm_config,
> + SND_DMAENGINE_PCM_FLAG_COMPAT);
> + if (ret) {
> + dev_err(&pdev->dev, "Could not register pcm: %d\n", ret);
> + return ret;
> + }
> +
> + pm_runtime_enable(&pdev->dev);
> +#ifdef CONFIG_PM
> + jh7110_tdm_clk_disable(tdm);
> +#endif
Something like this:
if (!pm_runtime_enabled())
jh7110_tdm_runtime_resume();
> +
> + return 0;
> +}
> +
> +static int jh7110_tdm_dev_remove(struct platform_device *pdev)
> +{
> + pm_runtime_disable(&pdev->dev);
> + return 0;
> +}
> +
> +static const struct of_device_id jh7110_tdm_of_match[] = {
> + { .compatible = "starfive,jh7110-tdm", },
> + {}
> +};
> +
> +MODULE_DEVICE_TABLE(of, jh7110_tdm_of_match);
> +
> +static const struct dev_pm_ops jh7110_tdm_pm_ops = {
> + SET_RUNTIME_PM_OPS(jh7110_tdm_runtime_suspend,
> + jh7110_tdm_runtime_resume, NULL)
RUNTIME_PM_OPS() otherwise you need __maybe_unsed on functions.
> + SET_SYSTEM_SLEEP_PM_OPS(jh7110_tdm_system_suspend,
> + jh7110_tdm_system_resume)
SYSTEM_SLEEP_PM_OPS() otherwise you need __maybe_unsed on functions.
> +};
> +
> +static struct platform_driver jh7110_tdm_driver = {
> + .driver = {
> + .name = "jh7110-tdm",
> + .of_match_table = jh7110_tdm_of_match,
> + .pm = &jh7110_tdm_pm_ops,
pm_ptr(&jh7110_tdm_pm_ops)
> + },
> + .probe = jh7110_tdm_probe,
> + .remove = jh7110_tdm_dev_remove,
> +};
> +module_platform_driver(jh7110_tdm_driver);
> +
> +MODULE_DESCRIPTION("StarFive JH7110 TDM ASoC Driver");
> +MODULE_AUTHOR("Walker Chen <walker.chen@starfivetech.com>");
> +MODULE_LICENSE("GPL");
> diff --git a/sound/soc/starfive/jh7110_tdm.h b/sound/soc/starfive/jh7110_tdm.h
> new file mode 100644
> index 000000000000..0b7e6d6543c5
> --- /dev/null
> +++ b/sound/soc/starfive/jh7110_tdm.h
Is the header needed? Can't be all in one place? The header is anyway used
only in one driver.
> @@ -0,0 +1,138 @@
> +/* SPDX-License-Identifier: GPL-2.0
> + *
> + * TDM driver for the StarFive JH7110 SoC
> + *
> + * Copyright (C) 2023 StarFive Technology Co., Ltd.
> + *
> + * Author: Walker Chen <walker.chen@starfivetech.com>
> + */
> +
> +#ifndef __SND_SOC_STARFIVE_TDM_H
> +#define __SND_SOC_STARFIVE_TDM_H
> +
> +#include <linux/clk.h>
> +#include <linux/device.h>
> +#include <linux/types.h>
> +#include <sound/dmaengine_pcm.h>
> +#include <sound/pcm.h>
> +#include <linux/dmaengine.h>
> +#include <linux/types.h>
> +
> +#define TDM_PCMGBCR 0x00
> + #define PCMGBCR_MASK 0x1e
> + #define PCMGBCR_ENABLE BIT(0)
> + #define PCMGBCR_TRITXEN BIT(4)
> + #define CLKPOL_BIT 5
> + #define TRITXEN_BIT 4
> + #define ELM_BIT 3
> + #define SYNCM_BIT 2
> + #define MS_BIT 1
> +#define TDM_PCMTXCR 0x04
> + #define PCMTXCR_TXEN BIT(0)
> + #define IFL_BIT 11
> + #define WL_BIT 8
> + #define SSCALE_BIT 4
> + #define SL_BIT 2
> + #define LRJ_BIT 1
> +#define TDM_PCMRXCR 0x08
> + #define PCMRXCR_RXEN BIT(0)
> + #define PCMRXCR_RXSL_MASK 0xc
> + #define PCMRXCR_RXSL_16BIT 0x4
> + #define PCMRXCR_RXSL_32BIT 0x8
> + #define PCMRXCR_SCALE_MASK 0xf0
> + #define PCMRXCR_SCALE_1CH 0x10
> +#define TDM_PCMDIV 0x0c
> +
> +#define JH7110_TDM_FIFO 0x170c0000
> +#define JH7110_TDM_FIFO_DEPTH 32
> +
> +enum TDM_MASTER_SLAVE_MODE {
> + TDM_AS_MASTER = 0,
> + TDM_AS_SLAVE,
> +};
> +
> +enum TDM_CLKPOL {
> + /* tx raising and rx falling */
> + TDM_TX_RASING_RX_FALLING = 0,
> + /* tx falling and rx raising */
> + TDM_TX_FALLING_RX_RASING,
> +};
> +
> +enum TDM_ELM {
> + /* only work while SYNCM=0 */
> + TDM_ELM_LATE = 0,
> + TDM_ELM_EARLY,
> +};
> +
> +enum TDM_SYNCM {
> + /* short frame sync */
> + TDM_SYNCM_SHORT = 0,
> + /* long frame sync */
> + TDM_SYNCM_LONG,
> +};
> +
> +enum TDM_IFL {
> + /* FIFO to send or received : half-1/2, Quarter-1/4 */
> + TDM_FIFO_HALF = 0,
> + TDM_FIFO_QUARTER,
> +};
> +
> +enum TDM_WL {
> + /* send or received word length */
> + TDM_8BIT_WORD_LEN = 0,
> + TDM_16BIT_WORD_LEN,
> + TDM_20BIT_WORD_LEN,
> + TDM_24BIT_WORD_LEN,
> + TDM_32BIT_WORD_LEN,
> +};
> +
> +enum TDM_SL {
> + /* send or received slot length */
> + TDM_8BIT_SLOT_LEN = 0,
> + TDM_16BIT_SLOT_LEN,
> + TDM_32BIT_SLOT_LEN,
> +};
> +
> +enum TDM_LRJ {
> + /* left-justify or right-justify */
> + TDM_RIGHT_JUSTIFY = 0,
> + TDM_LEFT_JUSTIFT,
> +};
> +
> +struct tdm_chan_cfg {
> + enum TDM_IFL ifl;
> + enum TDM_WL wl;
> + unsigned char sscale;
> + enum TDM_SL sl;
> + enum TDM_LRJ lrj;
> + unsigned char enable;
> +};
> +
> +struct jh7110_tdm_dev {
> + void __iomem *tdm_base;
> + struct device *dev;
> + struct clk_bulk_data clks[6];
> + struct reset_control *resets;
> +
> + enum TDM_CLKPOL clkpolity;
> + enum TDM_ELM elm;
> + enum TDM_SYNCM syncm;
> + enum TDM_MASTER_SLAVE_MODE ms_mode;
> +
> + struct tdm_chan_cfg tx;
> + struct tdm_chan_cfg rx;
> +
> + u16 syncdiv;
> + u32 samplerate;
> + u32 pcmclk;
> +
> + /* data related to DMA transfers b/w tdm and DMAC */
> + struct snd_dmaengine_dai_dma_data play_dma_data;
> + struct snd_dmaengine_dai_dma_data capture_dma_data;
> + u32 saved_pcmgbcr;
> + u32 saved_pcmtxcr;
> + u32 saved_pcmrxcr;
> + u32 saved_pcmdiv;
> +};
> +
> +#endif /* __SND_SOC_STARFIVE_TDM_H */
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4 2/3] ASoC: starfive: Add JH7110 TDM driver
2023-05-17 8:35 ` Claudiu.Beznea
@ 2023-05-24 8:20 ` Walker Chen
0 siblings, 0 replies; 13+ messages in thread
From: Walker Chen @ 2023-05-24 8:20 UTC (permalink / raw)
To: Claudiu.Beznea, broonie, lgirdwood, perex, tiwai, robh+dt,
krzysztof.kozlowski+dt, Conor.Dooley, emil.renner.berthing
Cc: alsa-devel, devicetree, linux-kernel, linux-riscv
On 2023/5/17 16:35, Claudiu.Beznea@microchip.com wrote:
> On 11.05.2023 12:15, Walker Chen wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> Add tdm driver support for the StarFive JH7110 SoC.
>>
>> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
>> ---
>> MAINTAINERS | 6 +
>> sound/soc/Kconfig | 1 +
>> sound/soc/Makefile | 1 +
>> sound/soc/starfive/Kconfig | 15 +
>> sound/soc/starfive/Makefile | 2 +
>> sound/soc/starfive/jh7110_tdm.c | 554 ++++++++++++++++++++++++++++++++
>> sound/soc/starfive/jh7110_tdm.h | 138 ++++++++
>> 7 files changed, 717 insertions(+)
>> create mode 100644 sound/soc/starfive/Kconfig
>> create mode 100644 sound/soc/starfive/Makefile
>> create mode 100644 sound/soc/starfive/jh7110_tdm.c
>> create mode 100644 sound/soc/starfive/jh7110_tdm.h
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 5f9c544bc189..add89615d327 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -19945,6 +19945,12 @@ F: Documentation/devicetree/bindings/power/starfive*
>> F: drivers/soc/starfive/jh71xx_pmu.c
>> F: include/dt-bindings/power/starfive,jh7110-pmu.h
>>
>> +STARFIVE JH7110 TDM DRIVERS
>> +M: Walker Chen <walker.chen@starfivetech.com>
>> +S: Maintained
>> +F: Documentation/devicetree/bindings/sound/starfive,jh7110-tdm.yaml
>> +F: sound/soc/starfive/jh7110-tdm.*
>> +
>> STARFIVE SOC DRIVERS
>> M: Conor Dooley <conor@kernel.org>
>> S: Maintained
>> diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
>> index 848fbae26c3b..8d1d9401ecf2 100644
>> --- a/sound/soc/Kconfig
>> +++ b/sound/soc/Kconfig
>> @@ -91,6 +91,7 @@ source "sound/soc/sh/Kconfig"
>> source "sound/soc/sof/Kconfig"
>> source "sound/soc/spear/Kconfig"
>> source "sound/soc/sprd/Kconfig"
>> +source "sound/soc/starfive/Kconfig"
>> source "sound/soc/sti/Kconfig"
>> source "sound/soc/stm/Kconfig"
>> source "sound/soc/sunxi/Kconfig"
>> diff --git a/sound/soc/Makefile b/sound/soc/Makefile
>> index 507eaed1d6a1..65aeb4ef4068 100644
>> --- a/sound/soc/Makefile
>> +++ b/sound/soc/Makefile
>> @@ -59,6 +59,7 @@ obj-$(CONFIG_SND_SOC) += sh/
>> obj-$(CONFIG_SND_SOC) += sof/
>> obj-$(CONFIG_SND_SOC) += spear/
>> obj-$(CONFIG_SND_SOC) += sprd/
>> +obj-$(CONFIG_SND_SOC) += starfive/
>> obj-$(CONFIG_SND_SOC) += sti/
>> obj-$(CONFIG_SND_SOC) += stm/
>> obj-$(CONFIG_SND_SOC) += sunxi/
>> diff --git a/sound/soc/starfive/Kconfig b/sound/soc/starfive/Kconfig
>> new file mode 100644
>> index 000000000000..fafb681f8c0a
>> --- /dev/null
>> +++ b/sound/soc/starfive/Kconfig
>> @@ -0,0 +1,15 @@
>> +# SPDX-License-Identifier: GPL-2.0-only
>> +config SND_SOC_STARFIVE
>> + tristate "Audio support for StarFive SoC"
>> + depends on COMPILE_TEST || ARCH_STARFIVE
>> + help
>> + Say Y or M if you want to add support for codecs attached to
>> + the Starfive SoCs' Audio interfaces. You will also need to
>> + select the audio interfaces to support below.
>> +
>> +config SND_SOC_JH7110_TDM
>> + tristate "JH7110 TDM device driver"
>> + depends on HAVE_CLK && SND_SOC_STARFIVE
>> + select SND_SOC_GENERIC_DMAENGINE_PCM
>> + help
>> + Say Y or M if you want to add support for StarFive TDM driver.
>> diff --git a/sound/soc/starfive/Makefile b/sound/soc/starfive/Makefile
>> new file mode 100644
>> index 000000000000..f7d960211d72
>> --- /dev/null
>> +++ b/sound/soc/starfive/Makefile
>> @@ -0,0 +1,2 @@
>> +# StarFive Platform Support
>> +obj-$(CONFIG_SND_SOC_JH7110_TDM) += jh7110_tdm.o
>> diff --git a/sound/soc/starfive/jh7110_tdm.c b/sound/soc/starfive/jh7110_tdm.c
>> new file mode 100644
>> index 000000000000..1f94cc210140
>> --- /dev/null
>> +++ b/sound/soc/starfive/jh7110_tdm.c
>> @@ -0,0 +1,554 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * jh7110_tdm.c -- StarFive JH7110 TDM driver
>> + *
>> + * Copyright (C) 2023 StarFive Technology Co., Ltd.
>> + *
>> + * Author: Walker Chen <walker.chen@starfivetech.com>
>> + */
>> +
>> +#include <linux/clk.h>
>> +#include <linux/device.h>
>> +#include <linux/module.h>
>> +#include <linux/of_irq.h>
>> +#include <linux/of_platform.h>
>> +#include <linux/pm_runtime.h>
>> +#include <linux/regmap.h>
>> +#include <linux/reset.h>
>> +#include <sound/initval.h>
>> +#include <sound/pcm_params.h>
>> +#include <sound/soc.h>
>> +#include <sound/soc-dai.h>
>> +#include "jh7110_tdm.h"
>> +
>> +static inline u32 jh7110_tdm_readl(struct jh7110_tdm_dev *tdm, u16 reg)
>> +{
>> + return readl_relaxed(tdm->tdm_base + reg);
>> +}
>> +
>> +static inline void jh7110_tdm_writel(struct jh7110_tdm_dev *tdm, u16 reg, u32 val)
>> +{
>> + writel_relaxed(val, tdm->tdm_base + reg);
>> +}
>> +
>> +static void jh7110_tdm_save_context(struct jh7110_tdm_dev *tdm,
>> + struct snd_pcm_substream *substream)
>> +{
>> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
>> + tdm->saved_pcmtxcr = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
>> + else
>> + tdm->saved_pcmrxcr = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
>> +}
>> +
>> +static void jh7110_tdm_start(struct jh7110_tdm_dev *tdm,
>> + struct snd_pcm_substream *substream)
>> +{
>> + u32 data;
>> +
>> + data = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
>> + jh7110_tdm_writel(tdm, TDM_PCMGBCR, data | PCMGBCR_ENABLE);
>> +
>> + /* restore context */
>> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
>> + jh7110_tdm_writel(tdm, TDM_PCMTXCR, tdm->saved_pcmtxcr | PCMTXCR_TXEN);
>> + else
>> + jh7110_tdm_writel(tdm, TDM_PCMRXCR, tdm->saved_pcmrxcr | PCMRXCR_RXEN);
>> +}
>> +
>> +static void jh7110_tdm_stop(struct jh7110_tdm_dev *tdm,
>> + struct snd_pcm_substream *substream)
>> +{
>> + unsigned int val;
>> +
>> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
>> + val = jh7110_tdm_readl(tdm, TDM_PCMTXCR);
>> + val &= ~PCMTXCR_TXEN;
>> + jh7110_tdm_writel(tdm, TDM_PCMTXCR, val);
>> + } else {
>> + val = jh7110_tdm_readl(tdm, TDM_PCMRXCR);
>> + val &= ~PCMRXCR_RXEN;
>> + jh7110_tdm_writel(tdm, TDM_PCMRXCR, val);
>> + }
>> +}
>> +
>> +static int jh7110_tdm_syncdiv(struct jh7110_tdm_dev *tdm)
>> +{
>> + u32 sl, sscale, syncdiv;
>> +
>> + if (tdm->rx.sl >= tdm->tx.sl)
>> + sl = tdm->rx.sl;
>> + else
>> + sl = tdm->tx.sl;
>> +
>> + if (tdm->rx.sscale >= tdm->tx.sscale)
>> + sscale = tdm->rx.sscale;
>> + else
>> + sscale = tdm->tx.sscale;
>> +
>> + syncdiv = tdm->pcmclk / tdm->samplerate - 1;
>> +
>> + if ((syncdiv + 1) < (sl * sscale)) {
>> + dev_err(tdm->dev, "Failed to set syncdiv!\n");
>> + return -EINVAL;
>> + }
>> +
>> + if (tdm->syncm == TDM_SYNCM_LONG &&
>> + (tdm->rx.sscale <= 1 || tdm->tx.sscale <= 1)) {
>
> You can add the below condition to the above if to avoid extra indentation.
Hi Claudiu,
Thanks for reviewing the patch.
Yes, the following condition can be place with above statement together.
>
>> + if ((syncdiv + 1) <= sl) {
>> + dev_err(tdm->dev, "Wrong syncdiv! It must be (syncdiv+1) > max[tx.sl, rx.sl]\n");
>> + return -EINVAL;
>> + }
>> + }
>> +
>> + jh7110_tdm_writel(tdm, TDM_PCMDIV, syncdiv);
>> + return 0;
>> +}
>> +
>> +static int jh7110_tdm_config(struct jh7110_tdm_dev *tdm,
>> + struct snd_pcm_substream *substream)
>> +{
>> + u32 datarx, datatx;
>> + int ret;
>> +
>> + ret = jh7110_tdm_syncdiv(tdm);
>> + if (ret)
>> + return ret;
>> +
>> + datarx = (tdm->rx.ifl << IFL_BIT) |
>> + (tdm->rx.wl << WL_BIT) |
>> + (tdm->rx.sscale << SSCALE_BIT) |
>> + (tdm->rx.sl << SL_BIT) |
>> + (tdm->rx.lrj << LRJ_BIT);
>> +
>> + datatx = (tdm->tx.ifl << IFL_BIT) |
>> + (tdm->tx.wl << WL_BIT) |
>> + (tdm->tx.sscale << SSCALE_BIT) |
>> + (tdm->tx.sl << SL_BIT) |
>> + (tdm->tx.lrj << LRJ_BIT);
>> +
>> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
>> + jh7110_tdm_writel(tdm, TDM_PCMTXCR, datatx);
>> + else
>> + jh7110_tdm_writel(tdm, TDM_PCMRXCR, datarx);
>> +
>> + return 0;
>> +}
>> +
>> +static void jh7110_tdm_clk_disable(struct jh7110_tdm_dev *tdm)
>> +{
>> + clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
>> +}
>> +
>> +static int jh7110_tdm_clk_enable(struct jh7110_tdm_dev *tdm)
>> +{
>> + int ret;
>> +
>> + ret = clk_bulk_prepare_enable(ARRAY_SIZE(tdm->clks), tdm->clks);
>> + if (ret) {
>> + dev_err(tdm->dev, "Failed to enable tdm clocks\n");
>> + return ret;
>> + }
>> +
>> + ret = reset_control_deassert(tdm->resets);
>> + if (ret) {
>> + dev_err(tdm->dev, "Failed to deassert tdm resets\n");
>> + goto dis_tdm_clk;
>> + }
>> +
>> + /* select tdm_ext clock as the clock source for tdm */
>> + ret = clk_set_parent(tdm->clks[5].clk, tdm->clks[4].clk);
>
> Maybe not valid for your clocks but, if clocks are not HW implemented for
> this, changing parent at runtime could lead to glitches and thus to
> unexpected behavior. You to check if this could be valid on your hardware.
The TDM works as slave mode, it's bit clock comes from extern source. But defautly the clock of tdm
always derives from internal clock after each reset. As internal clock derives from PLL2 (1188 MHz),
it cannot be used for audio system with frequency division very well,so it must be switched to extern clock.
There 's no problem doing this.
>
>> + if (ret) {
>> + dev_err(tdm->dev, "Can't set clock source for clk_tdm: %d\n", ret);
>> + goto dis_tdm_clk;
>> + }
>> + return 0;
>> +
>> +dis_tdm_clk:
>> + clk_bulk_disable_unprepare(ARRAY_SIZE(tdm->clks), tdm->clks);
>> +
>> + return ret;
>> +}
>> +
>> +static int jh7110_tdm_runtime_suspend(struct device *dev)
>> +{
>> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
>> +
>> + jh7110_tdm_clk_disable(tdm);
>> + return 0;
>> +}
>> +
>> +static int jh7110_tdm_runtime_resume(struct device *dev)
>> +{
>> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
>> +
>> + return jh7110_tdm_clk_enable(tdm);
>> +}
>> +
>> +static int __maybe_unused jh7110_tdm_system_suspend(struct device *dev)
>
> __maybe_unused could be removed if SYSTEM_SLEEP_PM_OPS() is used in the
> definition of jh7110_tdm_pm_ops.
OK, follow your advise.
>
>
>> +{
>> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
>> +
>> + /* save context */
>> + tdm->saved_pcmgbcr = jh7110_tdm_readl(tdm, TDM_PCMGBCR);
>> + tdm->saved_pcmdiv = jh7110_tdm_readl(tdm, TDM_PCMDIV);
>> +
>> + return pm_runtime_force_suspend(dev);
>> +}
>> +
>> +static int __maybe_unused jh7110_tdm_system_resume(struct device *dev)
>
> same
Will be changed.
>
>> +{
>> + struct jh7110_tdm_dev *tdm = dev_get_drvdata(dev);
>> +
>> + /* restore context */
>> + jh7110_tdm_writel(tdm, TDM_PCMGBCR, tdm->saved_pcmgbcr);
>> + jh7110_tdm_writel(tdm, TDM_PCMDIV, tdm->saved_pcmdiv);
>> +
>> + return pm_runtime_force_resume(dev);
>> +}
>> +
>> +static const struct snd_soc_component_driver jh7110_tdm_component = {
>> + .name = "jh7110-tdm",
>> +};
>> +
>> +static int jh7110_tdm_startup(struct snd_pcm_substream *substream,
>> + struct snd_soc_dai *cpu_dai)
>> +{
>> + struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
>> + struct snd_soc_dai_link *dai_link = rtd->dai_link;
>> +
>> + dai_link->stop_dma_first = 1;
>> +
>> + return 0;
>> +}
>> +
>> +static int jh7110_tdm_hw_params(struct snd_pcm_substream *substream,
>> + struct snd_pcm_hw_params *params,
>> + struct snd_soc_dai *dai)
>> +{
>> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
>> + int chan_wl, chan_sl, chan_nr;
>> + unsigned int data_width;
>> + unsigned int dma_bus_width;
>> + struct snd_dmaengine_dai_dma_data *dma_data = NULL;
>> + int ret = 0;
>
> No need for initialization.
Will be changed.
>
>> +
>> + data_width = params_width(params);
>> +
>> + tdm->samplerate = params_rate(params);
>> + tdm->pcmclk = params_channels(params) * tdm->samplerate * data_width;
>> +
>> + switch (params_format(params)) {
>> + case SNDRV_PCM_FORMAT_S16_LE:
>> + chan_wl = TDM_16BIT_WORD_LEN;
>> + chan_sl = TDM_16BIT_SLOT_LEN;
>> + dma_bus_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> + break;
>> +
>> + case SNDRV_PCM_FORMAT_S32_LE:
>> + chan_wl = TDM_32BIT_WORD_LEN;
>> + chan_sl = TDM_32BIT_SLOT_LEN;
>> + dma_bus_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
>> + break;
>> +
>> + default:
>> + dev_err(tdm->dev, "tdm: unsupported PCM fmt");
>> + return -EINVAL;
>> + }
>> +
>> + chan_nr = params_channels(params);
>> + switch (chan_nr) {
>> + case 1:
>> + case 2:
>> + case 4:
>> + case 6:
>> + case 8:
>> + break;
>> + default:
>> + dev_err(tdm->dev, "channel not supported\n");
>> + return -EINVAL;
>> + }
>> +
>> + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
>> + tdm->tx.wl = chan_wl;
>> + tdm->tx.sl = chan_sl;
>> + tdm->tx.sscale = chan_nr;
>> + tdm->play_dma_data.addr_width = dma_bus_width;
>> + dma_data = &tdm->play_dma_data;
>> + } else {
>> + tdm->rx.wl = chan_wl;
>> + tdm->rx.sl = chan_sl;
>> + tdm->rx.sscale = chan_nr;
>> + tdm->capture_dma_data.addr_width = dma_bus_width;
>> + dma_data = &tdm->capture_dma_data;
>> + }
>> +
>> + snd_soc_dai_set_dma_data(dai, substream, dma_data);
>> +
>> + ret = jh7110_tdm_config(tdm, substream);
>> + if (ret)
>> + return ret;
>> +
>> + jh7110_tdm_save_context(tdm, substream);
>> + return 0;
>> +}
>> +
>> +static int jh7110_tdm_trigger(struct snd_pcm_substream *substream,
>> + int cmd, struct snd_soc_dai *dai)
>> +{
>> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
>> + int ret = 0;
>> +
>> + switch (cmd) {
>> + case SNDRV_PCM_TRIGGER_START:
>> + case SNDRV_PCM_TRIGGER_RESUME:
>> + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
>> + jh7110_tdm_start(tdm, substream);
>> + break;
>> +
>> + case SNDRV_PCM_TRIGGER_STOP:
>> + case SNDRV_PCM_TRIGGER_SUSPEND:
>> + case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
>> + jh7110_tdm_stop(tdm, substream);
>> + break;
>> + default:
>> + ret = -EINVAL;
>> + break;
>> + }
>> + return ret;
>> +}
>> +
>> +static int jh7110_tdm_set_dai_fmt(struct snd_soc_dai *cpu_dai,
>> + unsigned int fmt)
>> +{
>> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(cpu_dai);
>> + unsigned int gbcr;
>> + int ret = 0;
>> +
>> + /* set master/slave audio interface */
>> + switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
>> + case SND_SOC_DAIFMT_BP_FP:
>> + /* cpu is master */
>> + tdm->ms_mode = TDM_AS_MASTER;
>> + break;
>> + case SND_SOC_DAIFMT_BC_FC:
>> + /* codec is master */
>> + tdm->ms_mode = TDM_AS_SLAVE;
>> + break;
>> + case SND_SOC_DAIFMT_BC_FP:
>> + case SND_SOC_DAIFMT_BP_FC:
>> + ret = -EINVAL;
>
> Probably you should return here to avoid updating register with invalid values.
This is my negligence, it will be changed.
>
>> + break;
>> + default:
>> + dev_dbg(tdm->dev, "dwc : Invalid clock provider format\n");
>> + ret = -EINVAL;
>
> ditto
same
>
>> + break;
>> + }
>> +
>> + gbcr = (tdm->clkpolity << CLKPOL_BIT) |
>> + (tdm->elm << ELM_BIT) |
>> + (tdm->syncm << SYNCM_BIT) |
>> + (tdm->ms_mode << MS_BIT);
>> + jh7110_tdm_writel(tdm, TDM_PCMGBCR, gbcr);
>> +
>> + return ret;
>> +}
>> +
>> +static const struct snd_soc_dai_ops jh7110_tdm_dai_ops = {
>> + .startup = jh7110_tdm_startup,
>> + .hw_params = jh7110_tdm_hw_params,
>> + .trigger = jh7110_tdm_trigger,
>> + .set_fmt = jh7110_tdm_set_dai_fmt,
>> +};
>> +
>> +static int jh7110_tdm_dai_probe(struct snd_soc_dai *dai)
>> +{
>> + struct jh7110_tdm_dev *tdm = snd_soc_dai_get_drvdata(dai);
>> +
>> + snd_soc_dai_init_dma_data(dai, &tdm->play_dma_data, &tdm->capture_dma_data);
>> + snd_soc_dai_set_drvdata(dai, tdm);
>> + return 0;
>> +}
>> +
>> +#define JH7110_TDM_RATES SNDRV_PCM_RATE_8000_48000
>> +
>> +#define JH7110_TDM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
>> + SNDRV_PCM_FMTBIT_S32_LE)
>> +
>> +static struct snd_soc_dai_driver jh7110_tdm_dai = {
>> + .name = "sf_tdm",
>> + .id = 0,
>> + .playback = {
>> + .stream_name = "Playback",
>> + .channels_min = 1,
>> + .channels_max = 8,
>> + .rates = JH7110_TDM_RATES,
>> + .formats = JH7110_TDM_FORMATS,
>> + },
>> + .capture = {
>> + .stream_name = "Capture",
>> + .channels_min = 1,
>> + .channels_max = 8,
>> + .rates = JH7110_TDM_RATES,
>> + .formats = JH7110_TDM_FORMATS,
>> + },
>> + .ops = &jh7110_tdm_dai_ops,
>> + .probe = jh7110_tdm_dai_probe,
>> + .symmetric_rate = 1,
>> +};
>> +
>> +static const struct snd_pcm_hardware jh7110_pcm_hardware = {
>> + .info = (SNDRV_PCM_INFO_MMAP |
>> + SNDRV_PCM_INFO_MMAP_VALID |
>> + SNDRV_PCM_INFO_PAUSE |
>> + SNDRV_PCM_INFO_RESUME |
>> + SNDRV_PCM_INFO_INTERLEAVED |
>> + SNDRV_PCM_INFO_BLOCK_TRANSFER),
>> + .buffer_bytes_max = 192512,
>> + .period_bytes_min = 4096,
>> + .period_bytes_max = 32768,
>> + .periods_min = 1,
>> + .periods_max = 48,
>> + .fifo_size = 16,
>> +};
>> +
>> +static const struct snd_dmaengine_pcm_config jh7110_dmaengine_pcm_config = {
>> + .pcm_hardware = &jh7110_pcm_hardware,
>> + .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
>> + .prealloc_buffer_size = 192512,
>> +};
>> +
>> +static void jh7110_tdm_init_params(struct jh7110_tdm_dev *tdm)
>> +{
>> + tdm->clkpolity = TDM_TX_RASING_RX_FALLING;
>> + tdm->elm = TDM_ELM_LATE;
>> + tdm->syncm = TDM_SYNCM_SHORT;
>> +
>> + tdm->rx.ifl = TDM_FIFO_HALF;
>> + tdm->tx.ifl = TDM_FIFO_HALF;
>> + tdm->rx.wl = TDM_16BIT_WORD_LEN;
>> + tdm->tx.wl = TDM_16BIT_WORD_LEN;
>> + tdm->rx.sscale = 2;
>> + tdm->tx.sscale = 2;
>> + tdm->rx.lrj = TDM_LEFT_JUSTIFT;
>> + tdm->tx.lrj = TDM_LEFT_JUSTIFT;
>> +
>> + tdm->play_dma_data.addr = JH7110_TDM_FIFO;
>> + tdm->play_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> + tdm->play_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
>> + tdm->play_dma_data.maxburst = 16;
>> +
>> + tdm->capture_dma_data.addr = JH7110_TDM_FIFO;
>> + tdm->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
>> + tdm->capture_dma_data.fifo_size = JH7110_TDM_FIFO_DEPTH / 2;
>> + tdm->capture_dma_data.maxburst = 8;
>> +}
>> +
>> +static int jh7110_tdm_clk_reset_init(struct platform_device *pdev,
>> + struct jh7110_tdm_dev *tdm)
>> +{
>> + int ret;
>> +
>> + tdm->clks[0].id = "mclk_inner";
>> + tdm->clks[1].id = "tdm_ahb";
>> + tdm->clks[2].id = "tdm_apb";
>> + tdm->clks[3].id = "tdm_internal";
>> + tdm->clks[4].id = "tdm_ext";
>> + tdm->clks[5].id = "tdm";
>> +
>> + ret = devm_clk_bulk_get(&pdev->dev, ARRAY_SIZE(tdm->clks), tdm->clks);
>> + if (ret) {
>> + dev_err(&pdev->dev, "Failed to get tdm clocks\n");
>> + return ret;
>> + }
>> +
>> + tdm->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
>> + if (IS_ERR(tdm->resets)) {
>
> of_reset_control_array_get() called by devm_reset_control_array_get()
> called by devm_reset_control_array_get_exclusive() could return
> IS_ERR_OR_NULL() and propagates the NULL also here. Thus you should check
> the return value with IS_ERR_OR_NULL()
It will be changed.
>
>> + ret = PTR_ERR(tdm->resets);
>> + dev_err(&pdev->dev, "Failed to get tdm resets");
>> + return ret;
>> + }
>> +
>> + return jh7110_tdm_clk_enable(tdm);
>
> AFAICT there is no need to enable clocks in probe. Thus you can remove this
> here and rely on runtime PM when CONFIG_PM is enabled (and for !CONFIG_PM
> see below comment in probe).
Good advise, it will be changed in next submit.
>
>> +}
>> +
>> +static int jh7110_tdm_probe(struct platform_device *pdev)
>> +{
>> + struct jh7110_tdm_dev *tdm;
>> + int ret;
>> +
>> + tdm = devm_kzalloc(&pdev->dev, sizeof(*tdm), GFP_KERNEL);
>> + if (!tdm)
>> + return -ENOMEM;
>> +
>> + tdm->tdm_base = devm_platform_ioremap_resource(pdev, 0);
>> + if (IS_ERR(tdm->tdm_base))
>> + return PTR_ERR(tdm->tdm_base);
>> +
>> + tdm->dev = &pdev->dev;
>> +
>> + ret = jh7110_tdm_clk_reset_init(pdev, tdm);
>> + if (ret) {
>> + dev_err(&pdev->dev, "Failed to enable audio-tdm clock\n");
>> + return ret;
>> + }
>> +
>> + jh7110_tdm_init_params(tdm);
>> +
>> + dev_set_drvdata(&pdev->dev, tdm);
>> + ret = devm_snd_soc_register_component(&pdev->dev, &jh7110_tdm_component,
>> + &jh7110_tdm_dai, 1);
>> + if (ret) {
>> + dev_err(&pdev->dev, "Failed to register dai\n");
>> + return ret;
>> + }
>> +
>> + ret = devm_snd_dmaengine_pcm_register(&pdev->dev,
>> + &jh7110_dmaengine_pcm_config,
>> + SND_DMAENGINE_PCM_FLAG_COMPAT);
>> + if (ret) {
>> + dev_err(&pdev->dev, "Could not register pcm: %d\n", ret);
>> + return ret;
>> + }
>> +
>> + pm_runtime_enable(&pdev->dev);
>> +#ifdef CONFIG_PM
>> + jh7110_tdm_clk_disable(tdm);
>> +#endif
>
> Something like this:
> if (!pm_runtime_enabled())
> jh7110_tdm_runtime_resume();
>
>
>> +
>> + return 0;
>> +}
>> +
>> +static int jh7110_tdm_dev_remove(struct platform_device *pdev)
>> +{
>> + pm_runtime_disable(&pdev->dev);
>> + return 0;
>> +}
>> +
>> +static const struct of_device_id jh7110_tdm_of_match[] = {
>> + { .compatible = "starfive,jh7110-tdm", },
>> + {}
>> +};
>> +
>> +MODULE_DEVICE_TABLE(of, jh7110_tdm_of_match);
>> +
>> +static const struct dev_pm_ops jh7110_tdm_pm_ops = {
>> + SET_RUNTIME_PM_OPS(jh7110_tdm_runtime_suspend,
>> + jh7110_tdm_runtime_resume, NULL)
>
> RUNTIME_PM_OPS() otherwise you need __maybe_unsed on functions.
>
>> + SET_SYSTEM_SLEEP_PM_OPS(jh7110_tdm_system_suspend,
>> + jh7110_tdm_system_resume)
>
> SYSTEM_SLEEP_PM_OPS() otherwise you need __maybe_unsed on functions.
The above 2 items will be changed.
>
>
>> +};
>> +
>> +static struct platform_driver jh7110_tdm_driver = {
>> + .driver = {
>> + .name = "jh7110-tdm",
>> + .of_match_table = jh7110_tdm_of_match,
>> + .pm = &jh7110_tdm_pm_ops,
>
> pm_ptr(&jh7110_tdm_pm_ops)
>
>> + },
>> + .probe = jh7110_tdm_probe,
>> + .remove = jh7110_tdm_dev_remove,
>> +};
>> +module_platform_driver(jh7110_tdm_driver);
>> +
>> +MODULE_DESCRIPTION("StarFive JH7110 TDM ASoC Driver");
>> +MODULE_AUTHOR("Walker Chen <walker.chen@starfivetech.com>");
>> +MODULE_LICENSE("GPL");
>> diff --git a/sound/soc/starfive/jh7110_tdm.h b/sound/soc/starfive/jh7110_tdm.h
>> new file mode 100644
>> index 000000000000..0b7e6d6543c5
>> --- /dev/null
>> +++ b/sound/soc/starfive/jh7110_tdm.h
>
> Is the header needed? Can't be all in one place? The header is anyway used
> only in one driver.
Will be fixed.
In a word, you gave a lot of very helpful advice. Thank you so much!
Best regards,
Walker
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2023-05-24 8:20 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-05-11 9:15 [PATCH v4 0/3] Add TDM audio on StarFive JH7110 Walker Chen
2023-05-11 9:15 ` [PATCH v4 1/3] ASoC: dt-bindings: Add TDM controller bindings for " Walker Chen
2023-05-11 9:15 ` [PATCH v4 2/3] ASoC: starfive: Add JH7110 TDM driver Walker Chen
2023-05-15 8:29 ` Walker Chen
2023-05-15 10:51 ` Mark Brown
2023-05-15 12:47 ` Walker Chen
2023-05-17 8:35 ` Claudiu.Beznea
2023-05-24 8:20 ` Walker Chen
2023-05-11 9:15 ` [PATCH v4 3/3] riscv: dts: starfive: add the node and pins configuration for tdm Walker Chen
2023-05-15 8:44 ` Walker Chen
2023-05-15 8:58 ` Conor Dooley
2023-05-15 11:20 ` Mark Brown
2023-05-15 12:36 ` Walker Chen
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