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From: Marc Zyngier <maz@misterjones.org>
To: Joonyoung Shim <jy0922.shim@samsung.com>
Cc: <dan.j.williams@intel.com>, <linus.ml.walleij@gmail.com>,
	<kyungmin.park@samsung.com>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2] PL330: Add PL330 DMA controller driver
Date: Thu, 25 Mar 2010 10:32:37 +0100	[thread overview]
Message-ID: <960f4547118a62d5863ee38ba760844c@localhost> (raw)
In-Reply-To: <4BAB264C.2090502@samsung.com>


On Thu, 25 Mar 2010 18:01:00 +0900, Joonyoung Shim
<jy0922.shim@samsung.com> wrote:
> On 3/25/2010 2:44 PM, Marc Zyngier wrote:
>> On Thu, 25 Mar 2010 12:17:15 +0900
>> Joonyoung Shim <jy0922.shim@samsung.com> wrote:
>> 
>>> +	writew(imm, desc_pool_virt);
>> 
> 
> Right. The write[bwl] is api for address ioremapped of io device. I will
> change these.
> 
>> Does anything ensure that this won't generate an unaligned access?
>> 
> 
> PL330 DMA controller fetches variable length instructions that consist
of
> one to six bytes, so i think unaligned access is no problem.

I'm not too concerned about the device side of things. I'm more worried
about the CPU access when writing the 'imm' value to memory.

Consider desc_pool_virt 16bit aligned when entering the function. Writing
the opcode makes it unaligned and then writing the 'imm' value will result
as an unaligned access.

        M.
-- 
Who you jivin' with that Cosmik Debris?

  reply	other threads:[~2010-03-25  9:32 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-03-25  3:17 [PATCH v2] PL330: Add PL330 DMA controller driver Joonyoung Shim
2010-03-25  5:34 ` jassi brar
2010-03-25  8:30   ` Linus Walleij
2010-03-25 12:17     ` jassi brar
2010-03-25 15:13       ` Dan Williams
2010-03-25 22:27         ` jassi brar
2010-03-25 23:12           ` Dan Williams
2010-03-25 23:59             ` jassi brar
2010-03-26  0:29               ` Kyungmin Park
2010-03-26  0:48                 ` jassi brar
2010-03-26  0:54           ` Joonyoung Shim
2010-03-26  1:01             ` jassi brar
2010-03-25 15:20       ` Linus Walleij
2010-03-25 22:36         ` jassi brar
2010-04-01  5:34         ` jassi brar
2010-04-01 23:23           ` Linus Walleij
2010-04-02  1:38             ` jassi brar
2010-04-17  7:06               ` Kyungmin Park
2010-04-19  1:14                 ` jassi brar
2010-03-25  5:44 ` Marc Zyngier
2010-03-25  9:01   ` Joonyoung Shim
2010-03-25  9:32     ` Marc Zyngier [this message]
2010-03-25 10:05       ` Joonyoung Shim
2010-03-25 10:32         ` Marc Zyngier
2010-03-25 11:48           ` Joonyoung Shim
2010-03-25  8:26 ` Linus Walleij
2010-03-26  2:08 ` jassi brar
2010-03-31  1:07   ` Ben Dooks
2010-03-31  1:40     ` jassi brar

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