From: Wesley Cheng <wcheng@codeaurora.org>
To: Stephen Boyd <sboyd@kernel.org>,
agross@kernel.org, bjorn.andersson@linaro.org,
mark.rutland@arm.com, mturquette@baylibre.com,
robh+dt@kernel.org
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/3] clk: qcom: gcc: Add USB3 PIPE clock operations
Date: Mon, 16 Mar 2020 12:58:07 -0700 [thread overview]
Message-ID: <9707b6f5-89d4-9800-bee2-825877b535ac@codeaurora.org> (raw)
In-Reply-To: <158437819409.88485.6326749791923076608@swboyd.mtv.corp.google.com>
Hi Stephen,
Thanks for the feedback.
On 3/16/2020 10:03 AM, Stephen Boyd wrote:
> Quoting Wesley Cheng (2020-03-14 00:51:58)
>> Add the USB3 PIPE clock structures, so that the USB driver can
>> vote for the GCC to enable/disable it when required. This clock
>> is needed for SSUSB operation.
>>
>> Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
>> ---
>> drivers/clk/qcom/gcc-sm8150.c | 26 ++++++++++++++++++++++++++
>
> Can you please combine these two patches and add sm8150 in the subject?
>
Sure, I'll combine the two patches into one and include the SM8150 tag
in the subject on the next patch series.
>> 1 file changed, 26 insertions(+)
>>
>> diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c
>> index d0cd03d..ef98fdc 100644
>> --- a/drivers/clk/qcom/gcc-sm8150.c
>> +++ b/drivers/clk/qcom/gcc-sm8150.c
>> @@ -3172,6 +3172,18 @@ enum {
>> },
>> };
>>
>> +static struct clk_branch gcc_usb3_prim_phy_pipe_clk = {
>> + .halt_check = BRANCH_HALT_SKIP,
>> + .clkr = {
>> + .enable_reg = 0xf058,
>> + .enable_mask = BIT(0),
>> + .hw.init = &(struct clk_init_data){
>> + .name = "gcc_usb3_prim_phy_pipe_clk",
>> + .ops = &clk_branch2_ops,
>> + },
>> + },
>> +};
>> +
>> static struct clk_branch gcc_usb3_sec_clkref_clk = {
>> .halt_reg = 0x8c028,
>> .halt_check = BRANCH_HALT,
>> @@ -3219,6 +3231,18 @@ enum {
>> },
>> };
>>
>> +static struct clk_branch gcc_usb3_sec_phy_pipe_clk = {
>> + .halt_check = BRANCH_HALT_SKIP,
>
> Sad to see that we'll never resolve this.
>
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2020-03-16 19:58 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1584172319-24843-1-git-send-email-wcheng@codeaurora.org>
[not found] ` <1584172319-24843-3-git-send-email-wcheng@codeaurora.org>
2020-03-16 17:03 ` [PATCH 2/3] clk: qcom: gcc: Add USB3 PIPE clock operations Stephen Boyd
2020-03-16 19:58 ` Wesley Cheng [this message]
[not found] ` <1584172319-24843-4-git-send-email-wcheng@codeaurora.org>
2020-03-16 22:24 ` [PATCH 3/3] arm64: dts: qcom: sm8150: Add USB and PHY device nodes Bjorn Andersson
2020-03-16 23:59 ` Wesley Cheng
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