* [PATCH v2 1/4] powerpc: Remove flush_instruction_cache for book3s/32
@ 2020-08-14 5:56 Christophe Leroy
2020-08-14 5:56 ` [PATCH v2 2/4] powerpc: Move flush_instruction_cache() prototype in asm/cacheflush.h Christophe Leroy
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Christophe Leroy @ 2020-08-14 5:56 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, hch
Cc: linux-kernel, linuxppc-dev
The only callers of flush_instruction_cache() are:
arch/powerpc/kernel/swsusp_booke.S: bl flush_instruction_cache
arch/powerpc/mm/nohash/40x.c: flush_instruction_cache();
arch/powerpc/mm/nohash/44x.c: flush_instruction_cache();
arch/powerpc/mm/nohash/fsl_booke.c: flush_instruction_cache();
arch/powerpc/platforms/44x/machine_check.c: flush_instruction_cache();
arch/powerpc/platforms/44x/machine_check.c: flush_instruction_cache();
This function is not used by book3s/32, drop it.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/kernel/misc_32.S | 12 ++----------
1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index b24f866fef81..5c074c2ff5b5 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -271,9 +271,8 @@ _ASM_NOKPROBE_SYMBOL(real_writeb)
/*
* Flush instruction cache.
- * This is a no-op on the 601.
*/
-#ifndef CONFIG_PPC_8xx
+#if !defined(CONFIG_PPC_8xx) && !defined(CONFIG_PPC_BOOK3S_32)
_GLOBAL(flush_instruction_cache)
#if defined(CONFIG_4xx)
lis r3, KERNELBASE@h
@@ -290,18 +289,11 @@ _GLOBAL(flush_instruction_cache)
mfspr r3,SPRN_L1CSR1
ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
mtspr SPRN_L1CSR1,r3
-#elif defined(CONFIG_PPC_BOOK3S_601)
- blr /* for 601, do nothing */
-#else
- /* 603/604 processor - use invalidate-all bit in HID0 */
- mfspr r3,SPRN_HID0
- ori r3,r3,HID0_ICFI
- mtspr SPRN_HID0,r3
#endif /* CONFIG_4xx */
isync
blr
EXPORT_SYMBOL(flush_instruction_cache)
-#endif /* CONFIG_PPC_8xx */
+#endif
/*
* Copy a whole page. We use the dcbz instruction on the destination
--
2.25.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v2 2/4] powerpc: Move flush_instruction_cache() prototype in asm/cacheflush.h
2020-08-14 5:56 [PATCH v2 1/4] powerpc: Remove flush_instruction_cache for book3s/32 Christophe Leroy
@ 2020-08-14 5:56 ` Christophe Leroy
2020-08-14 5:56 ` [PATCH v2 3/4] powerpc: Rewrite 4xx flush_cache_instruction() in C Christophe Leroy
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Christophe Leroy @ 2020-08-14 5:56 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, hch
Cc: linux-kernel, linuxppc-dev
flush_instruction_cache() belongs to the cache flushing function
family.
Move its prototype in asm/cacheflush.h
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
v2: new
---
arch/powerpc/include/asm/cacheflush.h | 2 ++
arch/powerpc/include/asm/processor.h | 1 -
arch/powerpc/platforms/44x/machine_check.c | 1 +
3 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h
index 54764c6e922d..481877879fec 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -98,6 +98,8 @@ static inline void invalidate_dcache_range(unsigned long start,
mb(); /* sync */
}
+void flush_instruction_cache(void);
+
#include <asm-generic/cacheflush.h>
#endif /* _ASM_POWERPC_CACHEFLUSH_H */
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index ed0d633ab5aa..d828813e35de 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -435,7 +435,6 @@ extern void power7_idle_type(unsigned long type);
extern void power9_idle_type(unsigned long stop_psscr_val,
unsigned long stop_psscr_mask);
-extern void flush_instruction_cache(void);
extern void hard_reset_now(void);
extern void poweroff_now(void);
extern int fix_alignment(struct pt_regs *);
diff --git a/arch/powerpc/platforms/44x/machine_check.c b/arch/powerpc/platforms/44x/machine_check.c
index 90ad6ac529d2..a5c898bb9bab 100644
--- a/arch/powerpc/platforms/44x/machine_check.c
+++ b/arch/powerpc/platforms/44x/machine_check.c
@@ -7,6 +7,7 @@
#include <linux/ptrace.h>
#include <asm/reg.h>
+#include <asm/cacheflush.h>
int machine_check_440A(struct pt_regs *regs)
{
--
2.25.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v2 3/4] powerpc: Rewrite 4xx flush_cache_instruction() in C
2020-08-14 5:56 [PATCH v2 1/4] powerpc: Remove flush_instruction_cache for book3s/32 Christophe Leroy
2020-08-14 5:56 ` [PATCH v2 2/4] powerpc: Move flush_instruction_cache() prototype in asm/cacheflush.h Christophe Leroy
@ 2020-08-14 5:56 ` Christophe Leroy
2020-08-14 5:56 ` [PATCH v2 4/4] powerpc: Rewrite FSL_BOOKE " Christophe Leroy
2020-09-09 13:27 ` [PATCH v2 1/4] powerpc: Remove flush_instruction_cache for book3s/32 Michael Ellerman
3 siblings, 0 replies; 5+ messages in thread
From: Christophe Leroy @ 2020-08-14 5:56 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, hch
Cc: linux-kernel, linuxppc-dev
Nothing prevents flush_cache_instruction() from being writen in C.
Do it to improve readability and maintainability.
This function is very small and isn't called from assembly,
make it static inline in asm/cacheflush.h
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
v2: Written as a static inline instead of adding a new C file for this function alone.
---
arch/powerpc/include/asm/cacheflush.h | 8 ++++++++
arch/powerpc/kernel/misc_32.S | 7 +------
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h
index 481877879fec..138e46d8c04e 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -98,7 +98,15 @@ static inline void invalidate_dcache_range(unsigned long start,
mb(); /* sync */
}
+#ifdef CONFIG_4xx
+static inline void flush_instruction_cache(void)
+{
+ iccci((void *)KERNELBASE);
+ isync();
+}
+#else
void flush_instruction_cache(void);
+#endif
#include <asm-generic/cacheflush.h>
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 5c074c2ff5b5..1bda207459a8 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -272,12 +272,8 @@ _ASM_NOKPROBE_SYMBOL(real_writeb)
/*
* Flush instruction cache.
*/
-#if !defined(CONFIG_PPC_8xx) && !defined(CONFIG_PPC_BOOK3S_32)
+#ifdef CONFIG_FSL_BOOKE
_GLOBAL(flush_instruction_cache)
-#if defined(CONFIG_4xx)
- lis r3, KERNELBASE@h
- iccci 0,r3
-#elif defined(CONFIG_FSL_BOOKE)
#ifdef CONFIG_E200
mfspr r3,SPRN_L1CSR0
ori r3,r3,L1CSR0_CFI|L1CSR0_CLFC
@@ -289,7 +285,6 @@ _GLOBAL(flush_instruction_cache)
mfspr r3,SPRN_L1CSR1
ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
mtspr SPRN_L1CSR1,r3
-#endif /* CONFIG_4xx */
isync
blr
EXPORT_SYMBOL(flush_instruction_cache)
--
2.25.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v2 4/4] powerpc: Rewrite FSL_BOOKE flush_cache_instruction() in C
2020-08-14 5:56 [PATCH v2 1/4] powerpc: Remove flush_instruction_cache for book3s/32 Christophe Leroy
2020-08-14 5:56 ` [PATCH v2 2/4] powerpc: Move flush_instruction_cache() prototype in asm/cacheflush.h Christophe Leroy
2020-08-14 5:56 ` [PATCH v2 3/4] powerpc: Rewrite 4xx flush_cache_instruction() in C Christophe Leroy
@ 2020-08-14 5:56 ` Christophe Leroy
2020-09-09 13:27 ` [PATCH v2 1/4] powerpc: Remove flush_instruction_cache for book3s/32 Michael Ellerman
3 siblings, 0 replies; 5+ messages in thread
From: Christophe Leroy @ 2020-08-14 5:56 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman, hch
Cc: linux-kernel, linuxppc-dev
Nothing prevents flush_cache_instruction() from being writen in C.
Do it to improve readability and maintainability.
This function is only use by low level callers, it is not
intended to be used by module. Don't export it.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
arch/powerpc/kernel/misc_32.S | 22 ----------------------
arch/powerpc/mm/nohash/fsl_booke.c | 16 ++++++++++++++++
2 files changed, 16 insertions(+), 22 deletions(-)
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 1bda207459a8..87717966f5cd 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -268,28 +268,6 @@ _ASM_NOKPROBE_SYMBOL(real_writeb)
#endif /* CONFIG_40x */
-
-/*
- * Flush instruction cache.
- */
-#ifdef CONFIG_FSL_BOOKE
-_GLOBAL(flush_instruction_cache)
-#ifdef CONFIG_E200
- mfspr r3,SPRN_L1CSR0
- ori r3,r3,L1CSR0_CFI|L1CSR0_CLFC
- /* msync; isync recommended here */
- mtspr SPRN_L1CSR0,r3
- isync
- blr
-#endif
- mfspr r3,SPRN_L1CSR1
- ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
- mtspr SPRN_L1CSR1,r3
- isync
- blr
-EXPORT_SYMBOL(flush_instruction_cache)
-#endif
-
/*
* Copy a whole page. We use the dcbz instruction on the destination
* to reduce memory traffic (it eliminates the unnecessary reads of
diff --git a/arch/powerpc/mm/nohash/fsl_booke.c b/arch/powerpc/mm/nohash/fsl_booke.c
index 0c294827d6e5..36bda962d3b3 100644
--- a/arch/powerpc/mm/nohash/fsl_booke.c
+++ b/arch/powerpc/mm/nohash/fsl_booke.c
@@ -219,6 +219,22 @@ unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)
return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
}
+void flush_instruction_cache(void)
+{
+ unsigned long tmp;
+
+ if (IS_ENABLED(CONFIG_E200)) {
+ tmp = mfspr(SPRN_L1CSR0);
+ tmp |= L1CSR0_CFI | L1CSR0_CLFC;
+ mtspr(SPRN_L1CSR0, tmp);
+ } else {
+ tmp = mfspr(SPRN_L1CSR1);
+ tmp |= L1CSR1_ICFI | L1CSR1_ICLFR;
+ mtspr(SPRN_L1CSR1, tmp);
+ }
+ isync();
+}
+
/*
* MMU_init_hw does the chip-specific initialization of the MMU hardware.
*/
--
2.25.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2 1/4] powerpc: Remove flush_instruction_cache for book3s/32
2020-08-14 5:56 [PATCH v2 1/4] powerpc: Remove flush_instruction_cache for book3s/32 Christophe Leroy
` (2 preceding siblings ...)
2020-08-14 5:56 ` [PATCH v2 4/4] powerpc: Rewrite FSL_BOOKE " Christophe Leroy
@ 2020-09-09 13:27 ` Michael Ellerman
3 siblings, 0 replies; 5+ messages in thread
From: Michael Ellerman @ 2020-09-09 13:27 UTC (permalink / raw)
To: hch, Michael Ellerman, Christophe Leroy, Paul Mackerras,
Benjamin Herrenschmidt
Cc: linuxppc-dev, linux-kernel
On Fri, 14 Aug 2020 05:56:24 +0000 (UTC), Christophe Leroy wrote:
> The only callers of flush_instruction_cache() are:
>
> arch/powerpc/kernel/swsusp_booke.S: bl flush_instruction_cache
> arch/powerpc/mm/nohash/40x.c: flush_instruction_cache();
> arch/powerpc/mm/nohash/44x.c: flush_instruction_cache();
> arch/powerpc/mm/nohash/fsl_booke.c: flush_instruction_cache();
> arch/powerpc/platforms/44x/machine_check.c: flush_instruction_cache();
> arch/powerpc/platforms/44x/machine_check.c: flush_instruction_cache();
>
> [...]
Applied to powerpc/next.
[1/4] powerpc: Remove flush_instruction_cache for book3s/32
https://git.kernel.org/powerpc/c/e426ab39f41045a4c163031272b2f48d944b69c0
[2/4] powerpc: Move flush_instruction_cache() prototype in asm/cacheflush.h
https://git.kernel.org/powerpc/c/f663f3312051402d32952c44d156a20c0b854753
[3/4] powerpc: Rewrite 4xx flush_cache_instruction() in C
https://git.kernel.org/powerpc/c/de39b19452e784de5f90ae899851ab29a29bb42c
[4/4] powerpc: Rewrite FSL_BOOKE flush_cache_instruction() in C
https://git.kernel.org/powerpc/c/704dfe931df951895dea98bd1d9cacbb601b6451
cheers
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-09-09 16:31 UTC | newest]
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2020-08-14 5:56 [PATCH v2 1/4] powerpc: Remove flush_instruction_cache for book3s/32 Christophe Leroy
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2020-08-14 5:56 ` [PATCH v2 3/4] powerpc: Rewrite 4xx flush_cache_instruction() in C Christophe Leroy
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