* [PATCH] arm64: dts: qcom: qcm2290: Add CPU idle states
@ 2023-06-06 16:15 Konrad Dybcio
2023-06-06 20:26 ` Stephan Gerhold
0 siblings, 1 reply; 3+ messages in thread
From: Konrad Dybcio @ 2023-06-06 16:15 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Marijn Suijten, linux-arm-msm, devicetree, linux-kernel, Konrad Dybcio
Add the (scarce) idle states for the individual CPUs, as well as the
whole cluster. This enables deeper-than-WFI cpuidle
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/qcm2290.dtsi | 61 +++++++++++++++++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
index b29bc4e4b837..a8a1ce58c0b7 100644
--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
@@ -48,6 +48,8 @@ CPU0: cpu@0 {
enable-method = "psci";
next-level-cache = <&L2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
+ power-domains = <&CPU_PD0>;
+ power-domain-names = "psci";
L2_0: l2-cache {
compatible = "cache";
cache-level = <2>;
@@ -65,6 +67,8 @@ CPU1: cpu@1 {
enable-method = "psci";
next-level-cache = <&L2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
+ power-domains = <&CPU_PD1>;
+ power-domain-names = "psci";
};
CPU2: cpu@2 {
@@ -77,6 +81,8 @@ CPU2: cpu@2 {
enable-method = "psci";
next-level-cache = <&L2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
+ power-domains = <&CPU_PD2>;
+ power-domain-names = "psci";
};
CPU3: cpu@3 {
@@ -89,6 +95,8 @@ CPU3: cpu@3 {
enable-method = "psci";
next-level-cache = <&L2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
+ power-domains = <&CPU_PD3>;
+ power-domain-names = "psci";
};
cpu-map {
@@ -110,6 +118,30 @@ core3 {
};
};
};
+
+ domain-idle-states {
+ CLUSTER_SLEEP: cluster-sleep-0 {
+ compatible = "domain-idle-state";
+ arm,psci-suspend-param = <0x40000044>;
+ entry-latency-us = <800>;
+ exit-latency-us = <2118>;
+ min-residency-us = <7376>;
+ };
+ };
+
+ idle-states {
+ entry-method = "psci";
+
+ CPU_SLEEP: cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ idle-state-name = "power-collapse";
+ arm,psci-suspend-param = <0x40000003>;
+ entry-latency-us = <290>;
+ exit-latency-us = <376>;
+ min-residency-us = <1182>;
+ local-timer-stop;
+ };
+ };
};
firmware {
@@ -135,6 +167,35 @@ pmu {
psci {
compatible = "arm,psci-1.0";
method = "smc";
+
+ CPU_PD0: power-domain-cpu0 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&CPU_SLEEP>;
+ };
+
+ CPU_PD1: power-domain-cpu1 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&CPU_SLEEP>;
+ };
+
+ CPU_PD2: power-domain-cpu2 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&CPU_SLEEP>;
+ };
+
+ CPU_PD3: power-domain-cpu3 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&CPU_SLEEP>;
+ };
+
+ CLUSTER_PD: power-domain-cpu-cluster {
+ #power-domain-cells = <0>;
+ domain-idle-states = <&CLUSTER_SLEEP>;
+ };
};
reserved_memory: reserved-memory {
---
base-commit: 6db29e14f4fb7bce9eb5290288e71b05c2b0d118
change-id: 20230606-topic-qcm2290_idlestates-5b6062b0f4c6
Best regards,
--
Konrad Dybcio <konrad.dybcio@linaro.org>
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: qcom: qcm2290: Add CPU idle states
2023-06-06 16:15 [PATCH] arm64: dts: qcom: qcm2290: Add CPU idle states Konrad Dybcio
@ 2023-06-06 20:26 ` Stephan Gerhold
2023-06-06 21:23 ` Konrad Dybcio
0 siblings, 1 reply; 3+ messages in thread
From: Stephan Gerhold @ 2023-06-06 20:26 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Marijn Suijten, linux-arm-msm, devicetree,
linux-kernel
On Tue, Jun 06, 2023 at 06:15:28PM +0200, Konrad Dybcio wrote:
> Add the (scarce) idle states for the individual CPUs, as well as the
> whole cluster. This enables deeper-than-WFI cpuidle
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/qcm2290.dtsi | 61 +++++++++++++++++++++++++++++++++++
> 1 file changed, 61 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> index b29bc4e4b837..a8a1ce58c0b7 100644
> --- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> @@ -48,6 +48,8 @@ CPU0: cpu@0 {
> enable-method = "psci";
> next-level-cache = <&L2_0>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> + power-domains = <&CPU_PD0>;
> + power-domain-names = "psci";
> L2_0: l2-cache {
> compatible = "cache";
> cache-level = <2>;
> @@ -65,6 +67,8 @@ CPU1: cpu@1 {
> enable-method = "psci";
> next-level-cache = <&L2_0>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> + power-domains = <&CPU_PD1>;
> + power-domain-names = "psci";
> };
>
> CPU2: cpu@2 {
> @@ -77,6 +81,8 @@ CPU2: cpu@2 {
> enable-method = "psci";
> next-level-cache = <&L2_0>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> + power-domains = <&CPU_PD2>;
> + power-domain-names = "psci";
> };
>
> CPU3: cpu@3 {
> @@ -89,6 +95,8 @@ CPU3: cpu@3 {
> enable-method = "psci";
> next-level-cache = <&L2_0>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> + power-domains = <&CPU_PD3>;
> + power-domain-names = "psci";
> };
>
> cpu-map {
> @@ -110,6 +118,30 @@ core3 {
> };
> };
> };
> +
> + domain-idle-states {
> + CLUSTER_SLEEP: cluster-sleep-0 {
> + compatible = "domain-idle-state";
> + arm,psci-suspend-param = <0x40000044>;
Are you sure this is correct? Based on lpm-levels/scuba-pm downstream
I would expect:
- That the CPU mode part (last digit) is equal to the deepest per-CPU
state (0x3) and only the cluster mode part (digit before) changes
- That you pass the "last in power level" needed for OSI in << 24
Some of the numbers in sm6115.dtsi also look suspicious if you want to
recheck those...
Thanks,
Stephan
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: qcom: qcm2290: Add CPU idle states
2023-06-06 20:26 ` Stephan Gerhold
@ 2023-06-06 21:23 ` Konrad Dybcio
0 siblings, 0 replies; 3+ messages in thread
From: Konrad Dybcio @ 2023-06-06 21:23 UTC (permalink / raw)
To: Stephan Gerhold
Cc: Andy Gross, Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Marijn Suijten, linux-arm-msm, devicetree,
linux-kernel
On 6.06.2023 22:26, Stephan Gerhold wrote:
> On Tue, Jun 06, 2023 at 06:15:28PM +0200, Konrad Dybcio wrote:
>> Add the (scarce) idle states for the individual CPUs, as well as the
>> whole cluster. This enables deeper-than-WFI cpuidle
>>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>> ---
>> arch/arm64/boot/dts/qcom/qcm2290.dtsi | 61 +++++++++++++++++++++++++++++++++++
>> 1 file changed, 61 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
>> index b29bc4e4b837..a8a1ce58c0b7 100644
>> --- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
>> @@ -48,6 +48,8 @@ CPU0: cpu@0 {
>> enable-method = "psci";
>> next-level-cache = <&L2_0>;
>> qcom,freq-domain = <&cpufreq_hw 0>;
>> + power-domains = <&CPU_PD0>;
>> + power-domain-names = "psci";
>> L2_0: l2-cache {
>> compatible = "cache";
>> cache-level = <2>;
>> @@ -65,6 +67,8 @@ CPU1: cpu@1 {
>> enable-method = "psci";
>> next-level-cache = <&L2_0>;
>> qcom,freq-domain = <&cpufreq_hw 0>;
>> + power-domains = <&CPU_PD1>;
>> + power-domain-names = "psci";
>> };
>>
>> CPU2: cpu@2 {
>> @@ -77,6 +81,8 @@ CPU2: cpu@2 {
>> enable-method = "psci";
>> next-level-cache = <&L2_0>;
>> qcom,freq-domain = <&cpufreq_hw 0>;
>> + power-domains = <&CPU_PD2>;
>> + power-domain-names = "psci";
>> };
>>
>> CPU3: cpu@3 {
>> @@ -89,6 +95,8 @@ CPU3: cpu@3 {
>> enable-method = "psci";
>> next-level-cache = <&L2_0>;
>> qcom,freq-domain = <&cpufreq_hw 0>;
>> + power-domains = <&CPU_PD3>;
>> + power-domain-names = "psci";
>> };
>>
>> cpu-map {
>> @@ -110,6 +118,30 @@ core3 {
>> };
>> };
>> };
>> +
>> + domain-idle-states {
>> + CLUSTER_SLEEP: cluster-sleep-0 {
>> + compatible = "domain-idle-state";
>> + arm,psci-suspend-param = <0x40000044>;
>
> Are you sure this is correct? Based on lpm-levels/scuba-pm downstream
> I would expect:
>
> - That the CPU mode part (last digit) is equal to the deepest per-CPU
> state (0x3) and only the cluster mode part (digit before) changes
> - That you pass the "last in power level" needed for OSI in << 24
0x3 I agree (though by luck it turns out that 0x4 is also implemented!)
BIT(24) - right, the firmware could fail to power off the shared cluster
resources (like Ln$) with that missing.. Thanks for catching this!
Konrad
>
> Some of the numbers in sm6115.dtsi also look suspicious if you want to
> recheck those...
>
> Thanks,
> Stephan
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2023-06-06 21:23 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-06-06 16:15 [PATCH] arm64: dts: qcom: qcm2290: Add CPU idle states Konrad Dybcio
2023-06-06 20:26 ` Stephan Gerhold
2023-06-06 21:23 ` Konrad Dybcio
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).