From: Philipp Zabel <p.zabel@pengutronix.de>
To: Emil Renner Berthing <kernel@esmil.dk>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-serial@vger.kernel.org
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Rob Herring <robh+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Marc Zyngier <maz@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Jiri Slaby <jirislaby@kernel.org>,
Maximilian Luz <luzmaximilian@gmail.com>,
Sagar Kadam <sagar.kadam@sifive.com>,
Drew Fustini <drew@beagleboard.org>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Anup Patel <anup.patel@wdc.com>,
Atish Patra <atish.patra@wdc.com>,
Matteo Croce <mcroce@microsoft.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver
Date: Tue, 12 Oct 2021 16:31:26 +0200 [thread overview]
Message-ID: <99ddc44924bcb89110a74d3182b1d3eea623dce1.camel@pengutronix.de> (raw)
In-Reply-To: <20211012134027.684712-10-kernel@esmil.dk>
On Tue, 2021-10-12 at 15:40 +0200, Emil Renner Berthing wrote:
> Add a driver for the StarFive JH7100 reset controller.
>
> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> ---
> MAINTAINERS | 7 ++
> drivers/reset/Kconfig | 8 ++
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-starfive-jh7100.c | 164 ++++++++++++++++++++++++++
> 4 files changed, 180 insertions(+)
> create mode 100644 drivers/reset/reset-starfive-jh7100.c
>
[...]
> diff --git a/drivers/reset/reset-starfive-jh7100.c b/drivers/reset/reset-starfive-jh7100.c
> new file mode 100644
> index 000000000000..26bc5b59c1f3
> --- /dev/null
> +++ b/drivers/reset/reset-starfive-jh7100.c
> @@ -0,0 +1,164 @@
[...]
> +static int jh7100_reset_update(struct reset_controller_dev *rcdev,
> + unsigned long id, bool assert)
> +{
> + struct jh7100_reset *data = jh7100_reset_from(rcdev);
> + unsigned long offset = id / 32;
> + void __iomem *reg_assert = data->base + JH7100_RESET_ASSERT0 + 4 * offset;
> + void __iomem *reg_status = data->base + JH7100_RESET_STATUS0 + 4 * offset;
> + u32 mask = BIT(id % 32);
> + u32 done = jh7100_reset_asserted[offset] & mask;
> + unsigned long flags;
> + u32 value;
> +
> + if (!assert)
> + done ^= mask;
> +
> + spin_lock_irqsave(&data->lock, flags);
> +
> + value = readl(reg_assert);
> + if (assert)
> + value |= mask;
> + else
> + value &= ~mask;
> + writel(value, reg_assert);
> +
> + do {
> + value = readl(reg_status) & mask;
> + } while (value != done);
Looking at the barebox driver, this could loop indefinitely if the
caller forgets to enable the corresponding peripheral clock. Maybe
use readl_poll_timeout() as a safety net.
regards
Philipp
next prev parent reply other threads:[~2021-10-12 14:31 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-12 13:40 [PATCH v1 00/16] Basic StarFive JH7100 RISC-V SoC support Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 01/16] RISC-V: Add StarFive SoC Kconfig option Emil Renner Berthing
2021-10-12 18:20 ` Andy Shevchenko
2021-10-12 13:40 ` [PATCH v1 02/16] dt-bindings: timer: Add StarFive JH7100 clint Emil Renner Berthing
2021-10-13 7:05 ` Geert Uytterhoeven
2021-10-19 22:48 ` Rob Herring
2021-10-12 13:40 ` [PATCH v1 03/16] dt-bindings: interrupt-controller: Add StarFive JH7100 plic Emil Renner Berthing
2021-10-13 7:05 ` Geert Uytterhoeven
2021-10-12 13:40 ` [PATCH v1 04/16] dt-bindings: clock: starfive: Add JH7100 clock definitions Emil Renner Berthing
2021-10-13 18:39 ` Stephen Boyd
2021-10-12 13:40 ` [PATCH v1 05/16] dt-bindings: clock: starfive: Add JH7100 bindings Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 06/16] clk: starfive: Add JH7100 clock generator driver Emil Renner Berthing
2021-10-12 18:40 ` Andy Shevchenko
2021-10-12 20:07 ` Emil Renner Berthing
2021-10-12 21:20 ` Andy Shevchenko
2021-10-12 21:26 ` Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 07/16] dt-bindings: reset: Add StarFive JH7100 reset definitions Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 08/16] dt-bindings: reset: Add Starfive JH7100 reset bindings Emil Renner Berthing
2021-10-12 14:08 ` Philipp Zabel
2021-10-12 13:40 ` [PATCH v1 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver Emil Renner Berthing
2021-10-12 14:06 ` Philipp Zabel
2021-10-12 14:08 ` Emil Renner Berthing
2021-10-12 14:31 ` Philipp Zabel [this message]
2021-10-12 15:04 ` Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 10/16] dt-bindings: pinctrl: Add StarFive pinctrl definitions Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 11/16] dt-bindings: pinctrl: Add StarFive JH7100 bindings Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 12/16] pinctrl: starfive: Add pinctrl driver for StarFive SoCs Emil Renner Berthing
2021-10-12 20:02 ` Andy Shevchenko
2021-10-13 16:38 ` Emil Renner Berthing
2021-10-13 19:55 ` Andy Shevchenko
2021-10-13 17:37 ` Emil Renner Berthing
2021-10-13 17:50 ` Geert Uytterhoeven
2021-10-18 15:35 ` Emil Renner Berthing
2021-10-18 15:47 ` Andy Shevchenko
2021-10-18 15:56 ` Emil Renner Berthing
2021-10-18 16:23 ` Andy Shevchenko
2021-10-18 16:28 ` Andy Shevchenko
2021-10-18 17:02 ` Emil Renner Berthing
2021-10-19 9:52 ` Andy Shevchenko
2021-10-18 16:35 ` Emil Renner Berthing
2021-10-18 18:37 ` Andy Shevchenko
2021-10-12 13:40 ` [PATCH v1 13/16] dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts Emil Renner Berthing
2021-10-13 7:09 ` Geert Uytterhoeven
2021-10-12 13:40 ` [PATCH v1 14/16] serial: 8250_dw: Add skip_clk_set_rate quirk Emil Renner Berthing
2021-10-12 20:08 ` Andy Shevchenko
2021-10-12 13:40 ` [PATCH v1 15/16] RISC-V: Add initial StarFive JH7100 device tree Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 16/16] RISC-V: Add BeagleV Starlight Beta " Emil Renner Berthing
2021-10-13 23:32 ` [PATCH v1 00/16] Basic StarFive JH7100 RISC-V SoC support Linus Walleij
2021-10-14 10:46 ` Emil Renner Berthing
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