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From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Emil Renner Berthing <kernel@esmil.dk>
Cc: linux-riscv <linux-riscv@lists.infradead.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	"open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Jiri Slaby <jirislaby@kernel.org>,
	Maximilian Luz <luzmaximilian@gmail.com>,
	Sagar Kadam <sagar.kadam@sifive.com>,
	Drew Fustini <drew@beagleboard.org>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Anup Patel <anup.patel@wdc.com>,
	Atish Patra <atish.patra@wdc.com>,
	Matteo Croce <mcroce@microsoft.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Huan Feng <huan.feng@starfivetech.com>
Subject: Re: [PATCH v1 12/16] pinctrl: starfive: Add pinctrl driver for StarFive SoCs
Date: Mon, 18 Oct 2021 19:23:17 +0300	[thread overview]
Message-ID: <CAHp75VccSDLVbs1sF_-1zghWyLKtKKV1qtxOxZZ-cS0e6S-sBA@mail.gmail.com> (raw)
In-Reply-To: <CANBLGcxriKLZ+CKUsj5sviW8FdHnWTF2koROwmAb=G2tbmE6vQ@mail.gmail.com>

On Mon, Oct 18, 2021 at 6:56 PM Emil Renner Berthing <kernel@esmil.dk> wrote:
> On Mon, 18 Oct 2021 at 17:48, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> > On Mon, Oct 18, 2021 at 6:35 PM Emil Renner Berthing <kernel@esmil.dk> wrote:
> > > On Tue, 12 Oct 2021 at 19:03, Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> > > > On Tue, Oct 12, 2021 at 4:43 PM Emil Renner Berthing <kernel@esmil.dk> wrote:

...

> > > > > +               case PIN_CONFIG_BIAS_DISABLE:
> > > >
> > > > > +                       mask |= PAD_BIAS_MASK;
> > > >
> > > > Use it...
> > > >
> > > > > +                       value = (value & ~PAD_BIAS_MASK) | PAD_BIAS_DISABLE;
> > > >
> > > > ...here. Ditto for the similar cases in this function and elsewhere.
> > >
> > > I don't follow. How do you want me to use mask? If I did value =
> > > (value & ~mask) | PAD_BIAS_DISABLE; then I'd wipe the previous
> > > configuration. Eg. suppose the first config is the drive strength and
> > > second disables bias. Then on the 2nd loop mask =
> > > PAD_DRIVE_STRENGTH_MASK | PAD_BIAS_MASK and the drive strength value
> > > would be wiped.
> >
> > Collect masks and new values in temporary variables and apply them
> > once after the loop is done, no?
>
> But that's exactly what the code does. It merges all the config
> options into a single mask and value so we only need to do rmw on the
> register once.

Then masking the value makes no sense.
What you should have is simply as

  mask |= FOO;
  value |= BAR;

...

> > > > > +       ret = clk_prepare_enable(clk);
> > > > > +       if (ret) {
> > > >
> > > > > +               reset_control_deassert(rst);
> > > >
> > > > Use devm_add_action_or_reset().
> > >
> > > I don't see how that is better.
> >
> > Pity. The rule of thumb is to either try to use devm_*() everywhere in
> > the probe, or don't use it at all. Above is the more-or-less standard
> > pattern where devn_add_action_or_reset() is being used in the entire
> > kernel.
> >
> > > Then I'd first need to call that and
> > > check for errors, but just on the line below enabling the clock the
> > > reset line is deasserted anyway, so then the action isn't needed any
> > > longer. So that 3 lines of code for devm_add_action_or_reset +
> > > lingering unneeded action or code to remove it again vs. just the line
> > > above.
> >
> > Then don't use devm_*() at all. What's the point?
>
> I'm confused. So you wan't an unneeded action to linger because the
> probe function temporarily asserts reset for 3 lines of code?

I;m talking about clk_prepare_enable().

...

> > > > > +       sfp->gc.of_node = dev->of_node;
> > > >
> > > > Isn't GPIO library do this for you?
> > >
> > > If it does I can't find it.
> >
> > Heh... `man git grep`
> > Hint: `git grep -n 'of_node = .*of_node' -- drivers/gpio/gpiolib*`
>
> That's exactly what I did.

Now look at the result and find the correct place where it's done.
Btw, all hits are in the very same function.

-- 
With Best Regards,
Andy Shevchenko

  reply	other threads:[~2021-10-18 16:24 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-12 13:40 [PATCH v1 00/16] Basic StarFive JH7100 RISC-V SoC support Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 01/16] RISC-V: Add StarFive SoC Kconfig option Emil Renner Berthing
2021-10-12 18:20   ` Andy Shevchenko
2021-10-12 13:40 ` [PATCH v1 02/16] dt-bindings: timer: Add StarFive JH7100 clint Emil Renner Berthing
2021-10-13  7:05   ` Geert Uytterhoeven
2021-10-19 22:48   ` Rob Herring
2021-10-12 13:40 ` [PATCH v1 03/16] dt-bindings: interrupt-controller: Add StarFive JH7100 plic Emil Renner Berthing
2021-10-13  7:05   ` Geert Uytterhoeven
2021-10-12 13:40 ` [PATCH v1 04/16] dt-bindings: clock: starfive: Add JH7100 clock definitions Emil Renner Berthing
2021-10-13 18:39   ` Stephen Boyd
2021-10-12 13:40 ` [PATCH v1 05/16] dt-bindings: clock: starfive: Add JH7100 bindings Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 06/16] clk: starfive: Add JH7100 clock generator driver Emil Renner Berthing
2021-10-12 18:40   ` Andy Shevchenko
2021-10-12 20:07     ` Emil Renner Berthing
2021-10-12 21:20       ` Andy Shevchenko
2021-10-12 21:26         ` Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 07/16] dt-bindings: reset: Add StarFive JH7100 reset definitions Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 08/16] dt-bindings: reset: Add Starfive JH7100 reset bindings Emil Renner Berthing
2021-10-12 14:08   ` Philipp Zabel
2021-10-12 13:40 ` [PATCH v1 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver Emil Renner Berthing
2021-10-12 14:06   ` Philipp Zabel
2021-10-12 14:08     ` Emil Renner Berthing
2021-10-12 14:31   ` Philipp Zabel
2021-10-12 15:04     ` Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 10/16] dt-bindings: pinctrl: Add StarFive pinctrl definitions Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 11/16] dt-bindings: pinctrl: Add StarFive JH7100 bindings Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 12/16] pinctrl: starfive: Add pinctrl driver for StarFive SoCs Emil Renner Berthing
2021-10-12 20:02   ` Andy Shevchenko
2021-10-13 16:38     ` Emil Renner Berthing
2021-10-13 19:55       ` Andy Shevchenko
2021-10-13 17:37         ` Emil Renner Berthing
2021-10-13 17:50         ` Geert Uytterhoeven
2021-10-18 15:35     ` Emil Renner Berthing
2021-10-18 15:47       ` Andy Shevchenko
2021-10-18 15:56         ` Emil Renner Berthing
2021-10-18 16:23           ` Andy Shevchenko [this message]
2021-10-18 16:28             ` Andy Shevchenko
2021-10-18 17:02               ` Emil Renner Berthing
2021-10-19  9:52                 ` Andy Shevchenko
2021-10-18 16:35             ` Emil Renner Berthing
2021-10-18 18:37               ` Andy Shevchenko
2021-10-12 13:40 ` [PATCH v1 13/16] dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts Emil Renner Berthing
2021-10-13  7:09   ` Geert Uytterhoeven
2021-10-12 13:40 ` [PATCH v1 14/16] serial: 8250_dw: Add skip_clk_set_rate quirk Emil Renner Berthing
2021-10-12 20:08   ` Andy Shevchenko
2021-10-12 13:40 ` [PATCH v1 15/16] RISC-V: Add initial StarFive JH7100 device tree Emil Renner Berthing
2021-10-12 13:40 ` [PATCH v1 16/16] RISC-V: Add BeagleV Starlight Beta " Emil Renner Berthing
2021-10-13 23:32 ` [PATCH v1 00/16] Basic StarFive JH7100 RISC-V SoC support Linus Walleij
2021-10-14 10:46   ` Emil Renner Berthing

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