* [PATCH v1 0/2] phy: intel-lgm-sdxc: Add support for SDXC PHY @ 2019-08-27 8:26 Ramuthevar,Vadivel MuruganX 2019-08-27 8:26 ` [PATCH v1 1/2] dt-bindings: phy: intel-sdxc-phy: Add YAML schema for LGM " Ramuthevar,Vadivel MuruganX 2019-08-27 8:26 ` [PATCH v1 2/2] phy: intel-lgm-sdxc: Add support for " Ramuthevar,Vadivel MuruganX 0 siblings, 2 replies; 8+ messages in thread From: Ramuthevar,Vadivel MuruganX @ 2019-08-27 8:26 UTC (permalink / raw) To: kishon Cc: linux-kernel, devicetree, robh, andriy.shevchenko, cheol.yong.kim, qi-ming.wu, peter.harliman.liem, vadivel.muruganx.ramuthevar Add support for eMMC PHY on Intel's Lightning Mountain SoC. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> --- Ramuthevar Vadivel Murugan (2): dt-bindings: phy: intel-sdxc-phy: Add YAML schema for LGM SDXC PHY phy: intel-lgm-sdxc: Add support for SDXC PHY .../bindings/phy/intel,lgm-sdxc-phy.yaml | 50 +++++++ drivers/phy/intel/Kconfig | 6 + drivers/phy/intel/Makefile | 1 + drivers/phy/intel/phy-intel-sdxc.c | 144 +++++++++++++++++++++ 4 files changed, 201 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml create mode 100644 drivers/phy/intel/phy-intel-sdxc.c -- 2.11.0 ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v1 1/2] dt-bindings: phy: intel-sdxc-phy: Add YAML schema for LGM SDXC PHY 2019-08-27 8:26 [PATCH v1 0/2] phy: intel-lgm-sdxc: Add support for SDXC PHY Ramuthevar,Vadivel MuruganX @ 2019-08-27 8:26 ` Ramuthevar,Vadivel MuruganX 2019-08-27 12:39 ` Rob Herring 2019-08-27 8:26 ` [PATCH v1 2/2] phy: intel-lgm-sdxc: Add support for " Ramuthevar,Vadivel MuruganX 1 sibling, 1 reply; 8+ messages in thread From: Ramuthevar,Vadivel MuruganX @ 2019-08-27 8:26 UTC (permalink / raw) To: kishon Cc: linux-kernel, devicetree, robh, andriy.shevchenko, cheol.yong.kim, qi-ming.wu, peter.harliman.liem, vadivel.muruganx.ramuthevar From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Add a YAML schema to use the host controller driver with the SDXC PHY on Intel's Lightning Mountain SoC. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> --- .../bindings/phy/intel,lgm-sdxc-phy.yaml | 50 ++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml new file mode 100644 index 000000000000..be05020880bf --- /dev/null +++ b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/intel,lgm-sdxc-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel Lightning Mountain(LGM) SDXC PHY Device Tree Bindings + +maintainers: + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> + +description: Binding for SDXC PHY + +properties: + compatible: + const: intel,lgm-sdxc-phy + + intel,syscon: + description: phandle to the sdxc through syscon + $ref: '/schemas/types.yaml#/definitions/phandle' + + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + + "#phy-cells": + const: 0 + +required: + - "#phy-cells" + - compatible + - intel,syscon + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + sdxc_phy: sdxc_phy { + compatible = "intel,lgm-sdxc-phy"; + intel,syscon = <&sysconf>; + clocks = <&sdxc>; + clock-names = "sdxcclk"; + #phy-cells = <0>; + }; + +... -- 2.11.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: phy: intel-sdxc-phy: Add YAML schema for LGM SDXC PHY 2019-08-27 8:26 ` [PATCH v1 1/2] dt-bindings: phy: intel-sdxc-phy: Add YAML schema for LGM " Ramuthevar,Vadivel MuruganX @ 2019-08-27 12:39 ` Rob Herring 2019-08-28 1:41 ` Ramuthevar, Vadivel MuruganX 2019-08-28 3:47 ` Ramuthevar, Vadivel MuruganX 0 siblings, 2 replies; 8+ messages in thread From: Rob Herring @ 2019-08-27 12:39 UTC (permalink / raw) To: Ramuthevar,Vadivel MuruganX Cc: Kishon Vijay Abraham I, linux-kernel, devicetree, Andy Shevchenko, cheol.yong.kim, qi-ming.wu, peter.harliman.liem On Tue, Aug 27, 2019 at 3:27 AM Ramuthevar,Vadivel MuruganX <vadivel.muruganx.ramuthevar@linux.intel.com> wrote: > > From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > > Add a YAML schema to use the host controller driver with the > SDXC PHY on Intel's Lightning Mountain SoC. > > Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > --- > .../bindings/phy/intel,lgm-sdxc-phy.yaml | 50 ++++++++++++++++++++++ > 1 file changed, 50 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml > new file mode 100644 > index 000000000000..be05020880bf > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml > @@ -0,0 +1,50 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/intel,lgm-sdxc-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel Lightning Mountain(LGM) SDXC PHY Device Tree Bindings > + > +maintainers: > + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > + > +description: Binding for SDXC PHY > + > +properties: > + compatible: > + const: intel,lgm-sdxc-phy > + > + intel,syscon: > + description: phandle to the sdxc through syscon > + $ref: '/schemas/types.yaml#/definitions/phandle' > + > + clocks: > + maxItems: 1 > + > + clock-names: > + maxItems: 1 > + > + "#phy-cells": > + const: 0 > + > +required: > + - "#phy-cells" > + - compatible > + - intel,syscon > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + sdxc_phy: sdxc_phy { > + compatible = "intel,lgm-sdxc-phy"; > + intel,syscon = <&sysconf>; Rather than a phandle, can this be a child node of sysconf? You need a binding for sysconf first anyways. > + clocks = <&sdxc>; > + clock-names = "sdxcclk"; > + #phy-cells = <0>; > + }; > + > +... > -- > 2.11.0 > ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: phy: intel-sdxc-phy: Add YAML schema for LGM SDXC PHY 2019-08-27 12:39 ` Rob Herring @ 2019-08-28 1:41 ` Ramuthevar, Vadivel MuruganX 2019-08-28 3:47 ` Ramuthevar, Vadivel MuruganX 1 sibling, 0 replies; 8+ messages in thread From: Ramuthevar, Vadivel MuruganX @ 2019-08-28 1:41 UTC (permalink / raw) To: Rob Herring Cc: Kishon Vijay Abraham I, linux-kernel, devicetree, Andy Shevchenko, cheol.yong.kim, qi-ming.wu, peter.harliman.liem Hi Rob, On 27/8/2019 8:39 PM, Rob Herring wrote: > On Tue, Aug 27, 2019 at 3:27 AM Ramuthevar,Vadivel MuruganX > <vadivel.muruganx.ramuthevar@linux.intel.com> wrote: >> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> >> Add a YAML schema to use the host controller driver with the >> SDXC PHY on Intel's Lightning Mountain SoC. >> >> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> --- >> .../bindings/phy/intel,lgm-sdxc-phy.yaml | 50 ++++++++++++++++++++++ >> 1 file changed, 50 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml >> >> diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml >> new file mode 100644 >> index 000000000000..be05020880bf >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml >> @@ -0,0 +1,50 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/phy/intel,lgm-sdxc-phy.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Intel Lightning Mountain(LGM) SDXC PHY Device Tree Bindings >> + >> +maintainers: >> + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> + >> +description: Binding for SDXC PHY >> + >> +properties: >> + compatible: >> + const: intel,lgm-sdxc-phy >> + >> + intel,syscon: >> + description: phandle to the sdxc through syscon >> + $ref: '/schemas/types.yaml#/definitions/phandle' >> + >> + clocks: >> + maxItems: 1 >> + >> + clock-names: >> + maxItems: 1 >> + >> + "#phy-cells": >> + const: 0 >> + >> +required: >> + - "#phy-cells" >> + - compatible >> + - intel,syscon >> + - clocks >> + - clock-names >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + sdxc_phy: sdxc_phy { >> + compatible = "intel,lgm-sdxc-phy"; >> + intel,syscon = <&sysconf>; > Rather than a phandle, can this be a child node of sysconf? You need a > binding for sysconf first anyways. Thanks a lot! for the review comments, fix it in next submit. Best Regards Vadivel >> + clocks = <&sdxc>; >> + clock-names = "sdxcclk"; >> + #phy-cells = <0>; >> + }; >> + >> +... >> -- >> 2.11.0 >> ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: phy: intel-sdxc-phy: Add YAML schema for LGM SDXC PHY 2019-08-27 12:39 ` Rob Herring 2019-08-28 1:41 ` Ramuthevar, Vadivel MuruganX @ 2019-08-28 3:47 ` Ramuthevar, Vadivel MuruganX 2019-08-28 11:39 ` Rob Herring 1 sibling, 1 reply; 8+ messages in thread From: Ramuthevar, Vadivel MuruganX @ 2019-08-28 3:47 UTC (permalink / raw) To: Rob Herring Cc: Kishon Vijay Abraham I, linux-kernel, devicetree, Andy Shevchenko, cheol.yong.kim, qi-ming.wu, peter.harliman.liem Hi Rob, On 27/8/2019 8:39 PM, Rob Herring wrote: > On Tue, Aug 27, 2019 at 3:27 AM Ramuthevar,Vadivel MuruganX > <vadivel.muruganx.ramuthevar@linux.intel.com> wrote: >> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> >> Add a YAML schema to use the host controller driver with the >> SDXC PHY on Intel's Lightning Mountain SoC. >> >> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> --- >> .../bindings/phy/intel,lgm-sdxc-phy.yaml | 50 ++++++++++++++++++++++ >> 1 file changed, 50 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml >> >> diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml >> new file mode 100644 >> index 000000000000..be05020880bf >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml >> @@ -0,0 +1,50 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/phy/intel,lgm-sdxc-phy.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Intel Lightning Mountain(LGM) SDXC PHY Device Tree Bindings >> + >> +maintainers: >> + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >> + >> +description: Binding for SDXC PHY >> + >> +properties: >> + compatible: >> + const: intel,lgm-sdxc-phy >> + >> + intel,syscon: >> + description: phandle to the sdxc through syscon >> + $ref: '/schemas/types.yaml#/definitions/phandle' >> + >> + clocks: >> + maxItems: 1 >> + >> + clock-names: >> + maxItems: 1 >> + >> + "#phy-cells": >> + const: 0 >> + >> +required: >> + - "#phy-cells" >> + - compatible >> + - intel,syscon >> + - clocks >> + - clock-names >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + sdxc_phy: sdxc_phy { >> + compatible = "intel,lgm-sdxc-phy"; >> + intel,syscon = <&sysconf>; > Rather than a phandle, can this be a child node of sysconf? You need a > binding for sysconf first anyways. intel,syscon is phandle, emmc_phy is not child node of sysconf, access emmc_phy register over sysconf so made as reference here. Best Regards Vadivel >> + clocks = <&sdxc>; >> + clock-names = "sdxcclk"; >> + #phy-cells = <0>; >> + }; >> + >> +... >> -- >> 2.11.0 >> ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: phy: intel-sdxc-phy: Add YAML schema for LGM SDXC PHY 2019-08-28 3:47 ` Ramuthevar, Vadivel MuruganX @ 2019-08-28 11:39 ` Rob Herring 2019-08-28 12:07 ` Ramuthevar, Vadivel MuruganX 0 siblings, 1 reply; 8+ messages in thread From: Rob Herring @ 2019-08-28 11:39 UTC (permalink / raw) To: Ramuthevar, Vadivel MuruganX Cc: Kishon Vijay Abraham I, linux-kernel, devicetree, Andy Shevchenko, cheol.yong.kim, qi-ming.wu, peter.harliman.liem On Tue, Aug 27, 2019 at 10:47 PM Ramuthevar, Vadivel MuruganX <vadivel.muruganx.ramuthevar@linux.intel.com> wrote: > > Hi Rob, > > On 27/8/2019 8:39 PM, Rob Herring wrote: > > On Tue, Aug 27, 2019 at 3:27 AM Ramuthevar,Vadivel MuruganX > > <vadivel.muruganx.ramuthevar@linux.intel.com> wrote: > >> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > >> > >> Add a YAML schema to use the host controller driver with the > >> SDXC PHY on Intel's Lightning Mountain SoC. > >> > >> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > >> --- > >> .../bindings/phy/intel,lgm-sdxc-phy.yaml | 50 ++++++++++++++++++++++ > >> 1 file changed, 50 insertions(+) > >> create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml > >> > >> diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml > >> new file mode 100644 > >> index 000000000000..be05020880bf > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml > >> @@ -0,0 +1,50 @@ > >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > >> +%YAML 1.2 > >> +--- > >> +$id: http://devicetree.org/schemas/phy/intel,lgm-sdxc-phy.yaml# > >> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >> + > >> +title: Intel Lightning Mountain(LGM) SDXC PHY Device Tree Bindings > >> + > >> +maintainers: > >> + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> > >> + > >> +description: Binding for SDXC PHY > >> + > >> +properties: > >> + compatible: > >> + const: intel,lgm-sdxc-phy > >> + > >> + intel,syscon: > >> + description: phandle to the sdxc through syscon > >> + $ref: '/schemas/types.yaml#/definitions/phandle' > >> + > >> + clocks: > >> + maxItems: 1 > >> + > >> + clock-names: > >> + maxItems: 1 > >> + > >> + "#phy-cells": > >> + const: 0 > >> + > >> +required: > >> + - "#phy-cells" > >> + - compatible > >> + - intel,syscon > >> + - clocks > >> + - clock-names > >> + > >> +additionalProperties: false > >> + > >> +examples: > >> + - | > >> + sdxc_phy: sdxc_phy { > >> + compatible = "intel,lgm-sdxc-phy"; > >> + intel,syscon = <&sysconf>; > > Rather than a phandle, can this be a child node of sysconf? You need a > > binding for sysconf first anyways. > intel,syscon is phandle, emmc_phy is not child node of sysconf, access > emmc_phy > register over sysconf so made as reference here. How do you access the emmc_phy registers? They are part of the sysconf address space or the sysconf provides some sort of indirect register access? In case of the former, then emmc_phy should be a child node. That's actually fairly common. Rob ^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v1 1/2] dt-bindings: phy: intel-sdxc-phy: Add YAML schema for LGM SDXC PHY 2019-08-28 11:39 ` Rob Herring @ 2019-08-28 12:07 ` Ramuthevar, Vadivel MuruganX 0 siblings, 0 replies; 8+ messages in thread From: Ramuthevar, Vadivel MuruganX @ 2019-08-28 12:07 UTC (permalink / raw) To: Rob Herring Cc: Kishon Vijay Abraham I, linux-kernel, devicetree, Andy Shevchenko, cheol.yong.kim, qi-ming.wu, peter.harliman.liem Hi Rob, Thank you for the review comments. On 28/8/2019 7:39 PM, Rob Herring wrote: > On Tue, Aug 27, 2019 at 10:47 PM Ramuthevar, Vadivel MuruganX > <vadivel.muruganx.ramuthevar@linux.intel.com> wrote: >> Hi Rob, >> >> On 27/8/2019 8:39 PM, Rob Herring wrote: >>> On Tue, Aug 27, 2019 at 3:27 AM Ramuthevar,Vadivel MuruganX >>> <vadivel.muruganx.ramuthevar@linux.intel.com> wrote: >>>> From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >>>> >>>> Add a YAML schema to use the host controller driver with the >>>> SDXC PHY on Intel's Lightning Mountain SoC. >>>> >>>> Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >>>> --- >>>> .../bindings/phy/intel,lgm-sdxc-phy.yaml | 50 ++++++++++++++++++++++ >>>> 1 file changed, 50 insertions(+) >>>> create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml >>>> >>>> diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml >>>> new file mode 100644 >>>> index 000000000000..be05020880bf >>>> --- /dev/null >>>> +++ b/Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml >>>> @@ -0,0 +1,50 @@ >>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >>>> +%YAML 1.2 >>>> +--- >>>> +$id: http://devicetree.org/schemas/phy/intel,lgm-sdxc-phy.yaml# >>>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>>> + >>>> +title: Intel Lightning Mountain(LGM) SDXC PHY Device Tree Bindings >>>> + >>>> +maintainers: >>>> + - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> >>>> + >>>> +description: Binding for SDXC PHY >>>> + >>>> +properties: >>>> + compatible: >>>> + const: intel,lgm-sdxc-phy >>>> + >>>> + intel,syscon: >>>> + description: phandle to the sdxc through syscon >>>> + $ref: '/schemas/types.yaml#/definitions/phandle' >>>> + >>>> + clocks: >>>> + maxItems: 1 >>>> + >>>> + clock-names: >>>> + maxItems: 1 >>>> + >>>> + "#phy-cells": >>>> + const: 0 >>>> + >>>> +required: >>>> + - "#phy-cells" >>>> + - compatible >>>> + - intel,syscon >>>> + - clocks >>>> + - clock-names >>>> + >>>> +additionalProperties: false >>>> + >>>> +examples: >>>> + - | >>>> + sdxc_phy: sdxc_phy { >>>> + compatible = "intel,lgm-sdxc-phy"; >>>> + intel,syscon = <&sysconf>; >>> Rather than a phandle, can this be a child node of sysconf? You need a >>> binding for sysconf first anyways. >> intel,syscon is phandle, emmc_phy is not child node of sysconf, access >> emmc_phy >> register over sysconf so made as reference here. > How do you access the emmc_phy registers? They are part of the sysconf > address space or the sysconf provides some sort of indirect register > access? In case of the former, then emmc_phy should be a child node. > That's actually fairly common. Agreed!, you are correct. I have created two files one for syscon and other one is for emmc-phy Documentation/devicetree/bindings/phy/intel,syscon.yaml Documentation/devicetree/bindings/phy/intel,lgm-sdxc-phy.yaml As you said earlier mail, first syscon bindings to be there, sending the patch as well. Regards Vadivel > Rob > ^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v1 2/2] phy: intel-lgm-sdxc: Add support for SDXC PHY 2019-08-27 8:26 [PATCH v1 0/2] phy: intel-lgm-sdxc: Add support for SDXC PHY Ramuthevar,Vadivel MuruganX 2019-08-27 8:26 ` [PATCH v1 1/2] dt-bindings: phy: intel-sdxc-phy: Add YAML schema for LGM " Ramuthevar,Vadivel MuruganX @ 2019-08-27 8:26 ` Ramuthevar,Vadivel MuruganX 1 sibling, 0 replies; 8+ messages in thread From: Ramuthevar,Vadivel MuruganX @ 2019-08-27 8:26 UTC (permalink / raw) To: kishon Cc: linux-kernel, devicetree, robh, andriy.shevchenko, cheol.yong.kim, qi-ming.wu, peter.harliman.liem, vadivel.muruganx.ramuthevar From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Add support for eMMC PHY on Intel's Lightning Mountain SoC. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> --- drivers/phy/intel/Kconfig | 6 ++ drivers/phy/intel/Makefile | 1 + drivers/phy/intel/phy-intel-sdxc.c | 144 +++++++++++++++++++++++++++++++++++++ 3 files changed, 151 insertions(+) create mode 100644 drivers/phy/intel/phy-intel-sdxc.c diff --git a/drivers/phy/intel/Kconfig b/drivers/phy/intel/Kconfig index 4ea6a8897cd7..d6356c762a6b 100644 --- a/drivers/phy/intel/Kconfig +++ b/drivers/phy/intel/Kconfig @@ -7,3 +7,9 @@ config PHY_INTEL_EMMC select GENERIC_PHY help Enable this to support the Intel EMMC PHY + +config PHY_INTEL_SDXC + tristate "Intel SDXC PHY driver" + select GENERIC_PHY + help + Enable this to support the Intel SDXC PHY driver diff --git a/drivers/phy/intel/Makefile b/drivers/phy/intel/Makefile index 6b876a75599d..3c6e7523200c 100644 --- a/drivers/phy/intel/Makefile +++ b/drivers/phy/intel/Makefile @@ -1,2 +1,3 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_PHY_INTEL_EMMC) += phy-intel-emmc.o +obj-$(CONFIG_PHY_INTEL_SDXC) += phy-intel-sdxc.o diff --git a/drivers/phy/intel/phy-intel-sdxc.c b/drivers/phy/intel/phy-intel-sdxc.c new file mode 100644 index 000000000000..7e13fd9ced5b --- /dev/null +++ b/drivers/phy/intel/phy-intel-sdxc.c @@ -0,0 +1,144 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Intel SDXC PHY driver + * Copyright (C) 2019 Intel, Corp. + */ + +#include <linux/bits.h> +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/mfd/syscon.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/phy/phy.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +/* SDXC PHY register definitions */ +#define SDXC_PHYCTRL_REG 0x88 +#define OTAPDLYENA_MASK BIT(14) +#define OTAPDLYSEL(x) ((x) << 10) +#define OTAPDLYSEL_ALL OTAPDLYSEL(GENMASK(3, 0)) + +struct intel_sdxc_phy { + struct regmap *syscfg; + struct clk *sdxcclk; +}; + +static int intel_sdxc_phy_init(struct phy *phy) +{ + struct intel_sdxc_phy *priv = phy_get_drvdata(phy); + + /* + * We purposely get the clock here and not in probe to avoid the + * circular dependency problem. We expect: + * - PHY driver to probe + * - SDHCI driver to start probe + * - SDHCI driver to register it's clock + * - SDHCI driver to get the PHY + * - SDHCI driver to init the PHY + * + * The clock is optional, so upon any error just return it like + * any other error to user. + */ + priv->sdxcclk = clk_get_optional(&phy->dev, "sdxcclk"); + if (IS_ERR(priv->sdxcclk)) { + dev_err(&phy->dev, "Error getting sdxcclk\n"); + return PTR_ERR(priv->sdxcclk); + } + + return 0; +} + +static int intel_sdxc_phy_exit(struct phy *phy) +{ + struct intel_sdxc_phy *priv = phy_get_drvdata(phy); + + clk_put(priv->sdxcclk); + + return 0; +} + +static int intel_sdxc_phy_power_on(struct phy *phy) +{ + struct intel_sdxc_phy *priv = phy_get_drvdata(phy); + + /* Output tap delay: disable */ + regmap_update_bits(priv->syscfg, SDXC_PHYCTRL_REG, OTAPDLYENA_MASK, 0); + + /* Output tap delay */ + regmap_update_bits(priv->syscfg, SDXC_PHYCTRL_REG, OTAPDLYSEL_ALL, + OTAPDLYSEL_ALL); + + return 0; +} + +static int intel_sdxc_phy_power_off(struct phy *phy) +{ + /* Do nothing */ + return 0; +} + +static const struct phy_ops ops = { + .init = intel_sdxc_phy_init, + .exit = intel_sdxc_phy_exit, + .power_on = intel_sdxc_phy_power_on, + .power_off = intel_sdxc_phy_power_off, + .owner = THIS_MODULE, +}; + +static int intel_sdxc_phy_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct intel_sdxc_phy *priv; + struct phy *generic_phy; + struct phy_provider *phy_provider; + + if (!dev->parent || !dev->parent->of_node) + return -ENODEV; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + /* Get SDXC phy (accessed via chiptop) regmap */ + priv->syscfg = syscon_regmap_lookup_by_phandle(dev->of_node, + "intel,syscon"); + if (IS_ERR(priv->syscfg)) { + dev_err(dev, "No syscon phandle for chiptop\n"); + return PTR_ERR(priv->syscfg); + } + + generic_phy = devm_phy_create(dev, dev->of_node, &ops); + if (IS_ERR(generic_phy)) { + dev_err(dev, "failed to create PHY\n"); + return PTR_ERR(generic_phy); + } + + phy_set_drvdata(generic_phy, priv); + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + return PTR_ERR_OR_ZERO(phy_provider); +} + +static const struct of_device_id intel_sdxc_phy_dt_ids[] = { + { .compatible = "intel,lgm-sdxc-phy" }, + {} +}; + +MODULE_DEVICE_TABLE(of, intel_sdxc_phy_dt_ids); + +static struct platform_driver intel_sdxc_driver = { + .probe = intel_sdxc_phy_probe, + .driver = { + .name = "intel-sdxc-phy", + .of_match_table = intel_sdxc_phy_dt_ids, + }, +}; + +module_platform_driver(intel_sdxc_driver); + +MODULE_AUTHOR("Peter Harliman Liem <peter.harliman.liem@intel.com>"); +MODULE_DESCRIPTION("Intel SDXC PHY driver"); +MODULE_LICENSE("GPL v2"); -- 2.11.0 ^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2019-08-28 12:07 UTC | newest] Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-08-27 8:26 [PATCH v1 0/2] phy: intel-lgm-sdxc: Add support for SDXC PHY Ramuthevar,Vadivel MuruganX 2019-08-27 8:26 ` [PATCH v1 1/2] dt-bindings: phy: intel-sdxc-phy: Add YAML schema for LGM " Ramuthevar,Vadivel MuruganX 2019-08-27 12:39 ` Rob Herring 2019-08-28 1:41 ` Ramuthevar, Vadivel MuruganX 2019-08-28 3:47 ` Ramuthevar, Vadivel MuruganX 2019-08-28 11:39 ` Rob Herring 2019-08-28 12:07 ` Ramuthevar, Vadivel MuruganX 2019-08-27 8:26 ` [PATCH v1 2/2] phy: intel-lgm-sdxc: Add support for " Ramuthevar,Vadivel MuruganX
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