[PATCH V4 1/4] dt-bindings: fsl: scu: add general interrupt support

[PATCH V4 1/4] dt-bindings: fsl: scu: add general interrupt support

[Anson Huang]

Add scu general interrupt function support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Changes since V3:
	- make general MU interrupt channel as optional;
	- rename "gi3" to "gip3" according to driver/dts change.
---
 .../devicetree/bindings/arm/freescale/fsl,scu.txt      | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
index 72d481c..4a9b9ab 100644
--- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
@@ -22,9 +22,11 @@ Required properties:
 -------------------
 - compatible:	should be "fsl,imx-scu".
 - mbox-names:	should include "tx0", "tx1", "tx2", "tx3",
-			       "rx0", "rx1", "rx2", "rx3".
-- mboxes:	List of phandle of 4 MU channels for tx and 4 MU channels
-		for rx. All 8 MU channels must be in the same MU instance.
+			       "rx0", "rx1", "rx2", "rx3";
+		include "gip3" if want to support general MU interrupt.
+- mboxes:	List of phandle of 4 MU channels for tx, 4 MU channels for
+		rx, and 1 optional MU channel for general interrupt.
+		All MU channels must be in the same MU instance.
 		Cross instances are not allowed. The MU instance can only
 		be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need
 		to make sure use the one which is not conflict with other
@@ -34,6 +36,7 @@ Required properties:
 		Channel 1 must be "tx1" or "rx1".
 		Channel 2 must be "tx2" or "rx2".
 		Channel 3 must be "tx3" or "rx3".
+		General interrupt rx channel must be "gip3".
 		e.g.
 		mboxes = <&lsio_mu1 0 0
 			  &lsio_mu1 0 1
@@ -42,7 +45,8 @@ Required properties:
 			  &lsio_mu1 1 0
 			  &lsio_mu1 1 1
 			  &lsio_mu1 1 2
-			  &lsio_mu1 1 3>;
+			  &lsio_mu1 1 3
+			  &lsio_mu1 3 3>;
 		See Documentation/devicetree/bindings/mailbox/fsl,mu.txt
 		for detailed mailbox binding.
 
@@ -133,7 +137,8 @@ firmware {
 	scu {
 		compatible = "fsl,imx-scu";
 		mbox-names = "tx0", "tx1", "tx2", "tx3",
-			     "rx0", "rx1", "rx2", "rx3";
+			     "rx0", "rx1", "rx2", "rx3",
+			     "gip3";
 		mboxes = <&lsio_mu1 0 0
 			  &lsio_mu1 0 1
 			  &lsio_mu1 0 2
@@ -141,7 +146,8 @@ firmware {
 			  &lsio_mu1 1 0
 			  &lsio_mu1 1 1
 			  &lsio_mu1 1 2
-			  &lsio_mu1 1 3>;
+			  &lsio_mu1 1 3
+			  &lsio_mu1 3 3>;
 
 		clk: clk {
 			compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
-- 
2.7.4

[PATCH V4 2/4] firmware: imx: enable imx scu general irq function

[Anson Huang]

The System Controller Firmware (SCFW) controls RTC, thermal
and WDOG etc., these resources' interrupt function are managed
by SCU. When any IRQ pending, SCU will notify Linux via MU general
interrupt channel #3, and Linux kernel needs to call SCU APIs
to get IRQ status and notify each module to handle the interrupt.

Since there is no data transmission for SCU IRQ notification, so
doorbell mode is used for this MU channel, and SCU driver will
use notifier mechanism to broadcast to every module which registers
the SCU block notifier.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
Changes since V3:
	- use alias to get general MU interrupt channel id and then get resource ID,
	  this is to support different MU instance;
	- add return value check for imx_scu_enable_general_irq_channel().
---
 drivers/firmware/imx/imx-scu.c   | 116 +++++++++++++++++++++++++++++++++++++++
 include/linux/firmware/imx/sci.h |   3 +
 2 files changed, 119 insertions(+)

diff --git a/drivers/firmware/imx/imx-scu.c b/drivers/firmware/imx/imx-scu.c
index 2bb1a19..1dcd7b3 100644
--- a/drivers/firmware/imx/imx-scu.c
+++ b/drivers/firmware/imx/imx-scu.c
@@ -7,6 +7,7 @@
  *
  */
 
+#include <dt-bindings/firmware/imx/rsrc.h>
 #include <linux/err.h>
 #include <linux/firmware/imx/types.h>
 #include <linux/firmware/imx/ipc.h>
@@ -21,6 +22,8 @@
 
 #define SCU_MU_CHAN_NUM		8
 #define MAX_RX_TIMEOUT		(msecs_to_jiffies(30))
+#define IMX_SC_IRQ_FUNC_STATUS	2
+#define IMX_SC_IRQ_NUM_GROUP	6
 
 struct imx_sc_chan {
 	struct imx_sc_ipc *sc_ipc;
@@ -41,6 +44,7 @@ struct imx_sc_ipc {
 	u32 *msg;
 	u8 rx_size;
 	u8 count;
+	u32 mu_resource_id;
 };
 
 /*
@@ -77,7 +81,23 @@ static int imx_sc_linux_errmap[IMX_SC_ERR_LAST] = {
 	-EIO,	 /* IMX_SC_ERR_FAIL */
 };
 
+struct imx_sc_msg_irq_get_status {
+	struct imx_sc_rpc_msg hdr;
+	union {
+		struct {
+			u16 resource;
+			u8 group;
+			u8 reserved;
+		} __packed req;
+		struct {
+			u32 status;
+		} __packed resp;
+	} data;
+};
+
 static struct imx_sc_ipc *imx_sc_ipc_handle;
+static struct work_struct imx_sc_general_irq_work;
+static BLOCKING_NOTIFIER_HEAD(imx_scu_notifier_chain);
 
 static inline int imx_sc_to_linux_errno(int errno)
 {
@@ -194,9 +214,90 @@ int imx_scu_call_rpc(struct imx_sc_ipc *sc_ipc, void *msg, bool have_resp)
 }
 EXPORT_SYMBOL(imx_scu_call_rpc);
 
+int imx_scu_register_notifier(struct notifier_block *nb)
+{
+	return blocking_notifier_chain_register(&imx_scu_notifier_chain, nb);
+}
+EXPORT_SYMBOL(imx_scu_register_notifier);
+
+int imx_scu_unregister_notifier(struct notifier_block *nb)
+{
+	return blocking_notifier_chain_unregister(&imx_scu_notifier_chain, nb);
+}
+EXPORT_SYMBOL(imx_scu_unregister_notifier);
+
+static int imx_scu_notifier_call_chain(unsigned long status, u8 *group)
+{
+	return blocking_notifier_call_chain(&imx_scu_notifier_chain,
+					    status, (void *)group);
+}
+
+static void imx_scu_general_irq_work_handler(struct work_struct *work)
+{
+	struct imx_sc_msg_irq_get_status msg;
+	struct imx_sc_rpc_msg *hdr = &msg.hdr;
+	u32 irq_status;
+	int ret;
+	u8 i;
+
+	for (i = 0; i < IMX_SC_IRQ_NUM_GROUP; i++) {
+		hdr->ver = IMX_SC_RPC_VERSION;
+		hdr->svc = IMX_SC_RPC_SVC_IRQ;
+		hdr->func = IMX_SC_IRQ_FUNC_STATUS;
+		hdr->size = 2;
+
+		msg.data.req.resource = imx_sc_ipc_handle->mu_resource_id;
+		msg.data.req.group = i;
+
+		ret = imx_scu_call_rpc(imx_sc_ipc_handle, &msg, true);
+		if (ret) {
+			pr_err("get irq status failed, ret %d\n", ret);
+			return;
+		}
+
+		irq_status = msg.data.resp.status;
+		if (!irq_status)
+			continue;
+
+		imx_scu_notifier_call_chain(irq_status, &i);
+	}
+}
+
+static void imx_scu_rxdb_callback(struct mbox_client *c, void *msg)
+{
+	schedule_work(&imx_sc_general_irq_work);
+}
+
+static int imx_scu_enable_general_irq_channel(struct device *dev)
+{
+	struct mbox_client *cl;
+	struct mbox_chan *ch;
+	int ret = 0;
+
+	cl = devm_kzalloc(dev, sizeof(*cl), GFP_KERNEL);
+	if (!cl)
+		return -ENOMEM;
+
+	cl->dev = dev;
+	cl->rx_callback = imx_scu_rxdb_callback;
+
+	/* SCU general IRQ uses general interrupt channel 3 */
+	ch = mbox_request_channel_byname(cl, "gip3");
+	if (IS_ERR(ch)) {
+		ret = PTR_ERR(ch);
+		dev_err(dev, "failed to request mbox chan gip3, ret %d\n", ret);
+		return ret;
+	}
+
+	INIT_WORK(&imx_sc_general_irq_work, imx_scu_general_irq_work_handler);
+
+	return ret;
+}
+
 static int imx_scu_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
+	struct of_phandle_args spec;
 	struct imx_sc_ipc *sc_ipc;
 	struct imx_sc_chan *sc_chan;
 	struct mbox_client *cl;
@@ -246,6 +347,21 @@ static int imx_scu_probe(struct platform_device *pdev)
 
 	imx_sc_ipc_handle = sc_ipc;
 
+	ret = imx_scu_enable_general_irq_channel(dev);
+	if (ret)
+		dev_warn(dev,
+			"failed to enable general irq channel: %d\n", ret);
+
+	if (!of_parse_phandle_with_args(dev->of_node, "mboxes",
+				       "#mbox-cells", 0, &spec))
+		i = of_alias_get_id(spec.np, "mu");
+
+	/* use mu1 as general mu irq channel if failed */
+	if (i < 0)
+		i = 1;
+
+	imx_sc_ipc_handle->mu_resource_id = IMX_SC_R_MU_0A + i;
+
 	dev_info(dev, "NXP i.MX SCU Initialized\n");
 
 	return devm_of_platform_populate(dev);
diff --git a/include/linux/firmware/imx/sci.h b/include/linux/firmware/imx/sci.h
index ebc5509..9d608db 100644
--- a/include/linux/firmware/imx/sci.h
+++ b/include/linux/firmware/imx/sci.h
@@ -15,4 +15,7 @@
 
 #include <linux/firmware/imx/svc/misc.h>
 #include <linux/firmware/imx/svc/pm.h>
+
+int imx_scu_register_notifier(struct notifier_block *nb);
+int imx_scu_unregister_notifier(struct notifier_block *nb);
 #endif /* _SC_SCI_H */
-- 
2.7.4

[PATCH V4 3/4] arm64: dts: freescale: imx8qxp: enable scu general irq channel

[Anson Huang]

On i.MX8QXP, SCU uses MU1 general interrupt channel #3 to notify
user for IRQs of RTC alarm, thermal alarm and WDOG etc., mailbox
RX doorbell mode is used for this function, this patch adds
support for it.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
Changes since V3:
	- rename "gi3" to "gip3";
	- add alias for getting mu id by driver.
---
 arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 4c3dd95..f0a9224 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -21,6 +21,7 @@
 		mmc1 = &usdhc2;
 		mmc2 = &usdhc3;
 		serial0 = &adma_lpuart0;
+		mu1 = &lsio_mu1;
 	};
 
 	cpus {
@@ -87,7 +88,8 @@
 	scu {
 		compatible = "fsl,imx-scu";
 		mbox-names = "tx0", "tx1", "tx2", "tx3",
-			     "rx0", "rx1", "rx2", "rx3";
+			     "rx0", "rx1", "rx2", "rx3",
+			     "gip3";
 		mboxes = <&lsio_mu1 0 0
 			  &lsio_mu1 0 1
 			  &lsio_mu1 0 2
@@ -95,7 +97,8 @@
 			  &lsio_mu1 1 0
 			  &lsio_mu1 1 1
 			  &lsio_mu1 1 2
-			  &lsio_mu1 1 3>;
+			  &lsio_mu1 1 3
+			  &lsio_mu1 3 3>;
 
 		clk: clock-controller {
 			compatible = "fsl,imx8qxp-clk";
-- 
2.7.4

[PATCH V4 4/4] rtc: imx-sc: add rtc alarm support

[Anson Huang]

Add i.MX system controller RTC alarm support, the RTC alarm
is implemented via SIP(silicon provider) runtime service call
and ARM-Trusted-Firmware will communicate with system controller
via MU(message unit) IPC to set RTC alarm. When RTC alarm fires,
system controller will generate a common MU irq event and notify
system controller RTC driver to handle the irq event.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
No changes since V3.
---
 drivers/rtc/rtc-imx-sc.c | 112 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 112 insertions(+)

diff --git a/drivers/rtc/rtc-imx-sc.c b/drivers/rtc/rtc-imx-sc.c
index 60570a2..3557f12 100644
--- a/drivers/rtc/rtc-imx-sc.c
+++ b/drivers/rtc/rtc-imx-sc.c
@@ -3,6 +3,7 @@
  * Copyright 2018 NXP.
  */
 
+#include <dt-bindings/firmware/imx/rsrc.h>
 #include <linux/arm-smccc.h>
 #include <linux/firmware/imx/sci.h>
 #include <linux/module.h>
@@ -11,11 +12,17 @@
 #include <linux/rtc.h>
 
 #define IMX_SC_TIMER_FUNC_GET_RTC_SEC1970	9
+#define IMX_SC_TIMER_FUNC_SET_RTC_ALARM		8
 #define IMX_SC_TIMER_FUNC_SET_RTC_TIME		6
 
+#define IMX_SC_IRQ_FUNC_ENABLE			1
+
 #define IMX_SIP_SRTC			0xC2000002
 #define IMX_SIP_SRTC_SET_TIME		0x0
 
+#define SC_IRQ_GROUP_RTC    2
+#define SC_IRQ_RTC          1
+
 static struct imx_sc_ipc *rtc_ipc_handle;
 static struct rtc_device *imx_sc_rtc;
 
@@ -24,6 +31,24 @@ struct imx_sc_msg_timer_get_rtc_time {
 	u32 time;
 } __packed;
 
+struct imx_sc_msg_timer_enable_irq {
+	struct imx_sc_rpc_msg hdr;
+	u32 mask;
+	u16 resource;
+	u8 group;
+	u8 enable;
+} __packed;
+
+struct imx_sc_msg_timer_rtc_set_alarm {
+	struct imx_sc_rpc_msg hdr;
+	u16 year;
+	u8 mon;
+	u8 day;
+	u8 hour;
+	u8 min;
+	u8 sec;
+} __packed;
+
 static int imx_sc_rtc_read_time(struct device *dev, struct rtc_time *tm)
 {
 	struct imx_sc_msg_timer_get_rtc_time msg;
@@ -60,9 +85,92 @@ static int imx_sc_rtc_set_time(struct device *dev, struct rtc_time *tm)
 	return res.a0;
 }
 
+static int imx_sc_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
+{
+	struct imx_sc_msg_timer_enable_irq msg;
+	struct imx_sc_rpc_msg *hdr = &msg.hdr;
+	int ret;
+
+	hdr->ver = IMX_SC_RPC_VERSION;
+	hdr->svc = IMX_SC_RPC_SVC_IRQ;
+	hdr->func = IMX_SC_IRQ_FUNC_ENABLE;
+	hdr->size = 3;
+
+	msg.resource = IMX_SC_R_MU_1A;
+	msg.group = SC_IRQ_GROUP_RTC;
+	msg.mask = SC_IRQ_RTC;
+	msg.enable = enable;
+
+	ret = imx_scu_call_rpc(rtc_ipc_handle, &msg, true);
+	if (ret) {
+		dev_err(dev, "enable rtc irq failed, ret %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int imx_sc_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	return 0;
+}
+
+static int imx_sc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
+{
+	struct imx_sc_msg_timer_rtc_set_alarm msg;
+	struct imx_sc_rpc_msg *hdr = &msg.hdr;
+	int ret;
+	struct rtc_time *alrm_tm = &alrm->time;
+
+	hdr->ver = IMX_SC_RPC_VERSION;
+	hdr->svc = IMX_SC_RPC_SVC_TIMER;
+	hdr->func = IMX_SC_TIMER_FUNC_SET_RTC_ALARM;
+	hdr->size = 3;
+
+	msg.year = alrm_tm->tm_year + 1900;
+	msg.mon = alrm_tm->tm_mon + 1;
+	msg.day = alrm_tm->tm_mday;
+	msg.hour = alrm_tm->tm_hour;
+	msg.min = alrm_tm->tm_min;
+	msg.sec = alrm_tm->tm_sec;
+
+	ret = imx_scu_call_rpc(rtc_ipc_handle, &msg, true);
+	if (ret) {
+		dev_err(dev, "set rtc alarm failed, ret %d\n", ret);
+		return ret;
+	}
+
+	ret = imx_sc_rtc_alarm_irq_enable(dev, alrm->enabled);
+	if (ret) {
+		dev_err(dev, "enable rtc alarm failed, ret %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
 static const struct rtc_class_ops imx_sc_rtc_ops = {
 	.read_time = imx_sc_rtc_read_time,
 	.set_time = imx_sc_rtc_set_time,
+	.read_alarm = imx_sc_rtc_read_alarm,
+	.set_alarm = imx_sc_rtc_set_alarm,
+	.alarm_irq_enable = imx_sc_rtc_alarm_irq_enable,
+};
+
+static int imx_sc_rtc_alarm_sc_notify(struct notifier_block *nb,
+					unsigned long event, void *group)
+{
+	/* ignore non-rtc irq */
+	if (!((event & SC_IRQ_RTC) && (*(u8 *)group == SC_IRQ_GROUP_RTC)))
+		return 0;
+
+	rtc_update_irq(imx_sc_rtc, 1, RTC_IRQF | RTC_AF);
+
+	return 0;
+}
+
+static struct notifier_block imx_sc_rtc_alarm_sc_notifier = {
+	.notifier_call = imx_sc_rtc_alarm_sc_notify,
 };
 
 static int imx_sc_rtc_probe(struct platform_device *pdev)
@@ -73,6 +181,8 @@ static int imx_sc_rtc_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
+	device_init_wakeup(&pdev->dev, true);
+
 	imx_sc_rtc = devm_rtc_allocate_device(&pdev->dev);
 	if (IS_ERR(imx_sc_rtc))
 		return PTR_ERR(imx_sc_rtc);
@@ -87,6 +197,8 @@ static int imx_sc_rtc_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	imx_scu_register_notifier(&imx_sc_rtc_alarm_sc_notifier);
+
 	return 0;
 }
 
-- 
2.7.4

RE: [PATCH V4 1/4] dt-bindings: fsl: scu: add general interrupt support

[Anson Huang]

Ping...

Best Regards!
Anson Huang

> -----Original Message-----
> From: Anson Huang [mailto:Anson.Huang@nxp.com]
> Sent: 2019年2月21日 17:19
> To: robh+dt@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org;
> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com;
> a.zummo@towertech.it; alexandre.belloni@bootlin.com; Aisheng Dong
> <aisheng.dong@nxp.com>; ulf.hansson@linaro.org; Daniel Baluta
> <daniel.baluta@nxp.com>; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> rtc@vger.kernel.org
> Cc: dl-linux-imx <linux-imx@nxp.com>
> Subject: [PATCH V4 1/4] dt-bindings: fsl: scu: add general interrupt support
> 
> Add scu general interrupt function support.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
> Changes since V3:
> 	- make general MU interrupt channel as optional;
> 	- rename "gi3" to "gip3" according to driver/dts change.
> ---
>  .../devicetree/bindings/arm/freescale/fsl,scu.txt      | 18 ++++++++++++------
>  1 file changed, 12 insertions(+), 6 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> index 72d481c..4a9b9ab 100644
> --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
> @@ -22,9 +22,11 @@ Required properties:
>  -------------------
>  - compatible:	should be "fsl,imx-scu".
>  - mbox-names:	should include "tx0", "tx1", "tx2", "tx3",
> -			       "rx0", "rx1", "rx2", "rx3".
> -- mboxes:	List of phandle of 4 MU channels for tx and 4 MU channels
> -		for rx. All 8 MU channels must be in the same MU instance.
> +			       "rx0", "rx1", "rx2", "rx3";
> +		include "gip3" if want to support general MU interrupt.
> +- mboxes:	List of phandle of 4 MU channels for tx, 4 MU channels for
> +		rx, and 1 optional MU channel for general interrupt.
> +		All MU channels must be in the same MU instance.
>  		Cross instances are not allowed. The MU instance can only
>  		be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users
> need
>  		to make sure use the one which is not conflict with other @@
> -34,6 +36,7 @@ Required properties:
>  		Channel 1 must be "tx1" or "rx1".
>  		Channel 2 must be "tx2" or "rx2".
>  		Channel 3 must be "tx3" or "rx3".
> +		General interrupt rx channel must be "gip3".
>  		e.g.
>  		mboxes = <&lsio_mu1 0 0
>  			  &lsio_mu1 0 1
> @@ -42,7 +45,8 @@ Required properties:
>  			  &lsio_mu1 1 0
>  			  &lsio_mu1 1 1
>  			  &lsio_mu1 1 2
> -			  &lsio_mu1 1 3>;
> +			  &lsio_mu1 1 3
> +			  &lsio_mu1 3 3>;
>  		See Documentation/devicetree/bindings/mailbox/fsl,mu.txt
>  		for detailed mailbox binding.
> 
> @@ -133,7 +137,8 @@ firmware {
>  	scu {
>  		compatible = "fsl,imx-scu";
>  		mbox-names = "tx0", "tx1", "tx2", "tx3",
> -			     "rx0", "rx1", "rx2", "rx3";
> +			     "rx0", "rx1", "rx2", "rx3",
> +			     "gip3";
>  		mboxes = <&lsio_mu1 0 0
>  			  &lsio_mu1 0 1
>  			  &lsio_mu1 0 2
> @@ -141,7 +146,8 @@ firmware {
>  			  &lsio_mu1 1 0
>  			  &lsio_mu1 1 1
>  			  &lsio_mu1 1 2
> -			  &lsio_mu1 1 3>;
> +			  &lsio_mu1 1 3
> +			  &lsio_mu1 3 3>;
> 
>  		clk: clk {
>  			compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
> --
> 2.7.4

RE: [PATCH V4 1/4] dt-bindings: fsl: scu: add general interrupt support

[Aisheng Dong]

> From: Anson Huang
> 
> Add scu general interrupt function support.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Reviewed-by: Rob Herring <robh@kernel.org>

Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>

Regards
Dong Aisheng

RE: [PATCH V4 2/4] firmware: imx: enable imx scu general irq function

[Aisheng Dong]

> From: Anson Huang
> 
> The System Controller Firmware (SCFW) controls RTC, thermal and WDOG etc.,
> these resources' interrupt function are managed by SCU. When any IRQ
> pending, SCU will notify Linux via MU general interrupt channel #3, and Linux
> kernel needs to call SCU APIs to get IRQ status and notify each module to
> handle the interrupt.
> 
> Since there is no data transmission for SCU IRQ notification, so doorbell mode
> is used for this MU channel, and SCU driver will use notifier mechanism to
> broadcast to every module which registers the SCU block notifier.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> Changes since V3:
> 	- use alias to get general MU interrupt channel id and then get resource
> ID,
> 	  this is to support different MU instance;
> 	- add return value check for imx_scu_enable_general_irq_channel().
> ---
>  drivers/firmware/imx/imx-scu.c   | 116
> +++++++++++++++++++++++++++++++++++++++

Generally I would suggest to put scu irq support into another separate file under
The same folder to make code clean from function point of view.

>  include/linux/firmware/imx/sci.h |   3 +
>  2 files changed, 119 insertions(+)
> 
> diff --git a/drivers/firmware/imx/imx-scu.c b/drivers/firmware/imx/imx-scu.c
> index 2bb1a19..1dcd7b3 100644
> --- a/drivers/firmware/imx/imx-scu.c
> +++ b/drivers/firmware/imx/imx-scu.c
> @@ -7,6 +7,7 @@
>   *
>   */
> 
> +#include <dt-bindings/firmware/imx/rsrc.h>
>  #include <linux/err.h>
>  #include <linux/firmware/imx/types.h>
>  #include <linux/firmware/imx/ipc.h>
> @@ -21,6 +22,8 @@
> 
>  #define SCU_MU_CHAN_NUM		8
>  #define MAX_RX_TIMEOUT		(msecs_to_jiffies(30))
> +#define IMX_SC_IRQ_FUNC_STATUS	2
> +#define IMX_SC_IRQ_NUM_GROUP	6
> 
>  struct imx_sc_chan {
>  	struct imx_sc_ipc *sc_ipc;
> @@ -41,6 +44,7 @@ struct imx_sc_ipc {
>  	u32 *msg;
>  	u8 rx_size;
>  	u8 count;
> +	u32 mu_resource_id;

I feel it a bit strange to put this mu id in struct imx_sc_ipc.

>  };
> 
>  /*
> @@ -77,7 +81,23 @@ static int imx_sc_linux_errmap[IMX_SC_ERR_LAST] = {
>  	-EIO,	 /* IMX_SC_ERR_FAIL */
>  };
> 
> +struct imx_sc_msg_irq_get_status {
> +	struct imx_sc_rpc_msg hdr;
> +	union {
> +		struct {
> +			u16 resource;
> +			u8 group;
> +			u8 reserved;
> +		} __packed req;
> +		struct {
> +			u32 status;
> +		} __packed resp;

No packed needed for this one

> +	} data;
> +};
> +
>  static struct imx_sc_ipc *imx_sc_ipc_handle;
> +static struct work_struct imx_sc_general_irq_work; static
> +BLOCKING_NOTIFIER_HEAD(imx_scu_notifier_chain);

Imx_scu_irq_xxx

> 
>  static inline int imx_sc_to_linux_errno(int errno)  { @@ -194,9 +214,90 @@
> int imx_scu_call_rpc(struct imx_sc_ipc *sc_ipc, void *msg, bool have_resp)  }
> EXPORT_SYMBOL(imx_scu_call_rpc);
> 
> +int imx_scu_register_notifier(struct notifier_block *nb) {
> +	return blocking_notifier_chain_register(&imx_scu_notifier_chain, nb);
> +} EXPORT_SYMBOL(imx_scu_register_notifier);
> +
> +int imx_scu_unregister_notifier(struct notifier_block *nb) {
> +	return blocking_notifier_chain_unregister(&imx_scu_notifier_chain,
> +nb); } EXPORT_SYMBOL(imx_scu_unregister_notifier);
> +
> +static int imx_scu_notifier_call_chain(unsigned long status, u8 *group)
> +{
> +	return blocking_notifier_call_chain(&imx_scu_notifier_chain,
> +					    status, (void *)group);
> +}
> +
> +static void imx_scu_general_irq_work_handler(struct work_struct *work)
> +{
> +	struct imx_sc_msg_irq_get_status msg;
> +	struct imx_sc_rpc_msg *hdr = &msg.hdr;
> +	u32 irq_status;
> +	int ret;
> +	u8 i;
> +
> +	for (i = 0; i < IMX_SC_IRQ_NUM_GROUP; i++) {

Do we need to support all irq group?

> +		hdr->ver = IMX_SC_RPC_VERSION;
> +		hdr->svc = IMX_SC_RPC_SVC_IRQ;
> +		hdr->func = IMX_SC_IRQ_FUNC_STATUS;
> +		hdr->size = 2;
> +
> +		msg.data.req.resource = imx_sc_ipc_handle->mu_resource_id;
> +		msg.data.req.group = i;
> +
> +		ret = imx_scu_call_rpc(imx_sc_ipc_handle, &msg, true);
> +		if (ret) {
> +			pr_err("get irq status failed, ret %d\n", ret);

Can the error output more useful information?

> +			return;
> +		}
> +
> +		irq_status = msg.data.resp.status;
> +		if (!irq_status)
> +			continue;
> +
> +		imx_scu_notifier_call_chain(irq_status, &i);
> +	}
> +}
> +
> +static void imx_scu_rxdb_callback(struct mbox_client *c, void *msg) {

Imx_scu_irq_callback

> +	schedule_work(&imx_sc_general_irq_work);
> +}
> +
> +static int imx_scu_enable_general_irq_channel(struct device *dev) {
> +	struct mbox_client *cl;
> +	struct mbox_chan *ch;
> +	int ret = 0;
> +
> +	cl = devm_kzalloc(dev, sizeof(*cl), GFP_KERNEL);
> +	if (!cl)
> +		return -ENOMEM;
> +
> +	cl->dev = dev;
> +	cl->rx_callback = imx_scu_rxdb_callback;
> +
> +	/* SCU general IRQ uses general interrupt channel 3 */
> +	ch = mbox_request_channel_byname(cl, "gip3");
> +	if (IS_ERR(ch)) {
> +		ret = PTR_ERR(ch);
> +		dev_err(dev, "failed to request mbox chan gip3, ret %d\n", ret);
> +		return ret;
> +	}
> +
> +	INIT_WORK(&imx_sc_general_irq_work,
> imx_scu_general_irq_work_handler);
> +
> +	return ret;
> +}
> +
>  static int imx_scu_probe(struct platform_device *pdev)  {
>  	struct device *dev = &pdev->dev;
> +	struct of_phandle_args spec;
>  	struct imx_sc_ipc *sc_ipc;
>  	struct imx_sc_chan *sc_chan;
>  	struct mbox_client *cl;
> @@ -246,6 +347,21 @@ static int imx_scu_probe(struct platform_device
> *pdev)
> 
>  	imx_sc_ipc_handle = sc_ipc;
> 
> +	ret = imx_scu_enable_general_irq_channel(dev);
> +	if (ret)
> +		dev_warn(dev,
> +			"failed to enable general irq channel: %d\n", ret);
> +

It does not make sense to parse again if failed. Pls put them into one function.

> +	if (!of_parse_phandle_with_args(dev->of_node, "mboxes",
> +				       "#mbox-cells", 0, &spec))
> +		i = of_alias_get_id(spec.np, "mu");

This needs a binding doc for mailbox (mu).

> +
> +	/* use mu1 as general mu irq channel if failed */
> +	if (i < 0)
> +		i = 1;
> +
> +	imx_sc_ipc_handle->mu_resource_id = IMX_SC_R_MU_0A + i;
> +
>  	dev_info(dev, "NXP i.MX SCU Initialized\n");
> 
>  	return devm_of_platform_populate(dev); diff --git
> a/include/linux/firmware/imx/sci.h b/include/linux/firmware/imx/sci.h
> index ebc5509..9d608db 100644
> --- a/include/linux/firmware/imx/sci.h
> +++ b/include/linux/firmware/imx/sci.h
> @@ -15,4 +15,7 @@
> 
>  #include <linux/firmware/imx/svc/misc.h>  #include
> <linux/firmware/imx/svc/pm.h>
> +
> +int imx_scu_register_notifier(struct notifier_block *nb); int
> +imx_scu_unregister_notifier(struct notifier_block *nb);

imx_scu_irq_xxx

Regards
Dong Aisheng

>  #endif /* _SC_SCI_H */
> --
> 2.7.4

RE: [PATCH V4 3/4] arm64: dts: freescale: imx8qxp: enable scu general irq channel

[Aisheng Dong]

> From: Anson Huang
> 
> On i.MX8QXP, SCU uses MU1 general interrupt channel #3 to notify user for
> IRQs of RTC alarm, thermal alarm and WDOG etc., mailbox RX doorbell mode is
> used for this function, this patch adds support for it.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
> Changes since V3:
> 	- rename "gi3" to "gip3";
> 	- add alias for getting mu id by driver.
> ---
>  arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> index 4c3dd95..f0a9224 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> @@ -21,6 +21,7 @@
>  		mmc1 = &usdhc2;
>  		mmc2 = &usdhc3;
>  		serial0 = &adma_lpuart0;
> +		mu1 = &lsio_mu1;

Need add aliase in binding doc.

Otherwise:
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>

Regards
Dong Aisheng

RE: [PATCH V4 2/4] firmware: imx: enable imx scu general irq function

[Anson Huang]

Best Regards!
Anson Huang

> -----Original Message-----
> From: Aisheng Dong
> Sent: 2019年3月15日 19:05
> To: Anson Huang <anson.huang@nxp.com>; robh+dt@kernel.org;
> mark.rutland@arm.com; shawnguo@kernel.org; s.hauer@pengutronix.de;
> kernel@pengutronix.de; festevam@gmail.com; a.zummo@towertech.it;
> alexandre.belloni@bootlin.com; ulf.hansson@linaro.org; Daniel Baluta
> <daniel.baluta@nxp.com>; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> rtc@vger.kernel.org
> Cc: dl-linux-imx <linux-imx@nxp.com>
> Subject: RE: [PATCH V4 2/4] firmware: imx: enable imx scu general irq
> function
> 
> > From: Anson Huang
> >
> > The System Controller Firmware (SCFW) controls RTC, thermal and WDOG
> > etc., these resources' interrupt function are managed by SCU. When any
> > IRQ pending, SCU will notify Linux via MU general interrupt channel
> > #3, and Linux kernel needs to call SCU APIs to get IRQ status and
> > notify each module to handle the interrupt.
> >
> > Since there is no data transmission for SCU IRQ notification, so
> > doorbell mode is used for this MU channel, and SCU driver will use
> > notifier mechanism to broadcast to every module which registers the SCU
> block notifier.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > ---
> > Changes since V3:
> > 	- use alias to get general MU interrupt channel id and then get
> > resource ID,
> > 	  this is to support different MU instance;
> > 	- add return value check for imx_scu_enable_general_irq_channel().
> > ---
> >  drivers/firmware/imx/imx-scu.c   | 116
> > +++++++++++++++++++++++++++++++++++++++
> 
> Generally I would suggest to put scu irq support into another separate file
> under The same folder to make code clean from function point of view.

OK, I will add a imx-scu-irq.c file to support SCU irq function.

> 
> >  include/linux/firmware/imx/sci.h |   3 +
> >  2 files changed, 119 insertions(+)
> >
> > diff --git a/drivers/firmware/imx/imx-scu.c
> > b/drivers/firmware/imx/imx-scu.c index 2bb1a19..1dcd7b3 100644
> > --- a/drivers/firmware/imx/imx-scu.c
> > +++ b/drivers/firmware/imx/imx-scu.c
> > @@ -7,6 +7,7 @@
> >   *
> >   */
> >
> > +#include <dt-bindings/firmware/imx/rsrc.h>
> >  #include <linux/err.h>
> >  #include <linux/firmware/imx/types.h>  #include
> > <linux/firmware/imx/ipc.h> @@ -21,6 +22,8 @@
> >
> >  #define SCU_MU_CHAN_NUM		8
> >  #define MAX_RX_TIMEOUT		(msecs_to_jiffies(30))
> > +#define IMX_SC_IRQ_FUNC_STATUS	2
> > +#define IMX_SC_IRQ_NUM_GROUP	6
> >
> >  struct imx_sc_chan {
> >  	struct imx_sc_ipc *sc_ipc;
> > @@ -41,6 +44,7 @@ struct imx_sc_ipc {
> >  	u32 *msg;
> >  	u8 rx_size;
> >  	u8 count;
> > +	u32 mu_resource_id;
> 
> I feel it a bit strange to put this mu id in struct imx_sc_ipc.

Since I will create new file imx-sc-irq.c, I will move this out of the struct and
use define a static variable for it.

> 
> >  };
> >
> >  /*
> > @@ -77,7 +81,23 @@ static int imx_sc_linux_errmap[IMX_SC_ERR_LAST] =
> {
> >  	-EIO,	 /* IMX_SC_ERR_FAIL */
> >  };
> >
> > +struct imx_sc_msg_irq_get_status {
> > +	struct imx_sc_rpc_msg hdr;
> > +	union {
> > +		struct {
> > +			u16 resource;
> > +			u8 group;
> > +			u8 reserved;
> > +		} __packed req;
> > +		struct {
> > +			u32 status;
> > +		} __packed resp;
> 
> No packed needed for this one

OK

> 
> > +	} data;
> > +};
> > +
> >  static struct imx_sc_ipc *imx_sc_ipc_handle;
> > +static struct work_struct imx_sc_general_irq_work; static
> > +BLOCKING_NOTIFIER_HEAD(imx_scu_notifier_chain);
> 
> Imx_scu_irq_xxx

OK

> 
> >
> >  static inline int imx_sc_to_linux_errno(int errno)  { @@ -194,9
> > +214,90 @@ int imx_scu_call_rpc(struct imx_sc_ipc *sc_ipc, void *msg,
> > bool have_resp)  } EXPORT_SYMBOL(imx_scu_call_rpc);
> >
> > +int imx_scu_register_notifier(struct notifier_block *nb) {
> > +	return blocking_notifier_chain_register(&imx_scu_notifier_chain,
> > +nb); } EXPORT_SYMBOL(imx_scu_register_notifier);
> > +
> > +int imx_scu_unregister_notifier(struct notifier_block *nb) {
> > +	return blocking_notifier_chain_unregister(&imx_scu_notifier_chain,
> > +nb); } EXPORT_SYMBOL(imx_scu_unregister_notifier);
> > +
> > +static int imx_scu_notifier_call_chain(unsigned long status, u8
> > +*group) {
> > +	return blocking_notifier_call_chain(&imx_scu_notifier_chain,
> > +					    status, (void *)group);
> > +}
> > +
> > +static void imx_scu_general_irq_work_handler(struct work_struct
> > +*work) {
> > +	struct imx_sc_msg_irq_get_status msg;
> > +	struct imx_sc_rpc_msg *hdr = &msg.hdr;
> > +	u32 irq_status;
> > +	int ret;
> > +	u8 i;
> > +
> > +	for (i = 0; i < IMX_SC_IRQ_NUM_GROUP; i++) {
> 
> Do we need to support all irq group?

After further check, maybe we can change the group number to 4, ONLY supporting those
kernel related features, others are NOT needed in kernel now.

34 #define SC_IRQ_GROUP_TEMP       0U   /* Temp interrupts */
 35 #define SC_IRQ_GROUP_WDOG       1U   /* Watchdog interrupts */
 36 #define SC_IRQ_GROUP_RTC        2U   /* RTC interrupts */
 37 #define SC_IRQ_GROUP_WAKE       3U   /* Wakeup interrupts */
 38 #define SC_IRQ_GROUP_SYSCTR     4U   /* System counter interrupts */
 39 #define SC_IRQ_GROUP_REBOOTED   5U   /* Partition reboot complete */
 40 #define SC_IRQ_GROUP_REBOOT     6U   /* Partition reboot starting */

> 
> > +		hdr->ver = IMX_SC_RPC_VERSION;
> > +		hdr->svc = IMX_SC_RPC_SVC_IRQ;
> > +		hdr->func = IMX_SC_IRQ_FUNC_STATUS;
> > +		hdr->size = 2;
> > +
> > +		msg.data.req.resource = imx_sc_ipc_handle-
> >mu_resource_id;
> > +		msg.data.req.group = i;
> > +
> > +		ret = imx_scu_call_rpc(imx_sc_ipc_handle, &msg, true);
> > +		if (ret) {
> > +			pr_err("get irq status failed, ret %d\n", ret);
> 
> Can the error output more useful information?

Yes, I will add group number in the error message.

> 
> > +			return;
> > +		}
> > +
> > +		irq_status = msg.data.resp.status;
> > +		if (!irq_status)
> > +			continue;
> > +
> > +		imx_scu_notifier_call_chain(irq_status, &i);
> > +	}
> > +}
> > +
> > +static void imx_scu_rxdb_callback(struct mbox_client *c, void *msg) {
> 
> Imx_scu_irq_callback

OK

> 
> > +	schedule_work(&imx_sc_general_irq_work);
> > +}
> > +
> > +static int imx_scu_enable_general_irq_channel(struct device *dev) {
> > +	struct mbox_client *cl;
> > +	struct mbox_chan *ch;
> > +	int ret = 0;
> > +
> > +	cl = devm_kzalloc(dev, sizeof(*cl), GFP_KERNEL);
> > +	if (!cl)
> > +		return -ENOMEM;
> > +
> > +	cl->dev = dev;
> > +	cl->rx_callback = imx_scu_rxdb_callback;
> > +
> > +	/* SCU general IRQ uses general interrupt channel 3 */
> > +	ch = mbox_request_channel_byname(cl, "gip3");
> > +	if (IS_ERR(ch)) {
> > +		ret = PTR_ERR(ch);
> > +		dev_err(dev, "failed to request mbox chan gip3, ret %d\n",
> ret);
> > +		return ret;
> > +	}
> > +
> > +	INIT_WORK(&imx_sc_general_irq_work,
> > imx_scu_general_irq_work_handler);
> > +
> > +	return ret;
> > +}
> > +
> >  static int imx_scu_probe(struct platform_device *pdev)  {
> >  	struct device *dev = &pdev->dev;
> > +	struct of_phandle_args spec;
> >  	struct imx_sc_ipc *sc_ipc;
> >  	struct imx_sc_chan *sc_chan;
> >  	struct mbox_client *cl;
> > @@ -246,6 +347,21 @@ static int imx_scu_probe(struct platform_device
> > *pdev)
> >
> >  	imx_sc_ipc_handle = sc_ipc;
> >
> > +	ret = imx_scu_enable_general_irq_channel(dev);
> > +	if (ret)
> > +		dev_warn(dev,
> > +			"failed to enable general irq channel: %d\n", ret);
> > +
> 
> It does not make sense to parse again if failed. Pls put them into one function.

Will put the mu id parse into imx_scu_enable_general_irq_channel function and
ONLY parse it when irq channel enabled successfully.

> 
> > +	if (!of_parse_phandle_with_args(dev->of_node, "mboxes",
> > +				       "#mbox-cells", 0, &spec))
> > +		i = of_alias_get_id(spec.np, "mu");
> 
> This needs a binding doc for mailbox (mu).

Will add it.

> 
> > +
> > +	/* use mu1 as general mu irq channel if failed */
> > +	if (i < 0)
> > +		i = 1;
> > +
> > +	imx_sc_ipc_handle->mu_resource_id = IMX_SC_R_MU_0A + i;
> > +
> >  	dev_info(dev, "NXP i.MX SCU Initialized\n");
> >
> >  	return devm_of_platform_populate(dev); diff --git
> > a/include/linux/firmware/imx/sci.h b/include/linux/firmware/imx/sci.h
> > index ebc5509..9d608db 100644
> > --- a/include/linux/firmware/imx/sci.h
> > +++ b/include/linux/firmware/imx/sci.h
> > @@ -15,4 +15,7 @@
> >
> >  #include <linux/firmware/imx/svc/misc.h>  #include
> > <linux/firmware/imx/svc/pm.h>
> > +
> > +int imx_scu_register_notifier(struct notifier_block *nb); int
> > +imx_scu_unregister_notifier(struct notifier_block *nb);
> 
> imx_scu_irq_xxx

OK

Thanks,
Anson.

> 
> Regards
> Dong Aisheng
> 
> >  #endif /* _SC_SCI_H */
> > --
> > 2.7.4